-SQA-SCOTTISH QUALIFICATIONS AUTHORITY NATIONAL CERTIFICATE MODULE: UNIT SPECIFICATION GENERAL INFORMATION. -Module Number Session

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1 SQASCOTTISH QUALIFICATIONS AUTHORITY NATIONAL CERTIFICATE MODULE: UNIT SPECIFICATION GENERAL INFORMATION Module Number Session Superclass XL Title APPLIED ELECTRONICS 1 DESCRIPTION GENERAL COMPETENCE FOR UNIT: Applying electronic engineering principles to the design of analogue and digital electronic systems. OUTCOMES 1. design a signal conditioning subsystem; 2. construct an electronic control system to meet a given specification; 3. develop a combinational logic circuit. CREDIT VALUE: 1 NC Credit ACCESS STATEMENT: Access to this unit is at the discretion of the centre. However it would be beneficial for the candidate to have completed the following NC modules: Energy; Introduction to Control Systems (x2); Introductory Applied Analogue and Digital Electronics; Fundamentals of Technology: Mechanical Systems. For further information contact: Committee and Administration Unit, SQA, Hanover House, 24 Douglas Street, Glasgow G2 7NQ. Additional copies of this unit may be purchased from SQA (Sales and Despatch section). At the time of publication, the cost is 1.50 (minimum order 5.00).

2 NATIONAL CERTIFICATE MODULE; UNIT SPECIFICATION STATEMENT OF STANDARDS UNIT NUMBER: UNIT TITLE: APPLIED ELECTRONICS 1 Acceptable performance in this unit will be the satisfactory achievement of the standards set out in this part of the specification. All sections of the statement of standards are mandatory and cannot be altered without reference to SQA. OUTCOME 1. DESIGN A SIGNAL CONDITIONING SUBSYSTEM PERFORMANCE CRITERIA (a) (b) (c) (d) Data sheets are correctly interpreted in the selection of operational amplifier configurations. The graphic symbols used to represent electronic subsystems are correct with respect to current standards. Calculations to determine the operation of electronic subsystems are correct. A signal conditioning circuit is evaluated using appropriate circuit equipment. RANGE STATEMENT The range for this outcome is fully expressed in the performance criteria. EVIDENCE REQUIREMENTS Oral/written and graphical evidence showing that the candidate can design a signal conditioning system to meet a given performance specification on a minimum of one occasion. 2

3 OUTCOME 2. DESIGN AN ELECTRONIC CONTROL SYSTEM TO MEET A GIVEN SPECIFICATION PERFORMANCE CRITERIA (a) (b) (c) (d) For a given electronic system, each component is correctly identified. The operational characteristics of each subsystem is clearly explained. Calculations to verify the operational characteristics of each subsystem are correct, with reference to data sheets. The correct operation of the electronic system is confirmed. RANGE STATEMENT The range for this outcome is fully expressed in the performance criteria. EVIDENCE REQUIREMENTS Written and/or oral and graphical evidence of the candidate s ability to design and verify correct operation of a control system through calculation. OUTCOME 3. DEVELOP A COMBINATIONAL LOGIC CIRCUIT PERFORMANCE CRITERIA (a) (b) (c) A suitable logic circuit is designed using suitable graphical representation from a given specification. A valid truth table is produced to predict the expected output. The logic circuit is successfully evaluated using appropriate circuit analysis equipment. RANGE STATEMENT The range for this outcome is fully expressed in the performance criteria. EVIDENCE REQUIREMENTS Written and/or oral and graphical evidence of the candidate s ability to develop specified combinational logic systems and to verify correct operation. Performance evidence that the candidate can design and evaluate a combinational logic circuit on a minimum of one occasion. 3

4 ASSESSMENT In order to achieve this unit, candidates are required to present sufficient evidence that they have met all the performance criteria for each outcome within the range specified. Details of these requirements are given for each outcome. The assessment instruments used should follow the general guidance offered by the SQA assessment model and an integrative approach to assessment is encouraged. (See references at the end of support notes). Accurate records should be made of the assessment instruments used showing how evidence is generated for each outcome and giving marking schemes and/or checklists, etc. Records of candidates achievements should be kept. These records will be available for external verification. SPECIAL NEEDS In certain cases, modified outcomes and range statements can be proposed for certification. See references at end of support notes. Copyright SQA 1997 Please note that this publication may be reproduced in whole or in part for educational purposes provided that: (i) (ii) no profit is derived from the reproduction; if reproduced in part, the source is acknowledged. 4

5 NATIONAL CERTIFICATE MODULE: UNIT SPECIFICATION SUPPORT NOTES UNIT NUMBER: UNIT TITLE: APPLIED ELECTRONICS 1 SUPPORT NOTES: This part of the unit specification is offered as guidance. None of the sections of the support notes is mandatory. NOTIONAL DESIGN LENGTH: SQA allocates a notional design length to a unit on the basis of time estimated for achievement of the stated standards by a candidate whose starting point is as described in the access statement. The notional design length for this unit is 40 hours. The use of notional design length for programme design and timetabling is advisory only. PURPOSE To develop the ability to design and construct analogue and digital electronic systems. SQA publishes summaries of NC units for easy reference, publicity purposes, centre handbooks, etc. The summary statement for this unit is as follows: On completion of this module you will have achieved the level of competence of someone who is able to understand the function and operation of analogue and digital electronic systems. CONTENT/CONTEXT The candidate should achieve the level of competence of someone who is able to understand the function and operation of analogue and digital electronic systems. Learning Outcomes 1 and 2 could be suitable for integrated assessment buy a single assignment (an example covering both LO s is included as an exemplar assessment). Outcome 1 The learning outcome is intended to enable the candidate to design signal conditioning circuitry using operational amplifiers. Application data sheets may be used as opposed to manufacturers data sheets (an exemplar sheet is appended to the notes). Evaluation of the circuit can be achieved by circuit construction and testing, testing of prebuilt circuits or by computer simulation techniques. Examples of suitable subsystems and calculations are: 5

6 Electronic subsystems: voltage divider; comparator; voltage follower; noninverting amplifier; inverting amplifier, difference amplifier. Calculations: gain; input resistor; feedback resistor; input voltage; output voltage. Test equipment: voltmeter, oscilloscope. Outcome 2 The outcome is intended to develop competence in using input and output transducers in electronic control systems. The transducers could be used with the signal conditioning of LO1 to provide a complete control system. The operation of the given system should be broken into subsystems for PC(b) eg sensing system Signal conditioning Output system. Suitable data sheets could include manufacturers device sheets, application notes, supplier data sheets or summary sheets of transducer characteristics. Correct operation of the circuits can be confirmed by circuit construction and testing, testing of prebuilt circuits or by computer simulation techniques. Examples of suitable components, operational characteristics and calculations are: Electronic components: light; temperature; switches; resistors, potentiometers; bipolar transistors; field effect transistors (standard and darlington pair configuration); comparator operational amplifier; diodes; relays. Operational characteristics: resistance change of sensors; saturation conditions for transistors; saturation conditions for opamps; load capability of relays. Calculations: potential divider (sensor type, signal voltage, fixed resistor value); transistor (base, emitter, collector current, current gain); output load. Outcome 3 The outcome is intended to develop the candidates ability to design combinational logic circuits to meet given specifications. The specification for the outcome may take the form of a description of the problem to be solved in a manner which would lead to a Boolean equation or the Boolean equation itself together with a description of the problem that the circuit is to solve. The Truth Table is intended to allow the candidate to verify the correct operation of the circuit drawn. Evaluation of the circuits can be confirmed by circuit construction and testing, testing of prebuilt circuits or by computer simulation techniques. An exemplar of LO3 is also included. 6

7 Operational characteristics: operating voltages; noise immunity; input impedance; logic voltages; output current; speed. Common logic families: CMOS; TTL. Logic gates: AND; OR; NOT; NAND; NOR; ExOR. Method of analysis: truth table; Karnaugh mapping; Boolean simplification; NAND equivalence. Machine Safety Interlock System A drilling machine, driven by an electric motor must operate only when a set of safety conditions are satisfied. The operation will be enabled by a l (i.e. it is an active HIGH line) on the output of a digital logic circuit. The safe operational conditions are: the power supply switch is operated (Assign A : active High) the safety guard is in position (assign B active High) AND the motor overload current limit is not exceeded (Assign C : active High) In addition to the above requirements, maintenance facilities must be provided which allow the motor to run when: (a) (b) a key is inserted (assign D : active High), the safety guard is NOT closed. the power supply switch is operated (A) and the motor overload current limit is not exceeded (c). This problem resulted in the following Boolean equation: f = A.B.C + A.B.C.D 1. Design a circuit to satisfy the above equation. 2. Develop a Truth Table to show the outputs expected from this circuit. 3. Using the Logic tutor Boards provided construct the circuit and hence demonstrate its correct operation. APPROACHES TO GENERATING EVIDENCE A candidate centred, resource based approach to learning should be adopted in which candidates are encouraged to complete assignments in an independent manner. Corresponding to outcomes: 1. Current Standards: BS3939 and PP7303 The candidates could be given a series of practical exercises which will develop abilities to design signal conditioning and signal processing systems. 7

8 The exercises should be structured to develop candidates competencies in using the operational amplifier configurations specified in the range statements for each LO. A tutor checklist could be used to verify successful completion of exercises. 2. The candidate could be given a series of graded exercises which culminate in an assignment to measure ability to construct an electronic system to a given specification. The assignment should be broken down into a number of tasks in which a candidate systematically selects a suitable input sensor, makes calculations to ascertain values of passive components to produce required opamp and transistor switching levels, constructs the circuit and evaluates the performance of the circuit to ensure correct operation. 3. The candidate should be given a series of graded exercises which culminate in an assignment to measure ability to develop a combinational logic circuit to a given specification. The assignment should be broken down into a number of tasks in which a candidate systematically constructs a truth table, interprets the truth table using a Boolean expression, simplifies the expression, draws the logic circuit using NAND gates, and constructs and evaluates the circuit to ensure correct operation. A tutor checklist could be used to verify successful completion of exercises. The use of computer based circuit simulation and evaluation packages to verify circuit design is to be encouraged. ASSESSMENT PROCEDURES Example of instruments of assessment which could be used for each outcome are as follows: 13. The candidate could produce a brief report in a standard format which contains evidence of the work undertaken in completing each assignment. An observation checklist could be kept by the tutor as evidence of candidates completing practical assignment successfully. A unit test could be used to assess knowledge and understanding and ability to calculate as indicated in the range statement for each PC. PROGRESSION This unit progresses to the NC module Applied Electronics 2. This unit forms part of the GSVQ in Engineering at Level III. Candidates successfully completing the GSVQ in Engineering at level III will be able to progress to an HNC/D programme in related disciplines. 8

9 RECOGNITION Many SQA NC units are recognised for entry/recruitment purposes. For uptodate information see the SQA guide Recognised Groupings of National Certificate Modules. REFERENCES 1. Guide to unit writing. (A018). 2. For a fuller discussion on assessment issues, please refer to SQA s Guide to Assessment. (B005). 3. Procedures for special needs statements are set out in SQA s guide Candidates with Special Needs. (B006). 4. Information for centres on SQA s operating procedures is contained in SQA s Guide to Procedures. (F009). 5. For details of other SQA publications, please consult SQA s publications list. (X037). Copyright SQA 1997 Please note that this publication may be reproduced in whole or in part for educational purposes provided that: (i) (ii) no profit is derived from the reproduction; if reproduced in part, the source is acknowledged. 9

10 V 2 R i + Operational Amplifiers: Application Data Sheets 1 The Inverting Amplifier R f A V = /V i = R f /R i R i R b = R f R i V 1 + R b 2 The Noninverting Amplifier A V = l + R f /R l V 1 R i + R i = R f R l R f R 1 3 The Difference Amplifier R f = R f /R i (V 2 V 1 ) V 1 R i If R f = R 1 = V 2 V 1 R f 10

11 4 The summing amplifier R f If R 1 = R 2 = R 3 V 1 R 1 R 2 = (V 1 V 2 V 3 ) V 2 V 3 R 3 + R b 5 The Integrator V 0 1 = Vi dt C. Ri. R f Rf is normally included to restrict low frequency gain to stop instability it is typically selected to be about 10 x Ri V i R i C + R 1 6 The High Pass Filter F c = 1/(2 Π CR) Reversing 'R' and 'C' in the circuit provides a low pass filter. C + R 11

12 7 The Comparator (with hysteresis) NB Positve feedback used. Input Switching points V i R i + Vo. R1/(R1 Rf) + R i = R f R l R 1 R f 12

13 Restricted Response/Practical Exercise Section (a) Section (b) Section (c) Section (d) +12V R1 10K R2 2K2 IC1 D1 RL1 VR1 2 7 Ic R5 NORP12 10K R3 2K R4 Ib TR1 2N1711 D2 1K LDR1 OV OV OV 12V Q1(a) From the circuit diagram shown, identify the following components: R1 through R5 VR1 LDR1 D1, D2 IC1 TR1 RL1 Q1(b) With reference to the circuit diagram, explain the function of each section (a) through (d). Q1(c) Calculate the minimum and maximum voltages that can appear on pin 3 of the 741. Q1(d) Calculate the minimum and maximum voltages that can appear on pin 2 of the 741. Q1(e) Calculate 1c, 1b and R4 using the data sheets provided. Contract the circuit and verify its operation. 13

14 Machine Safety Interlock System A drilling machine, driven by an electric motor must operate only when a set of safety conditions are satisfied. The operation will be enabled by a 1 (i.e. it is an active HIGH line) on the output of a digital logic circuit. The safe operational conditions are: the power supply switch is operated (assign A : active High), the safety guard is in position (assign B : active High) AND the motor overload current limit is not exceeded (assign C : active High). In addition to the above requirements, maintenance facilities must be provided which allow the motor to run when: (a) (b) a key is inserted (assign D : active High), the safety guard is NOT closed the power supply switch is operated (A) and the motor overload current limit is not exceeded (C). This problem resulted in the following Boolean equation: f = A.B.C + A.B.C.D (i) (ii) (iii) Design a circuit to satisfy the above equation. Develop a Truth Table to show the outputs expected from this circuit. Using the Logic tutor Boards provided construct the circuit and hence demonstrate its correct operation. 14