GCSE Electronics 44301
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1 GCSE Electronics 4401 Unit 1 Written Paper Mark scheme June 2017 Version: 1.0 Final
2 Mark schemes are prepared by the Lead Assessment Writer and considered, together with the relevant questions, by a panel of subject teachers. This mark scheme includes any amendments made at the standardisation events which all associates participate in and is the scheme which was used by them in this examination. The standardisation process ensures that the mark scheme covers the students responses to questions and that every associate understands and applies it in the same correct way. As preparation for standardisation each associate analyses a number of students scripts. Alternative answers not already covered by the mark scheme are discussed and legislated for. If, after the standardisation process, associates encounter unusual answers which have not been raised they are required to refer these to the Lead Assessment Writer. It must be stressed that a mark scheme is a working document, in many cases further developed and expanded on the basis of students reactions to a particular paper. Assumptions about future mark schemes on the basis of one year s document should be avoided; whilst the guiding principles of assessment remain constant, details will change, depending on the content of a particular examination paper. Further copies of this mark scheme are available from aqa.org.uk Copyright 2017 AQA and its licensors. All rights reserved. AQA retains the copyright on all its publications. However, registered schools/colleges for AQA are permitted to copy material from this booklet for their own internal use, with the following important exception: AQA cannot give permission to schools/colleges to photocopy any material that is acknowledged to a third party even for internal use within the centre.
3 Sub-part 1 (a) Live Neutral Earth Spelling recognisable as neutral. Accept ground for earth. 1 (b) The (metal) case 1 1 (c) Multimeter/Resistance meter/continuity tester 1 1 (d) Overheating/fire/melting flex/damage to components 1 1 (e) Blow/melt - easily/even if there is no fault/immediately/as soon as switched on 1 1 (f) 4 khz 1 1 (g) (LED) flashing, growing brighter and dimmer 1 1 (h) Oscilloscope / stopwatch 1
4 Name Symbol AND NAND 2 (a) NOR 5 NOT OR 5 marks input and output connections missing for 1 gate then set minus 1 input and output connections for more than 1 gate missing minus 2 4
5 Answer Mark Comments/ to OR gate OR to output 2 (b) (i) output to NOT gate output to another gate 4 Or 5
6 Answer Mark Comments/ m 2 (b) (ii) D R Q 6
7 2 (b) (iii) Q 1 Function of subsystem Name of subsystem Logic OR gate Data latch (any order) (a) Output Siren 7 Input Door sensor / light beam sensor (any order) Analogue to digital converter Comparator Driver Transistor switch (b) (i) Door sensor 1 (b) (ii) Data latch 1 (b) (iii) Comparator 1 (b) (iv) Light beam sensor 1 7
8 4 (a) Formula, substitution, correct solution, 9 x 18/(6+18) = V Correct formula Correct substitution Correct answer value 4 (b) (i) 17.5 k 18 k 1 Allow ± 0.5 k 4 (b) (ii) 0 2 lux 1 4 (c) (Formula & substitution), correct answer: R = 15 k 2 = 7.5 k 2 4 (d) 4 (e) (i) 4 (e) (ii) Analogue signal, continuously varying voltage, voltage can have any value between two limits. Digital signal can only have two states (on or off only). Correctly drawn npn bipolar transistor Correct orientation within circuit Correctly labelled: Emitter, Base & Collector Diode in parallel with the relay coil Correct orientation of diode, including recognisable diode symbol
9 5 (a) 4 5 (b) decision either diamond shaped box input either detect box or scans box loop either upward arrow output issue ticket / display insert fee process store or calculate box 5 9
10 boxes correct shape two boxes for raise barrier and check space is clear decision box no loop to above check space yes to lower barrier and end boxes Raise barrier 5 (c) Camera system checks space is clear 5 Is space clear? N Lower barrier Y End 10
11 6 (a) 12 k resistor from pin 7 to +9 V 0 k resistor from pin 7 to link between pins 2 & 6 Link from pin 1 to 0 V 0.1 F capacitor from pin 2 & 6 link to 0 V Link from pin 8 to +9 V 5 6 (b) Formula, substitution, correct answer with unit. T = (R 1 + 2R 2 )C 1.44 = s 5.0 ms 6 (c) (i) +9 V to Ammeter +ve and Ammeter ve to +9 V on circuit 0 V on supply to 0 V on circuit Voltmeter +ve to +9 V on circuit (or to +9V on supply) 0 V on Voltmeter to 0 V on circuit/power supply 4 Accept Ammeter in 0 V line if correctly connected. 6 (c) (ii) Formula P = IV, calculation with unit P = Watts, ma handled correctly 6 (d) Ammeter connections have been reversed 1 6 (e) (i) (.0) ms 1 6 (e) (ii) 2(.0) ms 1 11
12 7 (a) (i) Fuse 1 7 (a) (ii) Each diode correctly orientated with acceptable circuit symbols 7 (b) Formula & Calculation 12 x 2 = 17 V 2 7 (c) 7 (d) (i) 7 (d) (ii) Step down to a low (safe) voltage Isolation separation from direct contact to mains LED and resistor in series across dc output Correct orientation of LED and symbol Voltage across resistor = 17 2 = 15 V Formula R = V/I = 15/0.0 = 500 Or Voltage across resistor = 17 2 x = 1.6 V Formula R = V/I = 1.6/0.0 = (d) (iii) 510 (470 )/560 Ω if tolerance issue explained 1 ECF from (ii) 12
13 8 (a) Aerial/Antenna (Audio) Amplifier 2 8 (b) (i) 8 (b) (ii) 8 (c) 8 (d) 8 (e) Sensitivity: The ability to produce a large amplitude output from a small signal from the aerial so the radio can respond to weak signals. Selectivity: The ability to separate the desired signal from those transmitted at frequencies close to required signal so there is no interference from other channels. Demodulator separates the message signal from the rf signal ie removes the rf to leave only the audio signal. AM signal with an envelope following the audio signal AM signal showing the carrier component FM signal showing varying frequency in response to audio signal FM signal with constant amplitude Less prone to noise
14 9 (a) Sensor 1 Sensor 2 Sensor P Q R Output (b) (i) Cannot provide enough current 1 9 (b) (ii) Transistor (any type) 1 9 (c) (i) 100 x = 00 ma 2 9 (c) (ii) 12 ( x 2.2) = 5.4 V 2 9 (c) (iii) P = V x I = 5.4 x 0.1 = 0.54 (W) Total power = x 0.54 = 1.62 W 14
15 9 (d) (i) (d) (ii) Two pairs of gates Two inputs to 1 pair Third input NANDed with output of first pair 15
16 Level Marks Descriptor 9 (e) an answer will be expected to meet most of the criteria in the level descriptor - answer is full and detailed and is supported by an appropriate range of relevant points such as those given below - argument is well structured with minimal repetition or irrelevant points - accurate and clear expression of ideas with only minor errors in the use of technical terms, spelling, punctuation and grammar - answer has some omissions but is generally supported by some of the relevant points below - the argument shows some attempt at structure - the ideas are expressed with reasonable clarity but with a few errors in the use of technical terms spelling, punctuation and grammar - answer is largely incomplete, it may contain some valid points which are not clearly linked to an argument structure - unstructured answer - errors in the use of technical terms, spelling, punctuation and grammar or lack of fluency 5 An example of the type of answer that may be produced would be: Point X should be connected to the input to the gates and 0 V should be connected to the zero volt line of the logic subsystem. With the skittle in place point X is connected to 0 V so its voltage is low. When the skittle is removed the voltage at X goes high because R is a pull up resistor/connects X to +V S (or explanation involving I and Ohm s Law ) 16
17 10 (a) 10 (b) 10 (c) (i) On (the +ve edge of) each clock pulse the counter changes each output High in turn. And returns the previous input back to Low. On the 6 th pulse Q 6 goes High and resets to counter to restart the sequence. Timing resistor & capacitor connected in series Resistor to +Vs and capacitor to 0V Link from RC connection to Threshold pin And to Discharge pin Rearrange monostable formula R = T (1.1 C) Substitution Obtains correct value of R = 826 k 4 10 (c) (ii) (Grey & Red) Yellow, Gold 10 (d) The counter produces a +ve pulse when Q 6 goes high to reset. A 555 monostable requires a ve pulse to trigger. The NOT gate inverts the reset pulse from the counter to trigger the monostable. 17
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