APLICACIÓN N DEL CONTROL EN MODO DE DESLIZAMIENTO EN SISTEMAS DE CONVERSIÓN DE ENERGÍA

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1 1 APLICACIÓN N DEL CONTROL EN MODO DE DESLIZAMIENTO EN SISTEMAS DE CONVERSIÓN DE ENERGÍA Domingo Biel Solé Advanced Control of Energy Systems (ACES) Institto de Organización y Control (IOC) Universitat Politècnica de Catalnya (UPC) Barcelona, Spain

2 2 Otline 1. SLIDING-MODE CONTROL OVERVIEW 2. ENERGY CONVERSION APPLICATIONS DC/AC POWER CONVERSION PARALLELING INVERTERS

3 3 Sliding Mode Control Overview Example: && x k x& = k > ( ) = k x sign s s = c x x& k, c> = k x 1 = k x 1 1 ( ) = k x sign s s = c x x&

4 Example: Sliding Mode Control Overview && x k x& = k > ( ) = k x sign s s = c x x& k, c> Characteristics the order of the motion eqation is redced, althogh the original system is governed by a nonlinear second eqation, the motion eqation of sliding mode is linear, sliding mode does not depend on the plant dynamic and is determined by parameter c selected by a designer. Remark System dynamics is not defined on s = 0, however 4

5 5 Sliding Mode Control Overview Example: x& = 0.3 x x x& x x 3 2 = ( ) = sign x s s= x x 1 sign fnction obtained satrating a linear fnction. sign fnction obtained as an hysteresis. Uniqeness problem.

6 6 Sliding Mode Control Overview Example: x& = 0.3 x x x& x x 3 2 = ( ) = sign x s s= x x 1 The niversal approach to reglarisation consists in introdcing a bondary layer s < arond the manifold s = 0, where an ideal discontinos control is replaced by a real one sch that state trajectories rn inside the layer. If, with tending to zero, the limit of the soltion exists, it is taken as a soltion of the ideal sliding dynamics. Ideal sliding motion is regarded as a reslt of limiting procedre with all non-idealities tending to zero.

7 7 Sliding Mode Control Overview Example: x& = 0.3 x x = x& x x = sign( x1 s) s= x x 1 2 The sliding dynamics obtained by sing the eqivalent control agree with Filipov dynamics in the particlar case of control systems affine in the control inpt. Filipov dynamics: x& = 0.1 x 1 1 Eqivalent Control dynamics: x& = 0.2 x 1 1 Ideal Sliding Mode (niqeness) exits for systems affine in the control

8 8 ENERGY CONVERSION APLICATIONS: 1. DC/AC POWER CONVERSION (SWITCHING FREQUENCY TOPICS IN SLIDING MODE CONTROL)

9 Sliding Mode Control Implementation Power converter schematic circit DC inpt voltage 1 3 L i AC otpt voltage E 2 4 C R - vo Controlled switches Switching freqency of the actator can not be infinite High switching freqency cases poor energy efficiency The switching freqency has to be bonded Which is the best alternative? How do we get the best implementation? 9

10 How can Sliding Mode Control be implemented? Sliding Mode Control min max Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD =0 ė Phase Plane The system dynamics can achieve the desired behavior Eqilibrim Point e Infinite switching freqency, ths no applicable How can we implement the control derived from th sliding mode approach? 10

11 11 How can Sliding Mode Control be implemented? Sliding Mode Control min max Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD Bondary Layer min max Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD

12 How can Sliding Mode Control be implemented? Bondary Layer min max Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD =0 ė Phase Plane In the case of Bondary Layer there is no switching action Eqilibrim Point e No sliding mode Cannot be applied to inherently switching system12

13 13 How can Sliding Mode Control be implemented? Sliding Mode Control min max Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD Psedo-sliding sliding mode or Qasi-sliding sliding mode??? Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD

14 How can Sliding Mode Control be implemented? Sliding Mode Control =0 ė Phase Plane Eqilibrim Point e Psedo-sliding sliding mode or Qasi-sliding sliding mode =0 ė Phase Plane Chattering appears How can we redce the chattering? Eqilibrim Point e 14

15 Sliding Mode Control implementation approaches First Approach (Zero Order Hold) ZOH min () max Inverter de( t = λ e( dt Switching Srface - vo Vref LOAD =0 = (x) T T T T T (x, = (x) Digital (Sampled) implementation Easy implementation Variable switching freqency Only can be applied when Switching period >> ZOH period 15

16 Sliding Mode Control implementation approaches Second Approach(Hysteresis bandwidth. Bhler, 1986; Carpita,, 1996; Nicolas, 1995) min max Inverter de( dt () t = λ e( Switching Srface - vo Vref LOAD S t1 t2 h h - S 2 h Easy analog implementation T Variable switching freqency t 16

17 Sliding Mode Control implementation approaches Third Approach min max Inverter de( dt () t = λ e( Switching Srface Variable hysteresis Bandwidth (Hysteresis variable bandwidth. Riz, 1990; Chiarelli,, 1993; Malesani,, 1996) - vo Vref LOAD Variable switching freqency in a fixed hysteresis Bandwidth Fixed Switching freqency in a variable hysteresis Bandwidth fc h g( x ) X 2 h α ( eq)(. eq ) ( ) = ( eq)(. eq ) ( ) = fc = 1 g( x ) 2α X Analog implementation cmbersome - Depends on converter parameters 17

18 18 Sliding Mode Control implementation approaches Forth Approach (Adding external signal. Silva, 1993; Nicolas, 1996; Pinheiro,, 1994) T d min () max Inverter de( t = λ e( dt Switching Srface D d T d - External synchronism signal vo Vref LOAD - D h h xed Switching freqency h h & lim T d Needs an external signal generato

19 Sliding Mode Control implementation approaches Fifth Approach (Eqivalent control. Sira-Ramirez, 1989) PWM Dty-cycle Inverter Eqivalent Control vo Vref LOAD =0 ė Phase Plane The eqivalent control is the theoretical vale of the control when the system is in sliding mode Analog implementation withot ZOH Eqilibrim Point e d( k) = eq( t ) t= ( k d ) T kt (kd)t (k1)t 19

20 Sliding Mode Control implementation approaches Fifth Approach (Eqivalent control. Sira-Ramirez, 1989) PWM ZOH Inverter Dty-cycle Eqivalent Control vo Vref LOAD =0 ė Phase Plane The eqivalent control is the theoretical vale of the control when the system is in sliding mode Digital (Sampled) implementation with ZOH Eqilibrim Point e d( k) = eq( t= kt kt (kd)t (k1)t 20

21 Sliding Mode Control implementation approaches Alternative approach. (ZAD control. Fossas, 2000; Ramos, 2003) S(x, PWM Dty-cycle ZAD Algorithm Inverter de( t ) S dt () t = λ e( t ) Vref The ZAD performs a PWM and yields a dty-cycle garanteeing - vo LOAD dt T t ( K 1) T 1 S( x, = S( x, τ) dτ = T KT Zero Average Dynamics for the switching srface 0 21

22 Sliding Mode Control implementation approaches Alternative approach. ZAD control. Remarks S1 S(x, S & = The control algorithm needs to estimate the switching srface derivatives dt S & = T t d = 1 S& & 1 2 = S = S& S T = The dty-cycle is a non-linear fnction of S1 Needs a digital implementation 22

23 Comparative stdy among the different approaches Power converter schematic circit DC inpt voltage E L i C R - vo AC otpt voltage Controlled switches Simlation parameters: E=50V, L=1.5mH, C=60µF, R=20Ω Sliding mode control Switching srface dvref ( dvo S( x = k p ( Vref ( vo) kd dt dt Control law 1 if S( x, > 0 = 1 if S( x, < 0 Steady sliding motion vo Vref ( = A sin(2πf, Simlation parameters: k p =0.5, k d =0.8e- = Simlation parameters: A=40V, f=50hz 23

d( k) = eq( t ) t= ( k d ) T Comparative stdy among the

T (kd)t (k1)t Minimm error h S - h Eqivalent control withot

5kHz) D The worst one Second one d = 1 S(x, S& S& 2 = = S& S T

24 d( k) = eq( t ) t= ( k d ) T Comparative stdy among the different approaches Voltage error simlation reslts Third one T (kd)t (k1)t Minimm error h S - h Eqivalent control withot ZOH (20kHz) h=1 (max. switching frec. 22.5kHz) D The worst one Second one d = 1 S(x, S& S& 2 = = S& S T = Sd T d S - 2 h Fixed Hysteresis Bandwidth with external signal (20kHz) ZAD (20kHz) dt T 24

envelope as the eqivalen control (withot ZOH) an corresponds to the variabl

25 Comparative stdy among the different approaches Switching srfaces behavior Eqivalent control withot ZOH (20kHz) Variable Hysteresis Bandwidth ZAD presents the same envelope as the eqivalen control (withot ZOH) an corresponds to the variabl hysteresis bandwidth for 20kHz Fixed Hysteresis Bandwidth with external signal (20kHz) ZAD (20kHz) 25

5 de to the ZOH effect Worse error Switching srface Eqivalent control

26 Comparative stdy among the different approaches The voltage error for the eqivalent control strategy grows p from 0.1 to 0.5 de to the ZOH effect Worse error Switching srface Eqivalent control with ZOH (20kHz) Voltage errors and switching srfaces Better error Switching srface ZAD (20kHz) 26

27 Comparative stdy among the different approaches The voltage error for the ZAD strategy grows p from 0.2 to 1 when the switching freqency decreases from 20kHz to 10kHz Error Switching srface Eqivalent control withot ZOH (10kHz) Voltage errors and switching srfaces Error Switching srface ZAD (10kHz) 27

voltage error peak are qite similar as well Error Eqivalent control with ZOH

28 Comparative stdy among the different approaches Both strategies present similar switching srface behaviors (de to the sampling freqency of the ZOH) and the voltage error peak are qite similar as well Error Eqivalent control with ZOH (10kHz) Switching srface Voltage errors and switching srfaces Error Switching srface ZAD (10kHz) 28

29 How can Sliding Mode Control be implemented? Analog circitry Digital devices Hysteresis bandwidth Example 1 29

30 DC inpt voltage (x, How can Sliding Mode Control be implemented? Analog implementation E 1 2 Controlled switches 3 4 L i i c = C dv C dt o R - vo AC otpt voltage Hysteresis Bandwidth Comparator S(x, Signal conditioner and switching srface vo Vref ( = A sin(2πf E=50V, L=1.5mH, C=60µF, R=20Ω, A=40V Switching srface S = 0.5 ( Vref vo) d ( Vref vo) dt 10kΩ -Vo/10 R1 Vref/10 10kΩ _ 50kΩ 10kΩ 10kΩ 50kΩ R3-5V 5V 680pF 10kΩ Vref/10 10nF 10kΩ 10kΩ _ 10kΩ R2 10kΩ 10kΩ _ 50kΩ 10kΩ _ ic*5e-3 Vc Crrent sensor Vc=ic*2.14[V] 428Ω LA25-NP, S=5mA/A S(x, 30

31 How can Sliding Mode Control be implemented? Analog implementation E=50V, L=1.5mH, C=60µF, R=20Ω, A=40V Min. switching freq. = 15kHz Experimental reslts THD= % Simlation reslts v o v ref v o 20 e 10 0 maximm error of 1 % Otpt voltage (10V/div), reference (deliberately shifted 180º) (10V/div) and voltage error (1V/div) 31

32 How can Sliding Mode Control be implemented? Analog implementation E=50V, L=1.5mH, C=60µF, R=20Ω, A=40V Min. switching freq. = 15kHz Experimental reslts Fast recovery response 40 Simlation reslts v o 30 v o 20 i o 10 0 i o Otpt voltage (10V/div) and otpt crrent (0.5A/div) Step load change from R to R=20Ω 32

33 How can Sliding Mode Control be implemented? Analog circitry Digital devices Hysteresis bandwidth ZAD Qasi-sliding mode Example 1 Example 2 33

34 DC inpt voltage (x, How can Sliding Mode Control be implemented? Digital implementation E 1 2 Controlled switches E=65V, L=1.5mH, C=60µF, R=10Ω, A=50V 3 4 L i i c = C dv C dt o R - vo AC otpt voltage Digital control board (FPGA) S(x, Signal conditioner and switching srface vo Vref ( = A sin(2πf -Vo/10 Vref/10 10kΩ 10kΩ R1 _ 50kΩ 10kΩ 50kΩ R3 10kΩ -5V 5V 680pF 10kΩ FPGA Xilinx XC4010E-3-PC84 8-bit analog-to-digital converters A 32 Kbytes EEPROM memory An external 6MHz clock 10nF 10kΩ Vref/10 _ 10kΩ _ ic*5e-3 Vc Crrent sensor 428Ω LA25-NP, S=5mA/A Vc=ic*2.14[V] 10kΩ 10kΩ 10kΩ 10kΩ R2 _ 50kΩ S(x, 34

35 How can Sliding Mode Control be implemented? Digital implementation Schematic algorithm procedre Sampling freqency=2/t=46 khz Processing time Switching freqency=1/t=23 khz S da T S2 d T T/2 t S1 T S3 T The implemented algorithm considers S1, S2 and S3 samples and the former dtycycle da to estimate the switching srface derivatives and yields the dty-cycle in less than 10% of the switching period S1 and S3 are sampled 166 nsec. before the switching action to avoid the switching noise 35

36 How can Sliding Mode Control be implemented? Digital implementation E=65V, L=1.5mH, C=60µF, R=10Ω, A=50V Switching freqency = 23kH Experimental reslts THD= % Simlation reslts v o v ref v o v ref S S maximm error of 1 % Otpt voltage (20V/div), reference (deliberately shifted 180º) (20V/div) and switching srface (1V/div) 36

37 How can Sliding Mode Control be implemented? Digital implementation E=65V, L=1.5mH, C=60µF, R=10Ω, A=50V Experimental reslts The control tracks the reference signal in less of a twentieth of the otpt period Switching freqency = 23kH Simlation reslts v o v o i o i o Otpt voltage (20V/div) and otpt crrent (5A/div) Step load change from R to R=10Ω 37

control 23kHz 46kHz 69kHz ZAD Qasi-sliding mode

38 38 How can Sliding Mode Control be implemented? 15kHz 60kHz Hystesis Bandwidth Qasi-sliding mode control 23kHz 46kHz 69kHz ZAD Qasi-sliding mode control Control signal spectrm (10dB/div) of the inverter

39 39 ENERGY CONVERSION APLICATIONS: 2. PARALLELING INVERTERS (MULTIVARIABLE SLIDING MODE CONTROL DESIGN)

40 DC VOLTAGE SOURCE DC 1 DC Modlar power conversion system INVERTER DC-AC 1 INVERTER DC-AC m AC VOLTAGE AC LOAD BENEFITS IN USING A MODULAR STRUCTURE (PARALLEL-CONNECTED DC-AC POWER MODULES) TOTAL INSTALLED POWER CAN BE INCREASED BY ADDING MODULES DEVICE STRESSES REDUCTION FOR A FIXED POWER CAPABILITY REDUNDANT MODULES CAN BE INCLUDED (FAULT-TOLERANT MODULAR STRUCTURES) VOLTAGE SOURCE DC n INVERTER DC-AC n POWER MANAGEMENT AND REALIABILITY IMPROVEMENT COST: INCREASED SAME INVERTERS OUTPUT VOLTAGE DUE TO PARALLEL-CONNECTION 40

41 DC DC-AC 1 P 1 Control Objectives AC AS FOR A SINGLE INVERTER: VOLTAGE SOURCE DC 1 DC VOLTAGE SOURCE DC n CONTROL 1 DC-AC m P m CONTROL m DC-AC n P n CONTROL AC VOLTAGE LOAD LOW OUTPUT VOLTAGE THD OUTPUT VOLTAGE AMPLITUDE REGULATION IN FRONT OF INPUT VOLTAGE AND LOAD PERTURBATIONS FAST DYNAMICS ADDITIONNALY, POWER MANAGEMENT STRATEGIES REQUIRE A NEW CONTROL OBJECTIVE: CONTROLLABLE POWER SHARING AMONG THE DIFFERENT INVERTER MODULES EXAMPLE: EQUAL CURRENT SHARING INVERTER CURRENT CONTROL CONTROL n 41

42 min () max Master-Slave Sliding mode control approach MASTER Inverter de( 1 t = α e( dt Switching Srface il1 - vo Vref LOAD min min max max SLAVE Inverter () t = il il ( ) 2 ( 2 1 t Switching Srface SLAVE Inverter () t = il il ( ) 3 ( 3 1 t il2 il3 Master-Slave (M-S) switching srface Proper control law 1 2 N () t () t de( = α e( dt = il ( il ( M 2 () t = il ( il ( Steady-state sliding behavior e 0 vo ( Vref ( il 1( = il2( = L = iln ( N 1 1 Switching Srface Otpt voltage reglation Balanced crrent-sharing 42

43 SWITCHING SURFACES 1 2 de( t ) () t = α1 α 2 dt () t = β ( il ( t ) il ( t )) ( α > 0, α > 0, β > 0 ) 1 Analysis of the two inverters case: Control law design THE CONTROL DESIGN MUST ENSURE THAT i, i 2 IS A LYAPUNOV FUNCTION e( t ) i d i dt d i dt < 0 d1 dt d 2 dt = h = m ( x) α 1 E C T 1 L Terms depending only on the state variables 1 L1 ( x) β E L 1 L PARALLEL-INVERTER DYNAMICS: dil rl 1 E = i v L o 1 dt L L L dil rl 1 E = i v 2 2 L o 2 dt L L L dv o = il il v ( C C C ) 1 2 dt C C R C T T L T 2 0 T 1 2 BOTH CONTROLS ARE INVOLVED IN THE SWITCHING SURFACE DERIVATIVES. CONTROL COUPLING THREE POSSIBILITIES TO OVERCOME THE PROBLEM: 1. SWITCHING SURFACES REDEFINITION TO AVOI COUPLING AND PRESERVING THE DESIRED STEADY-STATE 2. APPLICATION OF THE HIERARCHICAL SLIDING-MODE CONTROL 43

44 Lyapnov fnction approach design min () max MASTER Inverter de( 1 t = α e( dt Switching Srface SLAVE Inverter il1 il2 - vo Vref LOAD The design of the control law in a sliding mode M-S strategy is solved by means of Lyapnov fnction approach.. min max ( = il il ( ) 2 2 ( 1 t Switching Srface min max SLAVE Inverter ( = il il ( ) 3 3 ( 1 t Switching Srface il3 otpt voltage (20v/div), reference (deliberate 44

45 45 Lyapnov fnction approach design 1 Experimental reslts 2 3 (VARIABLE SWITCHING FREQUENCY) The design of the control law in a sliding mode M-S strategy is solved by means of Lyapnov fnction approach.. Switching srfaces behavior

46 Decopling control design: ZAD applied to MIMO system 1 Experimental reslts 2 3 Switching srfaces behavior The design of the control law in a sliding mode M-S strategy is solved by means of Lyapnov fnction approach.. However. S(x, (VARIABLE SWITCHING FREQUENCY) dt The controls are copled and the ZAD algorithm can not be applied d T t = 1 S& & 1 2 = S = S& = 46 S T

47 Decopling control design: ZAD applied to MIMO system 1 2 Copled controls The ZAD algorithm can not be applied Experimental reslts (VARIABLE SWITCHING FREQUENCY) 3 The problem is solved by redefining the switching srfaces by means of a linear transformation: S = M The controls are decopled and the ZAD algorithm can be applied to each Si 47

48 Decopling control design: ZAD applied to MIMO system 1 2 Copled controls The ZAD algorithm can not be applied Experimental reslts (VARIABLE SWITCHING FREQUENCY) 3 S 1 S 2 Switching srfaces Redefinition S = M Decopled controls The ZAD algorithm can be applied to each Si S 3 48

49 49 Implementation considerations of the ZAD parallel-connected inverters rl1/2 L1/2 il1 AC otpt voltage E1 C1 RL vo DC inpt voltage rl1/2 L1/2 - rln/2 LN/2 iln EN CN (x, rln/2 LN/2 Controlled switches Digital control board (FPGA) Signal conditioner (O.A. conventional circitry) Vref ZAD control implementation FPGA flexibility enables the addition of: power management strategy (load power demand) interleaving on indctor crrents Delivers the set of the switching srfaces Si to the ADC

50 50 Simlation and experimental reslts Experimental reslts Switching freqency = 23kHz E1=E2=E3=70V,C1=C2=C3=20µF,L1=1.5mH,L2=1.22mH,L3=0.9mH,A=55V,f=50Hz,R L =5Ω Otpt voltage reglation THD=0.3 % Simlation reslts V o V o e e maximm error of 1 % V ref V ref Otpt voltage (20V/div), reference (deliberately shifted 180º) (20V/div), and error voltage (500mV/div)

51 51 Simlation and experimental reslts Experimental reslts Switching freqency = 23kHz E1=E2=E3=70V,C1=C2=C3=20µF,L1=1.5mH,L2=1.22mH,L3=0.9mH,A=55V,f=50Hz,R L =5Ω Crrent-sharing among the single inverters Simlation reslts i L1 i L1 i L2 i L3 i L2 i L3 Indctor crrents (2A/div)

52 52 Simlation and experimental reslts Switching freqency = 23kHz E1=E2=E3=70V,C1=C2=C3=20µF,L1=1.5mH,L2=1.22mH,L3=0.9mH,A=55V,f=50Hz,R L =5Ω Experimental reslts INTERLEAVING i L1 i L1 ZOOM i L2 i L2 i L3 i L3 Indctor crrents (2A/div)

53 Simlation and experimental reslts Switching freqency = 23kHz E1=E2=E3=70V,C1=C2=C3=20µF,L1=1.5mH,L2=1.22mH,L3=0.9mH,A=55V,f=50Hz,R L =5Ω Experimental reslts Fast dynamic response Simlation reslts V o V o i o i o Otpt voltage (20V/div) and otpt crrent (5A/div) Step load change from open circit to R L =5Ω 53

54 Simlation and experimental reslts Experimental reslts V o Non-linear load THD=0.6 % Switching freqency = 23kHz E1=E2=E3=70V,C1=C2=C3=20µF,L1=1.5mH,L2=1.22mH,L3=0.9mH,A=55V,f=50Hz,R L =5Ω V o i o e V ref Otpt voltage (15V/div) and otpt crrent (5A/div) for a fll-wave rectifier load Otpt voltage (15V/div), reference (deliberately shifted 180º) (15V/div) and voltage error (500mV/div) 54

55 55 Simlation and experimental reslts Switching freqency = 23kHz E1=E2=E3=70V,C1=C2=C3=20µF,L1=1.5mH,L2=1.22mH,L3=0.9mH,A=55V,f=50Hz,R L =5Ω Experimental reslts V o POWER MANAGEMENT V o i L1 i L1 i L2 i L2 i L3 gradal step variation from 20 to 50V i L3 from 40 to 50V Indctor crrents (traces 2 to 4-5A/div) of the inverter modles for an otpt voltage (trace 1-100V/div)

Chapter 5 Design of a Digital Sliding Mode Controller

Chapter 5 Design of a Digital Sliding Mode Controller In chapter 4 the linear controllers PID and RST are developed to reglate the Bck converter pt voltage. Frthermore based on the PID and RST control