REAL TIME COMPUTATION OF DIFFERENCE EQUATIONS

Transcription

1 REAL TIME COMPUTATION OF DIFFERENCE EQUATIONS Carlos Celaya Borges, Jorges Illescas Chávez, Esteban Torres León, Artro Prieto Fenlabrada Institto Tecnológico de Pebla, Universidad Atónoma de Pebla Abstract A system for real time comptation of difference eqations is presented. The prototype was implemented with a PIC18F458 microcontroller; two applications are presented. First, by means of basic fnctions: adder, delay and attenator, a complex adio processor was achieved. The second application, a digital control of a third order plant is implemented. The analog otpts are derived from a plse width otpt of PWM signals and then an external A/D converter was not reqired. The program was written in C langage. As a reslt, we get a compact device programmable for adio processing and control. 1. Introdction Some adio effects can be achieved by sperposition of the original signal and its echo; an echo is a delayed version of the original signal. By this simple processing we get some very sefl effects sch as reverberation and different inds of echoes. In the second application a digital control of an analog plant is presented. Initially we made a stability analysis of the plant to be controlled and an analog compensator is proposed. Then an eqivalent digital control is designed. A difference eqation modeled both, the adio processing and the digital control. The difference eqation mst be compted in real time. Matlab control toolbox was sed as a theoretical spport; experimental reslts were also simlated in Matlab and compared. The microcontroller system presented is sed for control and adio practices. 2. System Organization Figre 1 shows the organization of the prototype. The microcontroller acqires information throgh an adio amplifier that is sed for inpt signal conditioning. The Microchip PIC18F458 [1] was sed in this application; it provides the basic elements of a compter, lie CPU, memory for program and data, inpt/otpt ports and additionally provides a 1 bits AD converter, a 1 bits PWM modle and a CCP modle; CCP is sed to tae samples of the inpt channel, with a constant sampling period. An external memory was sed to implement large delays. An analog otpt signal is prodced by means of a low pass filter (LPF) and an adio amplifier. S/H Sampling Freqency Generator LPF and Adio Amplifier Conversion A/D. MICROCONTROLLER PIC18F458 Adio Amplifier D/A Conversion (PWM) Figre 1. Prototype Organization Resident program 2.1 RAM and Microcontroller Fnctions External RAM In this section, a first in-first ot strctre (FIFO) and some microcontroller fnctions are described: 1) A/D converter, 3) Captre/Compare/PWM (CCP) modle and 4) Resident program. To generate long time delays, a FIFO implemented in an external RAM was inclded. The interface between the microcontroller and FIFO is implemented by for variables in the program: two pointers (FIFO and L) and two registers (IREG and OREG). FIFO pointer contains the actal address to read and write to the FIFO. The L register indicates the length of the FIFO. The IREG is sed to contain the last read data; and the OREG mst contain the data to be written. Two operations are applied Page 137 ISBN:

2 to the FIFO strctre: RESET and SAVE. With a RESET operation, the pointers are left in its initial vales: FIFO and Llength of the FIFO. The SAVE operation is exected at three consective steps: first, a data is fetched from RAM to IREG; second, the data in OREG is written to RAM; and third the FIFO pointer is incremented. When the FIFO pointer reaches the vale of register L, a cero vale mst be loaded to the FIFO pointer. The 1 bits A/D converter is preceded by a Sample and Hold (S/H) modle controlled by the GO/DONE bit in a special fnction register. The S/H is normally in the sampling state, bt when the GO bit taes tre vale, the S/H goes to the Holding state while the A/D is completing a conversion. When the A/D conversion is done the DONE bit is set and the S/H retrns to the sampling state. The CCP modle was configred in the compare mode to generate a fixed time interval for sampling and CPU interrption, simltaneosly. Now, consider the PWM modle. The PWM freqency is given with a 1 bit nmber. The analog information is carried in the plse width of the PWM signal, and is given as a 1 bit nmber too. A low pass filter (LPF) recovers the analog information from the PWM signal. The LPF mst have the bandwidth of the adio or control system and a ctoff freqency less than the PWM freqency [2]. Finally, the resident program configres the system at reset and remains waiting for interrpt events. The interrpt service program reads in the samples from the analog channel and save samples in the FIFO. At the service time all comptations are done and the reslting vale are otptted. This program was implemented in C langage [3, 4] 2.2 Using External Memory The prototype is configred to drive p to 16K bytes of external RAM. PORTD is sed as a bidirectional data bs. The address bits are generated with 6 bits of PORTB and 8 bits of a Gal s implemented binary conter. PORTE generates the control signals (Write Enable, Chip Select and Otpt Enable). The memory is organized in 64 pages, with 256 samples per page. The page nmber is given at PORTB, and the conter rides throgh each page. The delay corresponding to a page corresponds to the timeof 256 samples. 3 Application 1: Adio Processor The hman ear detects easily the echo [5] when the sond bonces to a sfficient distance to generate a delay of approximately 58 ms. In order to simlate the echo, the FIFO strctre is sed; the sampled signal retrieved from the FIFO is a echo signal (delayed version of the original signal). Sampled data is stored in the external memory (FIFO) dring the interrpt service rotine to the rate of the sampling freqency. In this way, the delay obtained by means of the FIFO is obtained mltiplying the length of the FIFO by the sampling period. Then, if there were in se a memory of 16K bytes and the sampling period is of 5 s, the delay will be.8192 seconds. The amont of delay is given by N, and corresponds to the nmber of pages of the external memory assigned to save the samples. To create applications, a bloc diagram is written with the desired processing. From the diagram the eqations to be inclded in the resident code are obtained. In the crrent stage of development of the prototype, two adio processing applications were implemented and are presented in next sections. 3.1 Echo The bloc diagram in Figre 2 shows ors first example of processing. Adding the crrent adio signal e to a delayed version, the effect of an echo signal is generated: y e + (1) This eqation is introdced in the resident code, given in a simplified form in Table 1. The parameter N corresponds to the nmber of samples or capacity of the external RAM tilized, and mst be adjsted to generate the desired effect. As an example of the reslts of a Matlab simlation, the effect of N1 (x256) is shown in Figre 3. In the pper graph we see the first 35 samples of an adio signal, and in the lower graph the same signal is shown shifted by 256 samples. Additionally, Matlab reprodces the sond signal in the Personal Compter and it can be compared with the prototype. e Z -N + Figre 2.Echo y Page 138 ISBN:

3 Pass Action 1. Define initial conditions: (). 2. Reset Interrpt Reqest Flip-Flop (IRQFF) Reset Over rn Flip-Flop (OVRFF) 3. Set Enable Interrpt Flip-Flop (EIFF) 4. If OVRFF 1 {Process is halted}; else wait for an interrpt. Interrpt Service Rotine (ISR): 5. Reset IRQFF 5. y < e + 6. Send y to D/A 7. If IRQFF1 {OVRFF1;} 8. EXIT Table 1. Difference Eqation for echo Comptation: y e Pass Action 1. Define initial conditions: (). 2. Reset Interrpt Reqest Flip-Flop (IRQFF) 3. Set Enable Interrpt Flip-Flop (EIFF) 4. If OVRFF 1 {Process is halted}; else wait for an interrpt. Interrpt Service Rotine (ISR): 5. Reset IRQFF 5. x y e + >> 1 + >> 2 e + >> 1 + >> 2 + >> 3 6. Send y to D/A 7. If IRQFF1 {OVRFF1;} 8. EXIT Table 2. Difference Eqation for reverberation: y G * x N + H * Figre 3 Matlab simlation: Original and echo signals 3.2 Reverberation To obtain reverberation, in Figre 4, the echo signal is attenated and fed bac to the inpt stage to generate a damping effect [6, 7, 8]. At the otpt stage the original signal is added with the damped echo to generate reverberation. The parameters G and H given in (2) and (3) are adjsted for a desired effect. The difference eqation to be compted is given in (2). y G * x N + H * The parameters G and H are given at eqations (3). The mltipliers: 2-1, 2-2, 2-3, are sed to mae the calclations shifting rather than floating point arithmetic. (2) G H (3) e x G + + H Z -N Figre 4.Reverberation y The eqations (4, 5) are sed for reverberation in C langage notation. In these expressions, right shifting of 1, 2 and 3 places is sed to achieve the reslts for reverberation. The program is shown in Table 2. x e + >> 1 + >> 2 (4) y e + >> 1 + >> 2 + >> 3 (5) Page 139 ISBN:

4 Figre 5 shows the reslts of a Matlab simlation, with N1. In the pper graph we see the first 35 samples of an adio signal; the middle graph shows the echo signal shifted by 256 samples and finally, in the lower graphs the attenated echo signal. Additionally, Matlab reprodces the sond signal in the Personal Compter and it can be compared with the prototype The stability analysis, withot a compensator, G C (s)1, indicates an oscillatory system: 21 o of phase margin (PM), 12.5 Decibels of gain margin (GM), 55% overshoot at.7 ms and a 4.14 ms of settling time. The continos proportional integral (PI) compensator given at eqation (7) garantees a very stable system with 81.8o of phase margin (PM), 52.5 Decibels of gain margin (GM), 7% overshoot at 5 ms and 176ms of settling time..1s +. 1 G C ( s) s (7) R(t) + _ E(t) G C (s) U(t) G P (s) Y(t) a) Continos control Figre 5.Matlab simlation: original, echo and damped echo signals. R(t) E() + _ G C (z) U() G P (s) Y(t) 4 Application 2: Digital compensator Figre (6a) shows a continos feedbac control system that can be bilt sing analog electronics. The continos controller can be replaced by a digital controller as shown in figre (6b), that performs the same control tas as the continos controller. The basic difference between these controllers is that the digital system operates on discrete signals (or samples of the sensed signal) rather than on continos signals. In this section an approach to the design of a digital control is presented sing the Matlab control tool box [1, 11]. First, a stability analysis evalates the continos plant system, withot compensation; next, the addition of a continos control is proposed. Finally an eqivalent digital control is fond to replace the continos control. The plant to be controlled is given by the third order continos transfer fnction in eqation (6). ( s) s where: ( 1+ s T ) (1 + s T ) G P (6) 1 T sec; 2 T sec. b) Digital control system Figre 6 Feedbac control systems The discrete eqivalent to the continos transfer fnction (7), sing 1 ms of sampling period and the zero order hold method is given in Eqation (8). U ( z).1.1z G C ( z) (8) E( z) 1 z The corresponding bloc diagram for G C (z) is shown in figre 7. The difference eqation to the discrete transfer fnction (8) is given at eqation (9); this difference eqation mst be evalated in real time as shown in an a simplified form in the program in Table 3. (9) +.1e. 1e The step response for both, the continos and discrete compensated systems are shown in figre 8; a Page 14 ISBN:

5 Tstin discrete model was sed to simlate the continos plant. e().1 + z -1 x 1 ( () period of the A/D converter and it determines that the bandwidth (BW) of the low pass filter in the otpt. BW mst be less than 4 Hz for adio processing and 1 Hz for the digital compensator. Interfacing 16 K RAM needs 14 bits address bs and 8 bit data bs. The address bs is generated by means of 6 bits of the port B of the µc (of RB7 to RB2) and 8 bits of a binary conter implemented with a GAL22V1D. The data transfer between microcontroller and memory is controlled by means of a program implementing a FIFO strctre Step Response Figre 7 Bloc diagram for G C (z) Pass Actions 1. Define initial conditions: x 1 (). 2. Reset Interrpt Reqest Flip-Flop (IRQFF) 3. Set Enable Interrpt Flip-Flop (EIFF) 4. If OVRFF 1 {Process is halted}; else wait for an interrpt. Interrpt Service Rotine (ISR): 5. Reset IRQFF 5. <.1 * e + x 1 6. Send to D/A 7. x 1 < -.1 * e If IRQFF1 {OVRFF1;} 13. EXIT Table 3. Difference Eqation for Digital Control Comptation: +.1e. 1e 5 Prototype Implementation The prototype (Fig. 9) consists of five elements: PIC18F458, RAM, GAL22V1D and two adio amplifiers (Figre 4). Additionally, 9V-DC is the power spply to the adio amplifiers and with a 5V DC voltage reglator the microcontroller (µc) and RAM are spplied. The PIC18F458 of Microchip is the microcontroller sed in this application. Inside the PIC, an A/D converter preceded by a sample and hold (S/H) amplifier is configred with niform sampling period of 51.2 microseconds (µs) for adio processing and 1 ms for the digital compensator. Then for real time signal processing, the processing the mst be achieved in the interval among two samples. The D/A conversion are realized by means of the PWM modle. The PWM period is the same of sampling Amplitde Time (sec) Figre 8 Matlab simlation: step responses for continos and digital compensated systems. 6 Reslts and conclsions As a reslt, we have a compact system, very easy to configre and for programming. The prototype allows the ser to experiment with the sampling rate and with 1 or 8 bits of resoltion. The program warns the ser by means of a led, if the digital processing program exceeds the period of sampling. Before implementing a program, it is possible to simlate the comptations in the Matlab program and therefore it is possible to compare the reslts of the prototype. Additionally, in adio processing The Sond Forge Sond Editor of Sonic Fondry [9], gives several services and effects sing the PC. Digital control can be implemented with specialized digital signal processors, inclding DSPIC s and Real Time Operating Systems may be sed. Some limitations are to be mentioned. The sampling period pts a limit in the time to mae comptations. Then at high sampling freqencies it was necessary to avoid floating point arithmetic. Also, 16 and 24 bits resoltions are not possible in this prototype. Page 141 ISBN:

6 7 References [1] [2] Amar Parcherla, Using PWM to Generate Analog Otpt., Microchip Technology Inc [3] MPLAB C18 C Compiler User s Gide. Microchip Technology Inc. 25. [4] MPLAB C18 C Compiler Libraries. Microchip Technology Inc. 25 [5] Edardo Rene Deantes Anaya, Procesador para la creación de efectos de adio, Tesis de maestría, INAOE, agosto [6] Vinay K. Ingle, John G. Proais, Digital Signal Processing Using MATLAB V.4.: PWS Pblishing Company, [7] Ben Gold, Nelson Morgan, Speech and Adio Signal Processing, John Wiley & Sons, Inc. 2. [8] Kevin Sahill, VHDL for Programmable Logic. Cypress Semicondctor, [9] Pablo Iglesias Simon, Postprodcción Digital de Sonido por Comptadora, Alfaomega 22. [1] Gene F. Franlin and J. D. Powel, Digital Control or Dynamic Systems, Addison Wesley, [11] RA1 RC1 RA RD7 RD6 RD5 RD4 RD3 RD2 RD1 PIC 18F458 RD RB7 RB6 RB5 RB4 RB3 RB2 RE RE1 RB1 RBO RE2 RESET CF CK Q7 Q6 Q5 GAL22V1D Q4 Q3 Q2 Q1 Q LED AUDIO OUTPUT AUDIO INPUT D7 D6 D5 D4 D3 D2 D1 D A13 A12 A11 A1 A9 A8 OE WE CE A7 A6 A5 A4 A3 A2 A1 A RAM Figre 9 Prototype Implementation Page 142 ISBN: