Adaptive Digital Slope Compensation for Peak Current Mode Control. Peter Ide, Frank Schafmeister, Tobias Grote

Transcription

1 IBM Power and Cooling Technology Symposium Adaptive Digital Slope Compensation for Peak Current Mode Control Peter Ide, Frank Schafmeister, Tobias Grote

2 Digital Control at DES CD-BU Full Digital Control Texas Instruments F bit 100 MHz 100-LQFP Performance Cost, Size Freescale F bit 100 MHz 100-LQFP Analog Devices Microchip ADP1043 dspic33f PIC24F 700 khz 24-QSOP 16-bit 40 MHz 28-SOIC 44-TQFP 16-bit 16 MIPS 28-QFN 44-TQFP Piccolo F bit 60 MHz 64-TQFP Piccolo F2803x 32-bit 60 MHz CLA, CAN 64-TQFP Full Digital Semi-Digital Atmel Development ongoing 8-bit 16 MHz 32-LQFP 44-TQFP ATmega HCS08 8-bit 16 MHz 8-SOIC 20-QFN Year ATtiny New Concepts Focus 8-bit 8 MHz 32-LQFP Comm./Logic

3 Digital Control at DES CD-BU Full Digital Control Texas Instruments (DC/DC) F bit 100 MHz 100-LQFP Performance Cost, Size Freescale F bit 100 MHz 100-LQFP Analog Devices Microchip ADP1043 dspic33f PIC24F 700 khz 24-QSOP 16-bit 40 MHz 28-SOIC 44-TQFP 16-bit 16 MIPS 28-QFN 44-TQFP Piccolo F bit 60 MHz 64-TQFP Piccolo F2803x 32-bit 60 MHz CLA, CAN 64-TQFP Full Digital Semi-Digital Atmel 8-bit 16 MHz 32-LQFP 44-TQFP ATmega GUI-Configurable Full Digital Controller HCS08 8-bit 16 MHz 8-SOIC 20-QFN Year ATtiny New Concepts Focus 8-bit 8 MHz 32-LQFP Comm./Logic

4 Digital Control at DES CD-BU Performance Today s Topic Digital Semi Peak Digital Current Control Control Texas Instruments(PFC) Cost, Size Freescale Atmel 8-bit 16 MHz 32-LQFP 44-TQFP ATmega F bit 100 MHz 100-LQFP HCS08 8-bit 16 MHz 8-SOIC 20-QFN Analog Devices Microchip 44-TQFP Processors with On-Chip Comparators Processors with On-Chip Comparators Year ATtiny ADP1043 dspic33f PIC24F 8-bit 8 MHz 32-LQFP F khz 24-QSOP 16-bit 40 MHz 28-SOIC 44-TQFP 16-bit 16 MIPS 28-QFN Piccolo F bit 100 MHz 100-LQFP 32-bit 60 MHz 64-TQFP Piccolo F2803x 32-bit 60 MHz CLA, CAN 64-TQFP Full Digital Semi-Digital Comm./Logic

5 Overview Motivation Review of Peak Current Control with Slope Compensation Digital Slope Compensation Simulation Results Practical Implementation & Measurement Results Conclusion

6 Motivation Advantages of Peak Current Control & Digital Control high control dynamics inherent cycle by cycle current limiting good current balancing of parallel converters flexibility and programmability feasible for adaptive and nonlinear control algorithms decreased number of components and PCB space Idea: Combine these two control techniques Realizable with µcontroller containing on-chip comparators Challenge: Peak current control needs slope compensation to avoid subharmonic oscillation at D > 0.5

7 Overview Motivation Review of Peak Current Control with Slope Compensation Digital Slope Compensation Simulation Results Practical Implementation & Measurement Results Conclusion

8 Peak Current Mode Control Boost converter example (steady state) i i* V ref EA v in i* m 1 i L comparator L -m 2 R S Q D C i L v out i L_min clock DT s T s (1-D)T s t m m 2 1 D = 1 D

9 Peak Current Mode Control Disturbed inductor current (without slope compensation) i i* m 1 -m 2 steady state i 0 i 1 i 2 disturbed Disturbance after n cycles: Condition for stable operation: m i n = m m 2 1 n i 0 ( 0.5) 1 > m2 D < t

10 Peak Current Mode Control Disturbed inductor current (with slope compensation) i i* -m sc compensation ramp steady state i 0 m 1 -m 2 i 1 i 2 disturbed Disturbance after n cycles: i n = m m 2 1 m + m sc sc n i 0 Required compensation: m sc > 1 2 ( m m ) 2 1 t

11 Overview Motivation Review of Peak Current Control with Slope Compensation Digital Slope Compensation Simulation Results Practical Implementation & Measurement Results Conclusion

12 Digital Slope Compensation Idea: Use i L_min and i* to compute the comparator threshold level including slope compensation i i* i cmp -m sc comparator threshold i i cmp cmp = in + m1 = i * m sc DT s DT s i L_min m 1 -m 2 i n i n+1 DT s t i cmp = i * m sc i m * 1 i n + m sc

13 Usage of a compensation factor: Threshold level: Digital Slope Compensation k sc = m sc = m 1 sc sc 1 1 i cmp = + 1+ k V = V sc 1 L L ( * i k i ) What is the proper value for k sc? sc n Buck Boost Buck-Boost minimal required k sc (for stable operation) V out V in 0. 5 V in V out 0.5V V 0.5 out V in in ( V V ) out V in in optimum k sc (for dead beat) V in V out V V V out V V in V out in out in No knowledge of inductance required!

14 Overview Motivation Review of Peak Current Control with Slope Compensation Digital Slope Compensation Simulation Results Practical Implementation & Measurement Results Conclusion

15 Simulation Result (1) Comparison with equivalent conventional slope compensation (steady state) a) i / A i* i switch i*- ramp i L Conventional analog slope compensation 0 b) 15 i / A 10 i* i switch i cmp i L Digital slope compensation t / µs

16 Simulation Result (2) Comparison with equivalent conventional slope compensation (disturbed inductor current) a) i / A i* i switch i*- ramp i L Conventional analog slope compensation 0 b) i / A i* i switch i cmp i L Digital slope compensation t / µs

17 Simulation Result (3) Comparison with equivalent conventional slope compensation (disturbed inductor current & optimum k SC value) a) i / A i* i switch i*- ramp i L Conventional analog slope compensation 5 0 b) i / A i* i switch i cmp i L Digital slope compensation t / µs

18 Overview Motivation Review of Peak Current Control with Slope Compensation Digital Slope Compensation Simulation Results Practical Implementation & Measurement Results Conclusion

19 Practical Implementation Use PWM unit to turn on at each new cycle and to trigger current sampling. v out A/D v ref _ + v err voltage controller i * Use input and output voltage to apply adaptive compensation factor. This Block is optional to gain Dead Beat only compensation factor k sc i L A/D i L_min digital slope compensation This Block contains a very simple Formula Current Control is achieved with lowest computational Effort No DSP core required! i L microcontroller D/A i cmp ADC trigger PWM gate drive

20 Practical Implementation Controlled boost converter v ref Current measurement in switch path A/D _ + v err voltage controller i * A/D adaptive slope compensation factor v in v out L D C current transformer A/D i L_min k sc digital slope compensation D/A i cmp ADC trigger PWM microcontroller

21 Problem: reverse recovery current spike Practical Implementation current spike threshold (i cmp sampling ) instance turn-on instance turn-off due to reverse recovery current spike 1. Impedes instantaneous current sampling Delay current sampling 2. Can force faulty trigger of the comparator Implement leading edge blanking ~i switch (2.5 A/div) sample delay ~i switch (1A/div)

22 Measurement Results Steady state V out = 370V (100 V/div) ~I switch (2,5 A/div) Duty cycle: > 0,8

23 Reference step response Measurement Results

24 Overview Motivation Review of Peak Current Control with Slope Compensation Digital Slope Compensation Simulation Results Practical Implementation & Measurement Results Conclusion

25 Conclusion Microcontroller with on-chip comparators make digital peak current mode control feasible with little effort Slope compensation can be realized with digital algorithms No knowledge of inductance required Adaptive algorithms features adjustable dynamic performance Problems due to reverse recovery current spike can be handled with simple measures

26 Thanks for your attention!