Sequential Designs Using Retiming and Multiple Supply Voltages
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1 Smultaneous and Aerage Power Optmzaton n Synchronous Sequental Desgns Usng Retmng and Multple Supply Voltages A. K. Allam and J. Ramanujam Electrcal and Computer Engneerng Department, Lousana State Unersty, USA (atef, Abstract the supply oltage s consdered as the most effecte approach for mnmzng power/energy consumpton n In ths paper, we present a combnatlon of basc crcuts. Howeer, lowerng the supply oltage retmng and multple oltage schedulng (MVS) ncreases the crcut delay. Parallelzaton and technques n order to optmze dynamc peak power as ppelnng can compensate for the ntroduced delay but well as aerage power consumpton n synchronous at the cost of area oerhead. Usng multple oltages sequental crcuts under tmng constrants. Frst, we schedulng (MVS) technque soles the problem. The dese a mxed-nteger lnear programmng (MILP) dea s to assgn the hghest oltage leel to the formulaton for the problem of schedulng for optmal operatons n the crtcal path to meet the tme peak and/or aerage power consumpton through a constrant and to use a lower oltage leel for the unfcaton of retmng and MVS technques. Then, to operatons n the non-crtcal paths to achee the alleate the problem of arable exploson n MILP, power/energy mnmzaton. we present a two-stage algorthm for peak and aerage power optmzaton. Frst, power-orented retmng s Retmng was ntroduced by Leserson and Saxe [] proposed to restructure the nput SDFG n order to as an optmzaton technque for the synchronous achee parallelzaton to faor nodes wth hgh power sequental dgtal crcuts. Snce retmng can be used consumpton followed by an MILP formulaton for to shorten the crtcal path delay and to ncrease peak and/or aerage power optmzaton usng MVS parallelsm among the computaton nodes, t can be technque. used to ncrease the number of computatonal elements I. Introducton that are canddates for oltage scalng. Hgh-leel synthess (lls) s the process of In combnatonal crcuts, many of the research mappng the behaoral specfcaton of the system nto hae tackled the dynamc power mnmzaton problem regster transfer descrpton. The outcome of hgh-leel such as [5,, 7, 8, 9]. For synchronous sequental synthess s a structural descrpton of the data path and crcuts, many research work hae addressed the a logcal ew of the control unt. Hgh-leel synthess problem of mnmzng the dynamc power (aerage noles three man tasks, schedulng, allocaton, and power) consumpton such as [, 4, 3]. bndng. The central task s the schedulng, whch s the In ths paper, we address the problem of process of determnng at whch control step(s) each mnmzng dynamc peak and aerage power operaton n the DFG executes. Although conentonal consumpton n synchronous sequental crcuts by frst desgn metrcs such as performance, sze and testablty presentng a mathematcal MILP formulaton for the are mportant, the most crucal desgn metrc nowadays exact soluton by smultaneously combnng retmng s power. The demand for long-lfe batteres wthn and MVS for power (peak and/ or aerage) tolerable sze and weght and the relablty of consumpton optmzaton. Ths formulaton s found to ntegrated crcuts are the man factors that dctate the be expense wth a large number of arables resultng low power desgn of embedded systems. Dynamc n long soluton tme; therefore we present an effcent power due to chargng and dschargng n the CMOS two-step approach. We hae dered a polynomal-tme gates s a domnant part n the total power consumpton power-orented retmng that s used frst, followed by n CMOS crcuts and s gen by the followng an MILP formulaton for the resultant retmed crcut equaton wth the objecte of optmzng power consumpton. Pdynamc I a CL Vddfclock, () Expermental results demonstrate that our powerwhere CLs the load capactance at the gate output,f,ock orented retmng approach generates better graph s the crcut clock frequency, Vdds the supply oltage, structure canddates for reducng peak and aerage and a s the aerage number of transtons per clock power consumpton, compared wth [, 3] whch only cycle at the gate output, referred to as the swtchng explot maxmzng the parallelsm among graph nodes. actty. A. Synchronous Crcut Representaton Because of the quadratc relatonshp of the supply A synchronous graph model, C (V, E, d, w), s oltage to the dynamc power consumpton, lowerng used as n [] to model the synchronous sequental /0/$0.O 0(00 IEEE. ICICDTO
2 dgtal crcut; ths s also referred to as a synchronous n that peak power can be treated as an objecte to be data flow graph (SDFG). Here V s the set of optmzed for or can be used as a constrant for those computatonal nodes, E s the set of nterconnecton applcatons wth hard lmts on peak power. The edges between these nodes, d s a nonnegate number mathematcal foundaton for the MILP formulaton s attached to each node representng ts executon delay, based on the followng lemma and theorem. and w s the set of weghts n whch each edge (u, ) Lemmal: has a weght w(u, ) that s the number of regsters assocated wth that edge. Fgure s an example of Let G = (V, E, d, w) be a synchronous sequental SDFG. dgtal crcut and let A be a poste real number. There exsts a legal retmng r of G such that the clock perod of the retmed graph Gr s less than or equal to A, f and only f there s an assgnment of a real alue h() and 0 an nteger alue r() to each node E Vthat meets the o 0 followng condtons: 0CO >(} 0. h(). VEV Fgure : An example SDFG, nodes,, 3 are. h() + d().a + I ( E V multplcaton elements whle nodes 4, 5, are 3. r(u) r() w(u,) (u,) (E addton elements. 4. h(u) h() -. -d(u) V(u,) E E such that *~~~~~~~~~~~~~~~~~~~~~~~~ -r() r(u) = w(u, ) B. Notaton Proof: It follows Lemma 9 n [] by usng h() = s()- Here s some notaton that s used n ths paper: d()+w. p(, ): power consumed by operaton usng oltage Defne x, to be a 0- unknown arable that takes leel. alue f node starts executon at cstepj wth oltage d(, ): delay (n # of control steps) of operaton usng leel and 0 otherwse. Then we can dere the oltage leel. followng theorem. p : power consumed by all functonal unts at stepj. Ppeak maxmum power consumed oer all steps. Theorem : The rest of ths paper s organzed as follows. Let G = (V, E, d, w) be a synchronous sequental Secton II ntroduces the problem of unfyng retmng dgtal crcut, and let Abe a poste real number. Then, and power optmzaton. In secton III, we deelop our there exsts a legal retmng r of G such that the clock power-orented retmng algorthm followed by the perod of the resultant retmed graph Gr s less than or second step as an MILP formulaton for the resultant equal to A, f and only f there exsts an assgnment of a retmed crcut wth the objecte of optmzng power 0/ alue for each xj, real alues h(), and nteger consumpton. Secton IV shows the results of some alues r() to each node E V such that the followng benchmarks to llustrate our proposed solutons. condtons are satsfed: Secton V concludes wth a summary. T. T. X,= Vc V II. Unfyng Retmng and Power X Optmzaton T. jr()x-r()- j j 0 Ve V Combnng retmng wth oltage scalng s a T3. - AR() + r() < - Ve V useful technque for power optmzaton snce t can restructure the crtcal path n such a way as to moe T4. R()-r()+EExjd(,).+ Ve V power-expense nodes out of the crtcal path and T5 r()-r(l).w(,l) V(,)e E ncrease the number of nodes that are potental canddates for schedulng at lower supply-oltages. T. AR() - AR(l) + ELY xd(,) < Aw(,l) V(,l) E E Whle combnng retmng and aerage power Proof: By usng a transformaton smlar to the one mnmzaton can be done as n [, 3], optmzng for from [] n whch, for each node, we substtute h() = peak power s harder to achee by a smple AR()- Ar() n Lemma to mathematcally formulate formulaton. Ths s because expressng the peak power condton (4) n Lemma. Snce the quantty h() as consumpton requres accountng for the contrbuton well as the quantty represent the start of the power consumpton of a computaton node E. EZ.,t towards power at eery control step (or cstep) n whch schedulng step, we can relate the two quanttes by that computaton node s acte. In our MILP usng condton T aboe. Thus, the proof follows the formulaton, we ntroduce 0- arables to capture ths actty nformaton. Our MILP formulaton s flexble /0/$0.O 0(00 IEEE. ICICDTO
3 maxmum power sang for Fgure (c) can be obtaned by schedulng nodes {,, 4} at VL and {3, 5, } at VH and that results n gwatt aerage-power sang. Optmzng the power-orented retmed graph for aerage and peak power wll result n the optmal schedule shown n Fgure (d) wth 8.5 aerage power and gwatt peak power consumpton, whch s sgnfcantly lower than that for Fgure (b). Ths example shows how power-orented retmng can drect the choce of zero-delay edges for the sake of power sang (aerage and peak) whch s the goal n ths work. proof of Lemma notng that the delay of node, d() =ZZJx,j,d(,) w. Uonsumpton athntroducsted0 powrter at any cstep J can be wrtten consumpton The peak power consumpton r ) aspx-p xa~p(, )* peakcpowerconsumpton arabl asp EL e gwatt. The tee pe~mak- P). Hence, the peak power constrant can be wrtten as: * p(, V) < ppeak Z Zyx Vcstep j () We can use a weghted sum of the aerage and peak power consumpton as the objecte functon: Mnmze: acp e+/(a)j j x *d( )* ( )(3) 9/ Equatons () and (3) and the set of constrants n formulatontheilporemmiffor tohrem smultaneous retmng and (peak and/or aerage) power optmzaton. Ths MILP formulaton s sutable only for small crcuts because of the ncreased number of 0- arables. Thus, we propose an effcent twostep heurstc based on the dea of power-orented retmng, as t wll be clear n the next secton. ( 4 III. Two-Stage Power Optmzaton Soluton... ~ (a) 0..\...J.V 3 \/ 4... ~~~~~~~~~~~~~~ (b) (c) A. Motatng Example (d) Chabn and Wolf [3] hae proposed a way of Fgure : Results of retmng Fgure wth two dfferent retmng ectors for clock perod = 4. (a) r = retmng wth the objecte of maxmzng the total (0 ); (b) power-optmzed schedule of (a); (c) number of non-zero-delay (NZD) edges n order to r = (0 0 ); (d) power-optmzed schedule of (c) maxmze the parallelzaton among the graph nodes. Ther approach results n many nodes beng scheduled wth lower supply-oltages and power-sang. But just maxmzng the total number of NZD edges wthout The man dea of power-orented retmng s takng the graph structure nto consderaton to control explotng the crcut structure to mpose control oer the choce of the edges does not explot the potental edge selecton n the retmng process n order to rooms of the graph nodes to be scheduled wth lower achee power sang. Ths s acheed through supply-oltages. As an Example, consder the SDFG n assocatng wth each edge (u,) a cost functon that Fgure, assumng that the crcut can be operated at captures the relate mportance of edges accordng to two supply-oltages, VH and VL usng the modules the power consumpton of the two end-nodes of ths lbrary n Table. Retmng SDFG n Fgure wth the edge and achee parallelsm to faor the nodes wth objecte of maxmzng the total number of non-zerohgher power consumpton. The basc ntuton here s delay (NZD) edges under the tme constrant of 4 that an edge wth power-hungry nodes as end-ponts results n the retmed graph Gru shown n Fgure (a). should not be on the crtcal path f at all possble. Ths The maxmum power sang can be obtaned by allows power-expense nodes to be scheduled at lower schedulng nodes {, 4} at VL and {, 3, 5, } at VH and supply-oltages (whch s reflected n aerage and peak that results n 9 gwatt aerage-power sang. power sang) and allows one to dstrbute the poweroptmzng Gr, for aerage and peak power results n expense nodes to dfferent control steps obtan more peak power sang. the schedule shown n Fgure (b) wth.5 gwatt and 8 gwatt aerage and peak power respectely.otehurssaepsblhr;wedfnte The SDFG n Fgure can be retmed dfferently cost functon attached wth each edge as the sum of the wth another objecte, whch we call power-orented power consumptons of the two end-nodes of that edge. retmng, under the same tme constrant of 4 to get the Snce the power-expense nodes hae larger executon power-retmed graph, Grp, shown n Fgure (c).the delay relate to the other nodes, the smplest and yet /0/$0.O 0(00 IEEE. 3 ICICDTO
4 the most effcent cost functon s to sum the delays of Mnmze: E f(u,v) * cost(u,) () the two end nodes of that edge,.e: (u,)e cost(u,) =d(u) + d() Vedge(u,) (4) -f(u,). 0 V(u,) E E (7) In Fgure, cost(,4) = + = 3, whle cost(4,5) = + f(u, ). V(u, ) E E (8) =. Thus, the power-orented retmng chose edge (4,5) nstead of edge (,4) as shown n Fgure -(c) and -f(u,) + r(u) - r(). w(u,) - V(u,) E E (9) Fgure -(a) respectely. That left a room for node to be scheduled n a lower supply-oltage as shown n r(u) - r(). W(u,) - Fgure -(d). Vu, e Vsuch that D(u,) > AZ (0) Power-orented retmng s based on the It can be proed that the constrant matrx of the mathematcal framework ntroduced by Leserson and ILP formulaton ()-( 0) for the power-orented Saxe []. It s cast as an ILP formulaton and because retmng s totally unmodular [0]. For lack of space, that the constrant matrx s totally unmodular (as t we do not dscuss total unmodularty here; the reader wll be shown later), t turns out to be an LP s referred to [0]. The practcal mpact of total formulaton whch can be soled n polynomal tme. unmodularty s that lnear programmng (LP) Power-orented retmng s ntended to sole the formulaton wthout the ntegralty constrants produces followng problem: the optmal soluton, whch can be obtaned n a Problem : Gen a synchronous dgtal crcut polynomal run tme. represented as an SDFG, G = (V, E, d, w), fnd a As mentoned before, the second step n our retmng r. V - Z that transforms G to a retmed soluton s an MILP formulaton for the DAG resultng graph Gr = (V, E, d, wr), whch achees power from power-orented retmng, whch s dscussed next. mnmzaton whle preserng the same crcut functonalty as the orgnal crcut. C. and Aerage Power Optmzaton for DAGs Defnef(u, ) to be a 0- arable that takes on a alue f*r(u ) 0, an 0 otewe Fo eac edg (u ) th The retmed graph s preprocessed to take off all ±f w,u,)= For w,)nd.v(uerwse) eahunge (), tht the non-zero-delay edges. So, the resultant DFG s a gesf(u, ) + w, (u, ) ~ I V (u, ) c E; usng (), t can graph representaton of a combnatonal crcut n be wrtten as.ll whch each ertex represents a computaton node, and -f(u,) + r(u) - r(). w(u,) - V(u,) E E. (5) the edges represent the precedence relaton among the The followng theorem s the mathematcal bass for ertces n the same teraton. power-orented retmng and s based on Theorem 7 n Problem : Gen a DFG representaton of the desgn []. problem, the latency (greater than or equal to the Theorem : mnmum clock perod of the retmed graph), a set of oltage leels for the operatng resources, and a Let G = (V, E, d, w) be a synchronous dgtal powerldelay table that contans the aerage power crcut, and let A be a poste real number. Then, there consumpton and the delay tme needed for each exsts a legal retmng r of G such that the clock perod resource operatng on each oltage leel. Fnd a of the retmed graph Gr s less than or equal to A, f and schedule that mnmzes the energylpower only f there s a 0/ alue for each f(u, ) arable and (aeragelpeak) ofthe gen DFG. nteger alues for r, r.- V - Z such that: Our soluton for the multple supply oltages * 0.f(u,). V(u,) E E schedulng (MVS) problem s a mxed nteger lnear * -f(u,) + r(u) - r(). w(u,) - V(u,) E E. programmng (MILP) formulaton targetng peak * r(u) - r() < W(u, ) - Vu, E V power consumpton as well as aerage power and such that D(u, ) > l. energy consumpton for a gen latency constrant. Moreoer, we are tryng to ntegrate a combnaton of Proof: Omtted; smlar to the proof of Theorem 7 n these factors smultaneously. The soluton to problem [ ]. s much less expense than the soluton of the The power-orented cost functon deeloped n smultaneous retmng and (peak andlor aerage) Equaton (4) when used n an objecte functon as n power optmzaton problem because n the resultant Equaton () together wth the set of nequaltes n DFG, the structure of the graph s fxed and so a tme- Theorem forms the ILP formulaton for the power- frame for each node can be obtaned usng the as-soonorented retmng as follows: as-possble (ASAP) and as-late-as-possble (ALAP) schedule. Defne Xx to be a 0- unknown arable that takes alue f node starts executon at cstep j wth /0/$0.O 0(00 IEEE. 4 ICICDTO
5 oltage leel and 0 otherwse. Then, the MILP formulaton s as follows: Ppeakd(, ).p(, ) Mnmze j j X j EL LXJPV(,V)<.Ppeak j=-d()+ (j + d(, ) +l)xj<. j () =x (j + d(, ) -l)x, + sacrfced for the sake of short soluton run-tme. Thus, we set a tme lmt for the soler (CPLEX n our case) to termnate wth a feasble nteger soluton f the optmal soluton s not found or erfed yet.. jx,- Ve V () V(, l)e E (3) Vje [,] (4) The capablty of our power-orented retmng technque to restructure the sequental crcut to the faor of power mnmzaton s compared to the untweght cost retmng (where the objecte of the retmng process s just mnmzng the non-zero-delay edges) by feedng both of the retmed DFGs to the same power optmzaton technque. The power optmzaton results for dfferent benchmarks are tabulated n Table, usng the module lbrary n Table, for nput tmng constrants rangng from the crtcal path length to about double the crtcal path length. As shown n Table, our power-orented technque s more effcent n mnmzng both peak and aerage power than the unt-weght retmng for most benchmarks under dfferent tme constrants. In some benchmarks such as LF n Table -(d), the resultant retmed DFGs from both retmng technques are the same, whle under few tme constrants, the unt-weght retmng ges better results as n Table -(a) under tme constrant 8 csteps. Ths s because powerorented retmng strategy sometmes oer-explots crcut structure durng retmng process. The soluton of the MILP formulaton for the combned retmng and peak and aerage power consumpton (for the restrcted soluton run-tme) s nserted n Table under the ttle "Exact Sol" to show the qualty of the two-phase heurstc soluton for peak and aerage power usng less run tme. That s n most benchmarks the two-phase heurstc matches well the soluton obtaned from the combned MILP formulaton. VnodewthouNuccessors ( ) Equaton () s a flexble weghted objecte functon, where the weght factors can be set accordng to the desgn requrements. Equaton () forces each node to starts at only one cstep and scheduled usng one and only one oltage leel. The precedence relatons are satsfed by Equaton (3). power can be set as a constrant or can be used as a arable to be mnmzed n the objecte functon as shown n Equaton (4). Fnally, each node wthout successors s forced to meet the latency requrement by Equaton (5). Power-orented retmng strategy sometmes oerexplots crcut structure durng retmng process, whch may results n a retmed crcut that s not power-effcent canddate. To achee the best power mnmal schedule, the crcut s optmzed through two passes of the two-stage algorthm usng two dfferent cost functons n the objecte of the mathematcal formulaton n each. In one pass, the crcut s retmed usng power-orented retmng presented aboe; then the output retmed crcut s optmzed for peak and/or aerage power consumpton. In the other pass, the crcut s retmed usng unt-weght cost n the objecte functon as presented n [3]; then the retmed crcut s also passed on to the same peak and/or aerage power optmzaton algorthm. The best power mnmal soluton s consdered as the fnal schedule. Table : Modules lbrary Module M..T DDI l IV. Expermental Results 3.3 V del power 4 3 V. Concluson We hae presented two methods for dynamc aerage power as well as peak power consumpton n Our MILP formulaton for the exact soluton as well as the two-stage heurstc (power-orented retmng followed by MVS) for peak and aerage power mnmzaton are tested on standard benchmarks such as the dfferental equaton soler (HAL), and seeral DSP benchmarks such as the ffth-order ellptc wae flter (EWF), thrd-order drect-form flter (DFF) and lattce flter (LF). Although the soluton of the combned retmng and peak power MILP formulaton fnds the optmal soluton, t suffers from nordnately long soluton tme because of the large number of bnary arables needed to model peak power. In order to oercome of ths problem, the optmalty can be /0/$0.O 0(00 IEEE. 5.0 V power sequental synchronous crcuts under tme constrants usng a combnaton of basc retmng and multple oltage schedulng (MVS) technques. Retmng technque s used to restructure the SDFG representaton of the sequental crcut n order to ncrease the parallelsm between operatons and thus to ncrease the number of operatons off the crtcal path to be canddates for schedulng at lower supply oltages. Frst, we desed an MILP formulaton for optmal peak and/or aerage power consumpton schedulng problem through a unfcaton of retmng 5 ICICDTO
6 and MVS technques. Mathematcal formulaton for peak power dctates pece of nformaton for each operaton n order to capture ts acteness n a certan tme step. Thus, we used bnary arables for that purpose, whch turns to be ery large because tght tme-frame for an operaton cannot be obtaned apror. Then, to alleate the problem of arable exploson, we presented a two-stage algorthm for peak and/or aerage power optmzaton. Frst, power-orented retmng s proposed to restructure the nput SDFG n order to achee parallelzaton to the faor of nodes wth hgh power consumpton. Second, an MILP formulaton s presented that takes the retmed DFG as an nput and produces an optmal peak and/or aerage power schedule usng MVS technque. Our proposed power-orented retmng generates a graph structure canddate for better peak and aerage power sang than smlar works that depends on only maxmzng the parallelsm among graph nodes as shown by the expermental results for many benchmarks. Table : Power resultant of both power- orented and unt-weght retmng (b):evw (a): HAL Unt-weght Exact Sol L..._,.. Ag Ag L L Exact Sol 4.5 [ Ag t t 3.8 (c): DFF Unt-weght [ Power-orented ] "I Power-orented.F.L Unt-weght...F Pow.erorented Ag Ag Ag Exact Sol [ Exact. Sot ^ F L Ag Ag Ag F I I49 ll0. 7. b Power-orented 0 L [ Ag (d) LF Unt wegh Pow.e.rorented Ag Ag ][ ' [] Y.-R. Ln, C.-T. Hwang, and A. C.-H. Wu, References "Schedulng technques for arable oltage lowpower [] C. B. Leserson and J. B. Saxe, "Retmng synchronous crcutry," Tech Report: SRC-RR-3, Dgtal Systems Research Center, August 0, 98. [] N. Chabn, I. Chabn, E.-M. Aboulhamd, and Y Saara, "Unfcaton of basc retmng and supply oltage scalng to mnmze dynamc power consumpton for synchronous dgtal desgns," n Proc. Great Lakes Symp. VLSI, Washngton, D. C., pp. 4, Aprl 003. [3] N. Chabn and W. Wolf, "Reducng Dynamc Power Consumpton n Synchronous Sequental Dgtal Desgns Usng Retmng and Supply Voltage Scalng," IEEE Trans. on VLSI Systems, Vol., No., pp , June 004. desgns," ACM Trans. Desgn Automat. Electron. Syst., Vol., No., pp. 8-97, Aprl 997 [7] M.C. Johnson and K. Roy, "Datapath schedulng wth multple supply oltages and leel conerters," ACM Trans. Desgn Automaton Electronc Syst., Vol., No. 3, pp. 7-48, July 997. [8] J.-M. ChangandM. Pedram,"Energymnmzaton usng multple supply oltages," IEEE Trans. on VLSI Systems, Vol. 5, No. 4, pp , Dec [9] A. Manzak and C. Chakrabart, "A low power schedulng scheme wth resources operatng at multple oltages," IEEE Trans. on VLSI Systems, Vol. 0, no, pp. -4, Feb 00. [0] G. Nemhauser and L. Wolsey. Integer and Combnatoral Optmzaton, John Wley, New York, 988. [4] J. Montero, S. Deadas, A. Ghosh, "Retmng sequental crcuts for low power," n Proc. 993 IEEEIACM Internatonal Conference on ComputerAded Desgn, pp.8-40, Noember 07-, 993. [5] A. Raghunathan and N.K. Tha, "An ILP formulaton for low power based on mnmzng swtched capactance durng data path allocaton", n Proc. IEEE Symposum on Crcuts and Systems, /0/$0.O 0(00 IEEE. ICICDTO
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