Noise Figure Evaluation Using Low Cost BIST

Size: px
Start display at page:

Download "Noise Figure Evaluation Using Low Cost BIST"

Transcription

1 Noise Figure Evlution Using Low Cost BIST Mrelo Negreiros, Luigi Crro, Altmiro A. Susin Instituto de Informáti - Progrm de Pós Grdução em Computção - PPGC Universidde Federl do Rio Grnde do Sul - UFRGS, Porto Alegre, RS, Brzil negreiro,rro,susin@inf.ufrgs.br Abstrt A tenique for evluting noise figure suitble for BIST implementtion is desribed. It is bsed on low ost single-bit digitizer, wi llows te simultneous evlution of noise figure in severl test points of te nlog iruit. Te metod is lso ble to benefit from SoC resoures, like memory nd proessing power. Teoretil bkground nd experimentl results re presented in order to demonstrte te fesibility of te ppro. 1. Introdution Wit te inresing pity of development ieved by te eletroni industry nowdys, minly in te onsumer mrket, te design of new devies is gret llenge. A fst, flexible nd relible metodology must be used in order to ope wit ever srinking produt development time, s sorter time-to-mrket is ruil to te ommeril suess of su devies. Te SoC ppro [1] s been used in order to solve tis issue. Testing of su devies is noter llenge, s test osts must be kept lower for te devie to be ompetitive in te mrket. Unfortuntely, nlog testers re expensive devies nd extr diffiulties rise wen trying to test nlog iruits in SoC environment. Te limited ess to te input nd output of te nlog iruit under test is n exmple. In order to redue te ost of te nlog test, built-in test strtegies my be used in order to redue te requirements of externl nlog testers, or reple tem ompletely. In te SoC environment, s plenty of proessing nd memory resoures re vilble, it is possible to perform test nlysis by reusing tese resoures [2]. In tis pper low ost metod for evluting te noise figure of nlog iruits is presented. Noise figure is n importnt prmeter in te speifition nd design of low noise systems, su s ommunitions systems nd biomedil instrumenttion. It is used to rterize te noise bevior, from single nlog omponents to entire systems. Te test metod is bsed on digitl signl proessing nd my be implemented in te SoC environment by reusing proessing nd memory resoures lredy vilble in te SoC. A one-bit digitizer tt is permnently onneted to te desired nlog test point is used, tus minimlly disturbing te iruit under test. Tnks to te simpliity of te onverter, low nlog re overed is obtined, nd no impt is mde on te noise figure of te iruit being tested, tt is, te proposed BIST does not inrese te noise level to be mesured. Te ultimte gol of tis work is to sow tt, by using simple BIST ell [3], one n mesure not only frequeny relted prmeters of te iruit under test, but rter one n obtin informtion of oter importnt rteristis like noise figure. Te pper is orgnized s follows: in setion 2 brief review of oter pproes to mesure te Noise Figure is presented. In setion 3, noise prmeters re reviewed nd two ommon noise figure mesurement metods re presented. An nlysis of possible implementtion of te metods ere proposed in te SoC environment is provided in setion 4, togeter wit te test metod. In setion 5 results regrding te digitizer re presented, followed by experimentl noise figure evlutions. Anlysis is provided in setion 6 nd te pper finises wit onlusions in setion Relted work Te use of embedded noise soures for noise figure mesurements s lredy been reported. In [4] tinfilm resistor s been used s n on-wfer noise soure. Diode noise soures ve been investigted in [5]. A prodution test seme bsed on signture testing s been proposed in [7], were noise figure mesurements ve been indiretly mde. To te utors knowledge, first ppro sowing tt it is possible to ve BIST iruit to mesure noise figure s been proposed in [6]. In te present work we ddress te issue of using low /5 $2. 25 IEEE

2 ost BIST to mesure te noise figure. 3. Noise in nlog iruits In tis setion some bkground informtion regrding noise rteriztion in nlog iruits is provided. First noise figure is defined, nd ten two usul mesurement metods re presented. 3.1 Definitions A ommon prmeter used to rterize te noise bevior of n nlog eletri signl (su s te output of sensor or mplifier) is te signl-to-noise rtio (SNR). It is rtio of te signl power to te noise power, expressed in db. 2 V 1 log1 db 2 V S SNR = (1) N Noise figure (NF) nd noise ftor (F) re prmeters used to rterize te noise bevior of devie or iruit, s sown in figure 1. SNR IN R S SNR OUT Figure 1. Noise rteriztion of 2-port devie Te noise ftor (F) of two-port devie is te rtio of te vilble output noise power per unit bndwidt to te noise used by te tul soure onneted to te input terminls of te devie, mesured t te stndrd temperture of 29K [8]. SNR SNR IN (2) OUT Noise figure (NF) is defined s te noise ftor (F) expressed in db [8,9] N + k T (4) k T Te definition of noise figure is bsed on te ssumption of liner system. Some extensions for nonliner systems ve been proposed, like in [1], but re not going to be nlyzed in tis work. Some usul noise figure vlues re illustrted in tble 1, togeter wit te orresponding noise ftor. Note tt te typil vlue of noise figure for n RF low noise mplifier is 3dB. For n RF mixer, te vlue is bout 1 db [11]. A iruit tt does not dd noise to its input would ve noise figure of db. Tble 1. Some referene vlues for noise figure nd noise ftor NF(dB) F Exmple 1 noiseless nlog iruit 3 2 RF low noise mplifier 1 1 RF mixer 3.2 Mesurement metods In te diret mesurement metod, eqution 4 is used. A lod is onneted to te input of te system, t temperture of 29K, like in figure 1. Te output noise power of te system is mesured (te numertor of eqution 4). If one knows te mesurement bndwidt (B) nd te gin of te system (G), eqution 4 n be used diretly. In te y-ftor metod, noise figure evlution is bsed on te use of librted noise soure [8,12]. Te metod is two-step proess (see figure 2): wit te noise soure turned off (t temperture of 29K, or old temperture), te output power (N ) is mesured. Ten te noise genertor is turned on, nd te noise output power (N ) for te ot temperture is reorded. Te Y ftor is te rtio of tese powers: N N Y = (5) NF 1 log1 ( F ) db = (3) Te IEEE stndrd definition of te noise ftor (F) is given by eqution 4, were N is te noise dded by system, T is 29K (stndrd temperture), B is te system bndwidt, k is te Boltzmnn onstnt nd G is te gin of te system. Figure 2. Noise rteriztion setup Knowing tt te noise power t te output of te is simply te noise dded by te system (N ) plus te mplified input noise, one n write

3 N = k T + N (6) N = k T + N (7) After pplying equtions 6 nd 7 to 5, nd developing using eqution 4, one obtins te eqution of te Y-Ftor tenique [12], tt llows te evlution of te noise ftor ( T / T 1) Y ( T / T 1) ( Y 1) (8) T is te referene temperture of 29K. If te noise soure old temperture is not 29K, tis provides orretion term. Tis eqution n be rewritten in order to tke into ount noise powers, insted of tempertures [1], s sown in eqution 9. ( N / N 1) Y ( N / N 1) ( Y 1) (9) 4. A NF BIST in te SoC environment In tis setion te implementtion of metods for estimting noise figure suitble for BIST in SoC environment re disussed. Te proposed metod is lso presented. 4.1 Diret metod An implementtion of te diret metod would be s sown in figure 3. A nominl lod R s must be pplied t te input t temperture of T =29K. Te output of te must be mplified nd routed to te ADC of te system for furter proessing. R S T o G du G AD Figure 3. Diret metod setup One prtil disdvntge of tis setup is relted to vritions in te gin of te mplifier (G ). Tis gin multiplies bot terms in eqution 1, but only te numertor is mesured. Tis wy, ny devition in te mplifier gin (from G to G ) will use n error in te noise ftor estimtion. Tis issue is expeted to our beuse of proess vritions tt my ffet te gin of te mplifier. ( N + k To ) G ' k T G 4.2 Y-ftor metod o (1) If one ould embed suitble noise genertor, being ble to provide two known noise levels, it would be fesible to implement noise figure mesuring system bsed on te Y-ftor tenique. Te system level setup is presented in figure 4. A progrmmble ttenutor provides te noise levels needed for te NF mesurement. Te genertor noise level n be mesured troug n uxiliry nlog pt to te ADC. noise genertor T,T ttenutor AD G dut G Figure 4. Y-ftor setup Tis setup does not possess te sme sensitivity to nges in te mplifier gin s te diret metod. Bot numertor nd denomintor in eqution 11 re mesured, so ny devitions in te mplifier gin (from G to G ') re orreted. ( N + k T ) G ' Y = (11) ( N + k T ) G ' In [6] n nlysis of unertinty in ommeril noise soures is provided, nd it is sown tt even lrge errors like 5% in te ot temperture n still provide useful mesurements for noise figure estimtion, if n error of ±.3dB is eptble (for noise figures of 3dB nd 1dB). Tese errors ould be used s guidelines in te design of te noise genertor nd ttennutor. 4.3 Proposed metod for NF mesurement Some problems re not ddressed in te strtegy presented in figure 4: te AD onverter of te system is used, so simultneous quisition is not possible. Also, routing of nlog signls to te ADC my be diffiult. Tere is need for multiplexing devie t te input of te ADC, wi introdues non-linerity nd distortion in te signl. If te ADC is repled by simple digitizer, like in figure 5, some dvntges like te possibility of simultneous observbility nd no need for multiplexing devies is ieved. Also, beuse of te simpliity of te digitizer, it n be permnently onneted to te nlog test point, tus voiding swites wi degrde te performne of te nlog iruit under test.

4 noise genertor ttenutor mplifier referene wveform Figure 5. Proposed setup Digitizer As te Y-ftor metod requires te evlution of rtio of signl power, te digitizer must be ble to provide noise power levels. In tis work te digitizer [3] uses voltge omprtor nd referene signl in order to perform te dt quisition. Te requirements of te referene signl re modest (in te sense tt only smll frequeny bnd is used in te librtion proess), llowing simple nd low-ost signl genertor to be used. 5. Results In tis setion te digitizer nd strtegy to evlute power levels using referene wveform re presented. Noise nd referene levels re lso disussed. Te setion finises wit results from prototyped setup. 5.1 Digitizer Te digitizer (figure 6) is omposed by voltge omprtor wit noise referene [3]. Te input signl is onneted diretly to te input of te omprtor. Te digitized input signl is obtined t te output of te omprtor nd is digitl output. Smpling my be ontrolled by dding flip-flop t te output of te omprtor. Tis struture is ommon in ig speed voltge omprtors. Eqution 12 llows one to stte tt te sttistis of te input signl will be t te output of te smpler, ffeted by gin ftor nd by te rsine funtion, wi is pproximtely liner for smll vlues of te input rgument. As te Fourier trnsform of te utoorreltion is te power spetrum density, one is ble to observe te spetrl rteristis of te signl, but wit n inresed noise level beuse of te ddition of te noise t te omprtor input [3]. 5.2 Evluting power levels In te following, Mtlb simultion illustrtes te ide of mesuring noise levels using referene wveform. In rel pplition, noise nd referene wveforms sould be mplified in order to enble te use of voltge omprtor. If one pplies onstnt-mplitude squre wve signl to te digitizer of figure 6 s referene signl, noise levels n be determined if simple strtegy is followed. Two noise levels were pplied to te digitizer using te sme squre wve s referene. Signls re s sown in figure 7. One sould notie tt noise levels sould be lwys greter tn te referene levels. Figure 7. Noise nd referene wveforms for ot (left) nd old (rigt) noise tempertures signl noise + - D Q output smple Figure 6. Digrm of 1-bit digitizer Te noise mplitude sould be greter tn or equl to te signl mplitude, nd bot signls sould be zero men (or ve te sme d level). Te utoorreltion t te output of te smpler, onsidering tt te ombined signl nd noise is norml sttionry proess wit zero men, is given by te rsine lw: 2 Rx ( τ ) R = rsin y ( τ ) (12) π Rx () Figure 8. Power spetrum density Te power spetrum density evlution of te bitstrem t te output of te digitizer is sown in figure 8. One n notie tt te noise levels remins similr, wile mplitude levels of te referene squre wve re lrger. As te referene level is onstnt, simple normliztion proedure n be used. One n evlute te mximum mplitude of bot spetr nd pply

5 orretion ftor to one of te power spetrl density plots. error in power rtio [%] referene mplitude [Vref/Vnoise*1%] Figure 1. Error in power rtio estimtes versus referene mplitude 5.4 Experimentl results Figure 9. Power spetrum density fter normliztion (zoom t 6 Hz) Figure 9 sows different noise levels, obtined before nd fter te normliztion proedure. One n observe tt te noise levels were very lose before te normliztion proedure. In order to mke numeri omprison, noise power rtio ws evluted using tree different metods: rtio of men squre vlues (evluted in time domin), rtio of PSD dt nd rtio of PSD dt from te 1-bit digitizer. Te vlues obtined re presented in tble 2. For te 1-bit dt, te referene wveform must be exluded from te power rtio evlution (te referene is not prt of te signl being mesured). If tis is omplised, bout 2.5% error in te power rtio ws observed in te simultion, s presented by te lst line in tble 2. Tble 2. Noise power rtio evlution nd derived prmeters for T =1K nd T =1K Metod Noise power F NF(dB) rtio Men squre rtio PSD rtio bit PSD rtio exluding referene In order to verify te ppro test setup ws implemented in order to mesure te noise figure of non-inverting mplifier. Te generl setup is sown in figure 11. In order to nge te vlue of te noise figure of te iruit, different opertionl mplifier ws used. As te equivlent noise voltges re provided by te dtseets of te omponents, one is ble to lulte te expeted nominl vlue of te noise figure of te iruit, ording to te opmp used [13]. noise genertor ttenutor Non-Inverter Amplifier A v =11 Amplifier A v =1156 Sine genertor Voltge Comprtor Digitl output 3kHz 3mVpp Figure 11. Digrm of te experimentl setup Te opmps used were te OP27, OP7, TL81 nd CA314. Te orresponding expeted noise figures were in te rnge of 3.7dB to 16.2dB. In order to void interferene pikup, te iruit ws ssembled in n luminum se, being bttery powered (figure 12). 5.3 Noise nd referene levels Simultions were rried out in order to evlute te ury of noise power rtio estimtes s funtion of te mplitude of te referene wveform. Figure 1 sows te error in power rtio estimtes for gussin noise. Te referene wveform mplitude level is relted to te overll ury of te metod: for very smll mplitude referenes, lrge error is expeted beuse of noise levels disturbing te referene mplitude. Very lrge referenes my led to non-liner distortion of te digitizer. Amplitudes in te rnge of 1% to 4% of te noise level sould give resonble results (figure 1). Figure 12. Prototyped iruit Externl noise genertor nd sine wve genertor (bot HP3312A) were used. Te referene wveform ws t 3kHz, wile te noise mesurement bndwidt ws t 1kHz, s indited in figure 13. Te output of te digitizer ws quired using digitl sope (HP54645D). Dt ws proessed using Mtlb. Totl quisition lengt ws 1e6 smples nd te FFT size ws 1e4 smples. Te results obtined fter proessing re presented in tble 3,

6 inluding te expeted noise figure vlues from noise iruit nlysis [13]. 7. Conlusions In tis pper tenique for te evlution of noise figure in BIST environment ws presented. As te tenique is bsed on DSP, it is ble to benefit from resoures lredy vilble in te SoC environment. A simple voltge omprtor nd referene signl were used s digitizers, tus disrding te need for n ADC. Te tenique lso extends te pbilities of simple BIST ell [3], llowing one to perform frequeny nd noise mesurements. 8. Referenes Figure 13. PSD plot for noise levels fter normliztion Tble 3. Noise figure results for T =29K nd T =29K Opmp Expeted Mesured OP OP TL CA Anlysis Te experimentl results presented in setion 5 ve indited te fesibility of implementing te ppro for prtil iruits. Noise figure mesurements were rried out wit 2 db mximum bsolute error. Te proposed strtegy mkes use of referene signl in order to perform te normliztion proess. Even low-ost genertor ould be used, s te normliztion proess would trk te min frequeny omponent (disregrding rmonis, for exmple). Tis would enble te use of low qulity referene wveforms, s te rmonis re not used in te normliztion proess. Te mplitude of te min omponent, owever, sould be onstnt. Te need for nlog signl onditioning, s ig gin mplifier, is relted to te signl levels tt sould be mesured. In generl, n mplifier will be required for noise mesurements [9]. Tis overed ould be minimized by observing tt te noise figure of sde of stges is minly te noise figure of te first stge [9]. [1] Zorin,Y.; Mrinissen, E.J.,"System Cip Test - How Will It Impt Your Design", Design Automtion Conferene - DAC, 2, pp [2] Zorin,Y.; "Test resoure prtitioning strtegies for systems on ip", Ltin Amerin Test Worksop LATW23, TTEP Tutoril. [3] Negreiros, M.; Crro, L.; Susin, A.A., A Sttistil Smpler for New On-Line Anlog Test Metod, JETTA-Journl of Eletroni Testing: Teory nd Applitions 19, 23, Kluwer Ademi Publisers, pp [4] Belnd, P.; Roy, L.; Lbonte, S.; Stubbs, M.; "An enned on-wfer millimeter-wve noise prmeter mesurement system", IEEE Trns. on Instrumenttion nd Mesurement, vol.48, no.4, Aug. 1999, pp [5] J. Rnd, Robert L. Billinger, Jon L. Rie; On-Wfer Mesurements of Noise Temperture, IEEE Trns. on Instrumenttion nd Mesurement, vol.48, no.6, Deember 1999, pp [6] Negreiros, M.; Crro,L.; Susin,A.A.; Towrds BIST Tenique for Noise Figure Evlution, Europen Test Symposium, ETS 4, 24. [7] Voorkrnm, R.; Cerubl, S.; Ctterjee, A.; "A signture test frmework for rpid prodution testing of RF iruits", Design, Automtion nd Test in Europe Conferene nd Exibition, 22, pp [8] Fundmentls of RF nd mirowve noise figure mesurements, Hewlett-Pkrd Applition Note 57-1, Plo Alto, CA, July [9] Motenber, C.D.; Connelly, J.A.; "Low-Noise Eletroni System Design", Wiley, [1] Geens, A.; Rolin, Y.; "Noise figure mesurements on nonliner devies", IEEE Trns. on Instrumenttion nd Mesurement, vol. 5, n.4, Aug. 21, pp [11] Rzvi, B.; "RF Miroeletronis", Prentie Hll, [12] Collntes, J.-M.; Pollrd, R.D.; Syed, M.; "Effets of mismt on te noise figure rteriztion: omprtive nlysis of two Y-ftor teniques", IEEE Trns. on Instrumenttion nd Mesurement, vol.51, no.6, Deember 22, pp [13] Steffes, M.; "Noise Anlysis for Hig Speed Op Amps", Burr-Brown Applition Bulletin AB-13, Otober, 1996.

A Development of Embedded System for Speed Control of Hydraulic Motor

A Development of Embedded System for Speed Control of Hydraulic Motor AISTPME (2011) 4(4): 35-39 A Development of Embedded System for Speed Control of Hydruli Motor Pornjit P. Edutionl Mehtronis Reserh Group Deprtment of Teher Trining in Mehnil Engineering, KMUTN, ngkok,

More information

8.1. The Sine Law. Investigate. Tools

8.1. The Sine Law. Investigate. Tools 8.1 Te Sine Lw Mimi 50 ermud Tringle ermud 1600 km Sn Jun 74 Puerto Rio Te ermud Tringle, in te nort tlnti Oen, is te lotion of severl unexplined plne nd sip disppernes. Vrious teories ve een suggested

More information

SLOVAK UNIVERSITY OF TECHNOLOGY Faculty of Material Science and Technology in Trnava. ELECTRICAL ENGINEERING AND ELECTRONICS Laboratory exercises

SLOVAK UNIVERSITY OF TECHNOLOGY Faculty of Material Science and Technology in Trnava. ELECTRICAL ENGINEERING AND ELECTRONICS Laboratory exercises SLOVAK UNIVERSITY OF TECHNOLOGY Fulty of Mteril Siene nd Tehnology in Trnv ELECTRICAL ENGINEERING AND ELECTRONICS Lbortory exerises Róbert Riedlmjer TRNAVA 00 ELECTRICAL ENGINEERING AND ELECTRONICS Lbortory

More information

The PWM switch model introduced by Vatché Vorpérian in 1986 describes a way to model a voltage-mode switching converter with the VM-PWM switch model.

The PWM switch model introduced by Vatché Vorpérian in 1986 describes a way to model a voltage-mode switching converter with the VM-PWM switch model. The PWM swith model introdued by Vthé Vorpérin in 1986 desribes wy to model voltge-mode swithing onverter with the VM-PWM swith model. The lrge-signl model is equivlent to d trnsformer whose turns rtio

More information

Experiment 3: Non-Ideal Operational Amplifiers

Experiment 3: Non-Ideal Operational Amplifiers Experiment 3: Non-Idel Opertionl Amplifiers 9/11/06 Equivlent Circuits The bsic ssumptions for n idel opertionl mplifier re n infinite differentil gin ( d ), n infinite input resistnce (R i ), zero output

More information

Experiment 3: Non-Ideal Operational Amplifiers

Experiment 3: Non-Ideal Operational Amplifiers Experiment 3: Non-Idel Opertionl Amplifiers Fll 2009 Equivlent Circuits The bsic ssumptions for n idel opertionl mplifier re n infinite differentil gin ( d ), n infinite input resistnce (R i ), zero output

More information

Exercise 1-1. The Sine Wave EXERCISE OBJECTIVE DISCUSSION OUTLINE. Relationship between a rotating phasor and a sine wave DISCUSSION

Exercise 1-1. The Sine Wave EXERCISE OBJECTIVE DISCUSSION OUTLINE. Relationship between a rotating phasor and a sine wave DISCUSSION Exercise 1-1 The Sine Wve EXERCISE OBJECTIVE When you hve completed this exercise, you will be fmilir with the notion of sine wve nd how it cn be expressed s phsor rotting round the center of circle. You

More information

AGA56... Analog Input Modules. Siemens Building Technologies HVAC Products

AGA56... Analog Input Modules. Siemens Building Technologies HVAC Products 7 922 nlog Input odules G56... nlog input modules for the ontrol of SQ5... ir dmper tutors y ontinuous nlog ontrol signls, suh s 4...20 m, nd ontinuous nlog position feedk signls. For supplementry Dt Sheets,

More information

Resistors, Current and Voltage measurements, Ohm s law, Kirchhoff s first and second law. Kirchhoff s first Objectives:

Resistors, Current and Voltage measurements, Ohm s law, Kirchhoff s first and second law. Kirchhoff s first Objectives: EE -050 Ciruit L Experiment # esistors, Current nd Voltge mesurements, Ohm s lw, Kirhhoff s first nd seond lw. Kirhhoff s first Ojetives: Slmn in Adul Aziz University Eletril Engineering Deprtment. Fmiliriztion

More information

Analog Input Modules

Analog Input Modules 7 922 nlog Input odules G56... nlog input modules for the ontrol of SQ5... ir dmper tutors y ontinuous nlog ontrol signls, suh s 4...20 m, nd ontinuous nlog position feedk signls. For supplementry Dt Sheets,

More information

GENERAL NOTES USE OF DESIGN DATA SHEETS:

GENERAL NOTES USE OF DESIGN DATA SHEETS: GENERL DT: TE FOLLOWING DT IS SSUMED: USE OF DT SEETS: ED REVIEWED INTERNL NGLE OF FRITION OF KFILL SOIL, = 30 TOTL UNIT WEIGT OF KFILL SOIL = 20 PF bf. LULTE TE REQUIRED EIGT "" PER TE "STEM EIGT" NOTE

More information

Application Note. Differential Amplifier

Application Note. Differential Amplifier Appliction Note AN367 Differentil Amplifier Author: Dve n Ess Associted Project: Yes Associted Prt Fmily: CY8C9x66, CY8C7x43, CY8C4x3A PSoC Designer ersion: 4. SP3 Abstrct For mny sensing pplictions, desirble

More information

FAST AND ACCURATE MEASUREMENT OF THE RMS VALUE OF A NONCOHERENT SAMPLED SINE-WAVE

FAST AND ACCURATE MEASUREMENT OF THE RMS VALUE OF A NONCOHERENT SAMPLED SINE-WAVE I IEO World Congress Fundmentl nd pplied etrology September 611, 29, Lisbon, Portugl FST ND CCURTE ESUREENT OF THE RS VLUE OF NONCOHERENT SPLED SINE-WVE Dniel Beleg 1, Dominique Dllet 2 1 Fculty o Electronics

More information

Notre Dame Tasks. Activity since last Telecon (Feb 7, 2011)

Notre Dame Tasks. Activity since last Telecon (Feb 7, 2011) Notre Dme Tsks tivity sine lst Teleon (Feb, ) Interfe Speifition beteen UWM/Dispth gent Frequeny estimtion simpoer omponent E-bord lod-shedding simpoer omponent Smrt-Sith simpoer omponent Single-phse Odyssin

More information

Study on SLT calibration method of 2-port waveguide DUT

Study on SLT calibration method of 2-port waveguide DUT Interntionl Conference on Advnced Electronic cience nd Technology (AET 206) tudy on LT clibrtion method of 2-port wveguide DUT Wenqing Luo, Anyong Hu, Ki Liu nd Xi Chen chool of Electronics nd Informtion

More information

Macroscopic and Microscopic Springs Procedure

Macroscopic and Microscopic Springs Procedure Mrosopi nd Mirosopi Springs Proedure OBJECTIVE Purpose In this l you will: investigte the spring-like properties of stright wire, disover the strethiness of mteril, independent of the size nd shpe of n

More information

Synchronous Machine Parameter Measurement

Synchronous Machine Parameter Measurement Synchronous Mchine Prmeter Mesurement 1 Synchronous Mchine Prmeter Mesurement Introduction Wound field synchronous mchines re mostly used for power genertion but lso re well suited for motor pplictions

More information

Simulation of Transformer Based Z-Source Inverter to Obtain High Voltage Boost Ability

Simulation of Transformer Based Z-Source Inverter to Obtain High Voltage Boost Ability Interntionl Journl of cience, Engineering nd Technology Reserch (IJETR), olume 4, Issue 1, October 15 imultion of Trnsformer Bsed Z-ource Inverter to Obtin High oltge Boost Ability A.hnmugpriy 1, M.Ishwry

More information

Lab 8. Speed Control of a D.C. motor. The Motor Drive

Lab 8. Speed Control of a D.C. motor. The Motor Drive Lb 8. Speed Control of D.C. motor The Motor Drive Motor Speed Control Project 1. Generte PWM wveform 2. Amplify the wveform to drive the motor 3. Mesure motor speed 4. Mesure motor prmeters 5. Control

More information

CHAPTER 3 AMPLIFIER DESIGN TECHNIQUES

CHAPTER 3 AMPLIFIER DESIGN TECHNIQUES CHAPTER 3 AMPLIFIER DEIGN TECHNIQUE 3.0 Introduction olid-stte microwve mplifiers ply n importnt role in communiction where it hs different pplictions, including low noise, high gin, nd high power mplifiers.

More information

Samantha s Strategies page 1 of 2

Samantha s Strategies page 1 of 2 Unit 1 Module 2 Session 3 Smnth s Strtegies pge 1 of 2 Smnth hs been working with vriety of multiplition strtegies. 1 Write n expression to desribe eh of the sttements Smnth mde. To solve 18 20, I find

More information

RWM4400UH High Performance Hand Held Wireless Microphone System

RWM4400UH High Performance Hand Held Wireless Microphone System CH 1 CH 2 CH 3 CH 4 UHF QUAD VOLUME MAX VOLUME MAX VOLUME MAX VOLUME RWM 4400UH MIN MIN MIN CHANNEL 1 CHANNEL 2 CHANNEL 3 CHANNEL 4 RWM4400UH High Performne Hnd Held Wireless Mirophone System OWNER S MANUAL

More information

GENERAL NOTES USE OF DESIGN DATA SHEETS:

GENERAL NOTES USE OF DESIGN DATA SHEETS: GENERL DT: TE FOLLOWING DT IS SSUMED: USE OF DT SEETS: ED INTERNL NGLE OF FRITION OF KFILL SOIL, = 0 TOTL UNIT WEIGT OF KFILL SOIL = 0 PF bf. LULTE TE REQUIRED EIGT "" PER TE "STEM EIGT" NOTE ON TIS SEET.

More information

CHAPTER 2 LITERATURE STUDY

CHAPTER 2 LITERATURE STUDY CHAPTER LITERATURE STUDY. Introduction Multipliction involves two bsic opertions: the genertion of the prtil products nd their ccumultion. Therefore, there re two possible wys to speed up the multipliction:

More information

EET 438a Automatic Control Systems Technology Laboratory 5 Control of a Separately Excited DC Machine

EET 438a Automatic Control Systems Technology Laboratory 5 Control of a Separately Excited DC Machine EE 438 Automtic Control Systems echnology bortory 5 Control of Seprtely Excited DC Mchine Objective: Apply proportionl controller to n electromechnicl system nd observe the effects tht feedbck control

More information

Understanding Basic Analog Ideal Op Amps

Understanding Basic Analog Ideal Op Amps Appliction Report SLAA068A - April 2000 Understnding Bsic Anlog Idel Op Amps Ron Mncini Mixed Signl Products ABSTRACT This ppliction report develops the equtions for the idel opertionl mplifier (op mp).

More information

COMPUTER MODELLING OF FLICKER PROPAGATION

COMPUTER MODELLING OF FLICKER PROPAGATION OMPUTER MODELLING OF FLIKER PROPGTION T.Keppler N.R.Wtson J.rrillg University of nterury hristhurh, New Zelnd n.wtson@ele.nterury..nz strt The time series of the voltges t the desired lotions re first

More information

Experiment 3: The research of Thevenin theorem

Experiment 3: The research of Thevenin theorem Experiment 3: The reserch of Thevenin theorem 1. Purpose ) Vlidte Thevenin theorem; ) Mster the methods to mesure the equivlent prmeters of liner twoterminl ctive. c) Study the conditions of the mximum

More information

Synchronous Machine Parameter Measurement

Synchronous Machine Parameter Measurement Synchronous Mchine Prmeter Mesurement 1 Synchronous Mchine Prmeter Mesurement Introduction Wound field synchronous mchines re mostly used for power genertion but lso re well suited for motor pplictions

More information

Mixed CMOS PTL Adders

Mixed CMOS PTL Adders Anis do XXVI Congresso d SBC WCOMPA l I Workshop de Computção e Aplicções 14 20 de julho de 2006 Cmpo Grnde, MS Mixed CMOS PTL Adders Déor Mott, Reginldo d N. Tvres Engenhri em Sistems Digitis Universidde

More information

A Novel Back EMF Zero Crossing Detection of Brushless DC Motor Based on PWM

A Novel Back EMF Zero Crossing Detection of Brushless DC Motor Based on PWM A ovel Bck EMF Zero Crossing Detection of Brushless DC Motor Bsed on PWM Zhu Bo-peng Wei Hi-feng School of Electricl nd Informtion, Jingsu niversity of Science nd Technology, Zhenjing 1003 Chin) Abstrct:

More information

Digital Simulation of an Interline Dynamic Voltage Restorer for Voltage Compensation

Digital Simulation of an Interline Dynamic Voltage Restorer for Voltage Compensation JOURNL OF ENGINEERING RESERH ND TEHNOLOGY, VOLUME 1, ISSUE 4, DEEMER 214 Digitl Simultion of n Interline Dynmi Voltge Restorer for Voltge ompenstion Dr.P.Ush Rni R.M.D.Engineering ollege, henni, pushrni71@yhoo.om

More information

3/8" Square Multi-Turn Cermet Trimmer

3/8 Square Multi-Turn Cermet Trimmer Vishy Sfernie 3/8" Squre Multi-Turn Cermet Trimmer FEATURES Industril grde W t 70 C The T93 is smll size trimmer - 3/8" x 3/8" x 3/16" - nswering PC ord mounting requirements. Five versions re ville whih

More information

Synchronised Measurement Technology for Analysis of Transmission Lines Faults

Synchronised Measurement Technology for Analysis of Transmission Lines Faults roeedings of the th Hwii Interntionl Conferene on System Sienes - Synhronised Mesurement Tehnology for nlysis of Trnsmission ines Fults Vldimir Terzij The University of Mnhester terzij@ieee.org Mlden Kezunovi

More information

3/8" Square Multi-Turn Cermet Trimmer

3/8 Square Multi-Turn Cermet Trimmer www.vishy.om 3/8" Squre Multi-Turn Cermet Trimmer Vishy Sfernie ermet element. FEATURES Industril grde The is smll size trimmer - 3/8" x 3/8" x 3/16" - nswering PC ord mounting requirements. Five versions

More information

& Y Connected resistors, Light emitting diode.

& Y Connected resistors, Light emitting diode. & Y Connected resistors, Light emitting diode. Experiment # 02 Ojectives: To get some hndson experience with the physicl instruments. To investigte the equivlent resistors, nd Y connected resistors, nd

More information

NP10 DIGITAL MULTIMETER Functions and features of the multimeter:

NP10 DIGITAL MULTIMETER Functions and features of the multimeter: NP10 DIGITL MULTIMETER. unctions nd fetures of the multimeter: 1000 V CT III tri requencies from 10.00...10 M. Diode mesurement nd continuity testing. HOLD mesurement. Reltive mesurement. Duty cycle (%)

More information

Fuzzy Logic Controller for Three Phase PWM AC-DC Converter

Fuzzy Logic Controller for Three Phase PWM AC-DC Converter Journl of Electrotechnology, Electricl Engineering nd Mngement (2017) Vol. 1, Number 1 Clusius Scientific Press, Cnd Fuzzy Logic Controller for Three Phse PWM AC-DC Converter Min Muhmmd Kml1,, Husn Ali2,b

More information

ABB STOTZ-KONTAKT. ABB i-bus EIB Current Module SM/S Intelligent Installation Systems. User Manual SM/S In = 16 A AC Un = 230 V AC

ABB STOTZ-KONTAKT. ABB i-bus EIB Current Module SM/S Intelligent Installation Systems. User Manual SM/S In = 16 A AC Un = 230 V AC User Mnul ntelligent nstlltion Systems A B 1 2 3 4 5 6 7 8 30 ma 30 ma n = AC Un = 230 V AC 30 ma 9 10 11 12 C ABB STOTZ-KONTAKT Appliction Softwre Current Vlue Threshold/1 Contents Pge 1 Device Chrcteristics...

More information

The Discussion of this exercise covers the following points:

The Discussion of this exercise covers the following points: Exercise 4 Bttery Chrging Methods EXERCISE OBJECTIVE When you hve completed this exercise, you will be fmilir with the different chrging methods nd chrge-control techniques commonly used when chrging Ni-MI

More information

Research Article Evaluation of Harmonic Content from a Tap Transformer Based Grid Connection System for Wind Power

Research Article Evaluation of Harmonic Content from a Tap Transformer Based Grid Connection System for Wind Power Journl of Renewle Energy Volume 2013, rtile ID 190573, 8 pges http://dx.doi.org/10.1155/2013/190573 Reserh rtile Evlution of Hrmoni ontent from Tp Trnsformer sed Grid onnetion System for Wind Power S.

More information

Engineer-to-Engineer Note

Engineer-to-Engineer Note Engineer-to-Engineer Note EE-236 Technicl notes on using Anlog Devices DSPs, processors nd development tools Contct our technicl support t dsp.support@nlog.com nd t dsptools.support@nlog.com Or visit our

More information

Switching Algorithms for the Dual Inverter fed Open-end Winding Induction Motor Drive for 3-level Voltage Space Phasor Generation

Switching Algorithms for the Dual Inverter fed Open-end Winding Induction Motor Drive for 3-level Voltage Space Phasor Generation S.Srinivs et l: Swithing Algorithms for the Dul Inverter fed... Swithing Algorithms for the Dul Inverter fed Open-end Winding Indution Motor Drive for 3-level Voltge Spe Phsor Genertion S. Srinivs nd V..

More information

Comparison of Geometry-Based Transformer Iron- Core Models for Inrush-Current and Residual-Flux Calculations

Comparison of Geometry-Based Transformer Iron- Core Models for Inrush-Current and Residual-Flux Calculations omprison of Geometry-Bsed Trnsformer Iron- ore Models for Inrush-urrent nd Residul-Flux lultions R. Yonezw, T. Nod Astrt--When trnsformer is energized, oltge drop is osered due to the inrush urrents. An

More information

1/4" Multi-Turn Fully Sealed Container Cermet Trimmer

1/4 Multi-Turn Fully Sealed Container Cermet Trimmer 1/4" Multi-Turn Fully Seled Continer Cermet Trimmer Due to their squre shpe nd smll size (6.8 mm x 6.8 mm x 5 mm), the multi-turn trimmers of the series re idelly suited for PCB use, enling high density

More information

(1) Non-linear system

(1) Non-linear system Liner vs. non-liner systems in impednce mesurements I INTRODUCTION Electrochemicl Impednce Spectroscopy (EIS) is n interesting tool devoted to the study of liner systems. However, electrochemicl systems

More information

Comparison of SVPWM and SPWM Techniques for Back to Back Converters in PSCAD

Comparison of SVPWM and SPWM Techniques for Back to Back Converters in PSCAD , 35 Otoer, 03, Sn Frniso, USA Comprison of SVPWM nd SPWM Tehniques for Bk to Bk Converters in PSCAD Agustin Hernndez, Ruen Tpi, Memer, IAENG, Omr Aguilr, nd Ael Gri Astrt This rtile presents the simultion

More information

Robustness Analysis of Pulse Width Modulation Control of Motor Speed

Robustness Analysis of Pulse Width Modulation Control of Motor Speed Proceedings of the World Congress on Engineering nd Computer Science 2007 WCECS 2007, October 24-26, 2007, Sn Frncisco, USA obustness Anlysis of Pulse Width Modultion Control of Motor Speed Wei Zhn Abstrct

More information

Domination and Independence on Square Chessboard

Domination and Independence on Square Chessboard Engineering nd Technology Journl Vol. 5, Prt, No. 1, 017 A.A. Omrn Deprtment of Mthemtics, College of Eduction for Pure Science, University of bylon, bylon, Irq pure.hmed.omrn@uobby lon.edu.iq Domintion

More information

ICL7116, ICL / 2 Digit, LCD/LED Display, A/D Converter with Display Hold. Description. Features. Ordering Information. Pinouts.

ICL7116, ICL / 2 Digit, LCD/LED Display, A/D Converter with Display Hold. Description. Features. Ordering Information. Pinouts. SEMICONDUCTOR ICL116, ICL11 August 199 3 1 / 2 Digit, LCD/LED Disply, A/D Converter with Disply Hold Fetures HOLD Reding Input Allows Indefinite Disply Hold Gurnteed Zero Reding for 0V Input True Polrity

More information

Pearson Education Limited Edinburgh Gate Harlow Essex CM20 2JE England and Associated Companies throughout the world

Pearson Education Limited Edinburgh Gate Harlow Essex CM20 2JE England and Associated Companies throughout the world Person Edution Limited Edinurgh Gte Hrlow Essex M20 2JE Englnd nd ssoited ompnies throughout the world Visit us on the World Wide We t: www.personed.o.uk Person Edution Limited 2014 ll rights reserved.

More information

Description PART NUMBER HI5812 (PDIP, CERDIP, SOIC) TOP VIEW V DD (LSB) D0 OEL D1 CLK D2 STRT D3 V REF - D4 V REF + D5 V IN D6 V AA + D7 V AA - D8

Description PART NUMBER HI5812 (PDIP, CERDIP, SOIC) TOP VIEW V DD (LSB) D0 OEL D1 CLK D2 STRT D3 V REF - D4 V REF + D5 V IN D6 V AA + D7 V AA - D8 Semiconductor ugust 1997 MOS 2 Microsecond, 12-it, Sampling /D onverter with Internal Track and Hold Features Description onversion Time........................... 2µs Throughput Rate........................5

More information

Improved sensorless control of a permanent magnet machine using fundamental pulse width modulation excitation

Improved sensorless control of a permanent magnet machine using fundamental pulse width modulation excitation Pulished in IET Eletri Power Applitions Reeived on 19th April 2010 Revised on 27th July 2010 doi: 10.1049/iet-ep.2010.0108 Improved sensorless ontrol of permnent mgnet mhine using fundmentl pulse wih modultion

More information

ECE 274 Digital Logic. Digital Design. Datapath Components Shifters, Comparators, Counters, Multipliers Digital Design

ECE 274 Digital Logic. Digital Design. Datapath Components Shifters, Comparators, Counters, Multipliers Digital Design ECE 27 Digitl Logic Shifters, Comprtors, Counters, Multipliers Digitl Design..7 Digitl Design Chpter : Slides to ccompny the textbook Digitl Design, First Edition, by Frnk Vhid, John Wiley nd Sons Publishers,

More information

(1) Primary Trigonometric Ratios (SOH CAH TOA): Given a right triangle OPQ with acute angle, we have the following trig ratios: ADJ

(1) Primary Trigonometric Ratios (SOH CAH TOA): Given a right triangle OPQ with acute angle, we have the following trig ratios: ADJ Tringles nd Trigonometry Prepred y: S diyy Hendrikson Nme: Dte: Suppose we were sked to solve the following tringles: Notie tht eh tringle hs missing informtion, whih inludes side lengths nd ngles. When

More information

Notes on Spherical Triangles

Notes on Spherical Triangles Notes on Spheril Tringles In order to undertke lultions on the elestil sphere, whether for the purposes of stronomy, nvigtion or designing sundils, some understnding of spheril tringles is essentil. The

More information

1/4" Multi-Turn Fully Sealed Container Cermet Trimmer

1/4 Multi-Turn Fully Sealed Container Cermet Trimmer www.vishy.om Vishy Sfernie 1/4" Multi-Turn Fully Seled Continer Cermet Trimmer Due to their squre shpe nd smll size (6.8 mm x 6.8 mm x 5 mm), the multi-turn trimmers of the series re idelly suited for

More information

Nevery electronic device, since all the semiconductor

Nevery electronic device, since all the semiconductor Proceedings of Interntionl Joint Conference on Neurl Networks, Orlndo, Florid, USA, August 12-17, 2007 A Self-tuning for Rel-time Voltge Regultion Weiming Li, Xio-Hu Yu Abstrct In this reserch, self-tuning

More information

THe overall performance and the cost of the heating

THe overall performance and the cost of the heating Journl of Eletril Engineering Spe etor Modultion For Three Phse ndution Dieletri Heting Y B Shukl nd S K Joshi Deprtment of Eletril Engineering The M.S.University of Brod dodr, ndi, e-mil : yshukl@yhoo.om,

More information

Engineer-to-Engineer Note

Engineer-to-Engineer Note Engineer-to-Engineer Note EE-297 Technicl notes on using Anlog Devices DSPs, processors nd development tools Visit our Web resources http://www.nlog.com/ee-notes nd http://www.nlog.com/processors or e-mil

More information

URL: mber=

URL:   mber= Wijnhoven, T.; Deonink, G., "Flexile fult urrent ontriution with inverter interfed distriuted genertion," in IEEE Power nd Energy Soiety Generl Meeting (PES), Vnouver, BC, Cnd, -5 July, 5 p. doi:.9/pesmg..66769

More information

Three-Phase NPC Inverter Using Three-Phase Coupled Inductor

Three-Phase NPC Inverter Using Three-Phase Coupled Inductor ThreePhse NPC Inverter Using ThreePhse Coupled Inductor Romeu Husmnn 1, Rodrigo d Silv 2 nd Ivo Brbi 2 1 Deprtment of Electricl nd Telecommuniction Engineering, University of Blumenu FURB Blumenu SC Brzil,

More information

(CATALYST GROUP) B"sic Electric"l Engineering

(CATALYST GROUP) Bsic Electricl Engineering (CATALYST GROUP) B"sic Electric"l Engineering 1. Kirchhoff s current l"w st"tes th"t (") net current flow "t the junction is positive (b) Hebr"ic sum of the currents meeting "t the junction is zero (c)

More information

ISSCC 2006 / SESSION 21 / ADVANCED CLOCKING, LOGIC AND SIGNALING TECHNIQUES / 21.5

ISSCC 2006 / SESSION 21 / ADVANCED CLOCKING, LOGIC AND SIGNALING TECHNIQUES / 21.5 21.5 A 1.1GHz Chrge-Recovery Logic Visvesh Sthe, Jung-Ying Chueh, Mrios Ppefthymiou University of Michign, Ann Aror, MI Boost Logic is chrge-recovery circuit fmily cple of operting t GHz-clss frequencies

More information

Modeling of Conduction and Switching Losses in Three-Phase Asymmetric Multi-Level Cascaded Inverter

Modeling of Conduction and Switching Losses in Three-Phase Asymmetric Multi-Level Cascaded Inverter Proceedings of the 5th WEA nt. onf. on Power ystems nd Electromgnetic omptibility, orfu, Greece, August 23-25, 2005 (pp176-181) Modeling of onduction nd witching Losses in Three-Phse Asymmetric Multi-Level

More information

GLONASS PhaseRange biases in RTK processing

GLONASS PhaseRange biases in RTK processing ASS PhseRnge ises in RTK proessing Gle Zyrynov Ashteh Workshop on GSS Bises 202 Bern Switzerlnd Jnury 8-9 202 Sope Simplified oservtion models for Simplified oservtion models for ASS FDMA speifi: lok nd

More information

Power Density and Efficiency Optimization of Resonant and Phase-Shift Telecom DC-DC Converters

Power Density and Efficiency Optimization of Resonant and Phase-Shift Telecom DC-DC Converters Power Density nd Effiieny Optimiztion of Resonnt nd PhseShift Teleom DCDC Converters U. Bdstuener, J. Biel nd J. W. Kolr Power Eletroni Systems Lortory, ETH Zurih ETHZentrum, ETL H12, Physikstrsse 3 CH892

More information

Module 9. DC Machines. Version 2 EE IIT, Kharagpur

Module 9. DC Machines. Version 2 EE IIT, Kharagpur Module 9 DC Mchines Version EE IIT, Khrgpur esson 40 osses, Efficiency nd Testing of D.C. Mchines Version EE IIT, Khrgpur Contents 40 osses, efficiency nd testing of D.C. mchines (esson-40) 4 40.1 Gols

More information

THE present trends in the development of integrated circuits

THE present trends in the development of integrated circuits On-chip Prmetric Test of -2 Ldder Digitl-to-Anlog Converter nd Its Efficiency Dniel Arbet, Vier Stopjková, Jurj Brenkuš, nd Gábor Gyepes Abstrct This pper dels with the investigtion of the fult detection

More information

To provide data transmission in indoor

To provide data transmission in indoor Hittite Journl of Science nd Engineering, 2018, 5 (1) 25-29 ISSN NUMBER: 2148-4171 DOI: 10.17350/HJSE19030000074 A New Demodultor For Inverse Pulse Position Modultion Technique Mehmet Sönmez Osmniye Korkut

More information

JUMO Wtrans B Programmable Head Transmitter with Radio Transmission

JUMO Wtrans B Programmable Head Transmitter with Radio Transmission Dt Sheet 707060 Seite 1/10 JUMO Wtrns B Progrmmble Hed Trnsmitter with Rdio Trnsmission Brief description The Wtrns B hed trnsmitter with wireless dt trnsmission is used in connection with Wtrns receiver

More information

Modeling and Control of a Six-Switch Single-Phase Inverter Christopher L. Smith. Electrical Engineering

Modeling and Control of a Six-Switch Single-Phase Inverter Christopher L. Smith. Electrical Engineering Modeling nd Control of Six-Swith Single-Phse Inverter Christopher. Smith Thesis sumitted to the Fulty of the irgini Polytehni Institute nd Stte University in prtil fulfillment of the requirements for the

More information

Interference Cancellation Method without Feedback Amount for Three Users Interference Channel

Interference Cancellation Method without Feedback Amount for Three Users Interference Channel Open Access Librry Journl 07, Volume, e57 ISSN Online: -97 ISSN Print: -9705 Interference Cncelltion Method without Feedbc Amount for Three Users Interference Chnnel Xini Tin, otin Zhng, Wenie Ji School

More information

A 24 GHz Band FM-CW Radar System for Detecting Closed Multiple Targets with Small Displacement

A 24 GHz Band FM-CW Radar System for Detecting Closed Multiple Targets with Small Displacement A 24 GHz Band FM-CW Radar System for Deteting Closed Multiple Targets with Small Displaement Kazuhiro Yamaguhi, Mitsumasa Saito, Takuya Akiyama, Tomohiro Kobayashi and Hideaki Matsue Tokyo University of

More information

ICL7106, ICL7107 ICL7106S, ICL7107S

ICL7106, ICL7107 ICL7106S, ICL7107S August 99 SEMICONDUCTOR Complete Dt Sheet ville vi we, Hrris home pge: http://www.semi.hrris.om or vi Hrris AnswerFAX, see Setion ICL06, ICL0 ICL06S, ICL0S 3 / 2 Digit, LCD/LED Disply, A/D Converters Fetures

More information

Exponential-Hyperbolic Model for Actual Operating Conditions of Three Phase Arc Furnaces

Exponential-Hyperbolic Model for Actual Operating Conditions of Three Phase Arc Furnaces Americn Journl of Applied Sciences 6 (8): 1539-1547, 2009 ISSN 1546-9239 2009 Science Publictions Exponentil-Hyperbolic Model for Actul Operting Conditions of Three Phse Arc Furnces 1 Mhdi Bnejd, 2 Rhmt-Allh

More information

Multivariable integration. Multivariable integration. Iterated integration

Multivariable integration. Multivariable integration. Iterated integration Multivrible integrtion Multivrible integrtion Integrtion is ment to nswer the question how muh, depending on the problem nd how we set up the integrl we n be finding how muh volume, how muh surfe re, how

More information

Understanding Three-Phase Transformers

Understanding Three-Phase Transformers PDH ourse E450 (4 PDH) Understnding Three-Phse Trnsformers Rlph Fehr, Ph.D., P.E. 2014 PDH Online PDH enter 5272 Medow Esttes Drive Firfx, V 22030-6658 Phone & Fx: 703-988-0088 www.pdhonline.org www.pdhenter.om

More information

TRANSIENT VOLTAGE DISTRIBUTION IN TRANSFORMER WINDING (EXPERIMENTAL INVESTIGATION)

TRANSIENT VOLTAGE DISTRIBUTION IN TRANSFORMER WINDING (EXPERIMENTAL INVESTIGATION) IJRET: Interntionl Journl of Reserh in Engineering nd Tehnology ISSN: 2319-1163 TRANSIENT VOLTAGE DISTRIBUTION IN TRANSFORMER WINDING (EXPERIMENTAL INVESTIGATION) Knhn Rni 1, R. S. Goryn 2 1 M.teh Student,

More information

Engineer-to-Engineer Note

Engineer-to-Engineer Note Engineer-to-Engineer Note EE-247 Technicl notes on using Anlog Devices DSPs, processors nd development tools Contct our technicl support t dsp.support@nlog.com nd t dsptools.support@nlog.com Or visit our

More information

Proposed Cable Tables for SAS2

Proposed Cable Tables for SAS2 Tle 50 Requirements for internl le ssemlies using SASDrive onnetors n kplnes. Requirement, Units 1,5 Gps 3Gps 6 Gps Bulk le or kplne:, Differentil impene ohm 100 ± 10 100 g Common-moe impene ohm 32,5 ±

More information

Postprint. This is the accepted version of a paper presented at IEEE PES General Meeting.

Postprint.   This is the accepted version of a paper presented at IEEE PES General Meeting. http://www.div-portl.org Postprint This is the ccepted version of pper presented t IEEE PES Generl Meeting. Cittion for the originl published pper: Mhmood, F., Hooshyr, H., Vnfretti, L. (217) Sensitivity

More information

Y9.ET1.3 Implementation of Secure Energy Management against Cyber/physical Attacks for FREEDM System

Y9.ET1.3 Implementation of Secure Energy Management against Cyber/physical Attacks for FREEDM System Y9.ET1.3 Implementtion of Secure Energy ngement ginst Cyber/physicl Attcks for FREED System Project Leder: Fculty: Students: Dr. Bruce cillin Dr. o-yuen Chow Jie Dun 1. Project Gols Develop resilient cyber-physicl

More information

ALONG with the maturity of mobile cloud computing,

ALONG with the maturity of mobile cloud computing, An Optiml Offloding Prtitioning Algorithm in Moile Cloud Computing Huming Wu, Dniel Seidenstüker, Yi Sun, Crlos Mrtín Nieto, Willim Knottenelt, nd Ktink Wolter system, nd their min gol is to keep the whole

More information

Analog computation of wavelet transform coefficients in real-time Moreira-Tamayo, O.; Pineda de Gyvez, J.

Analog computation of wavelet transform coefficients in real-time Moreira-Tamayo, O.; Pineda de Gyvez, J. Anlog computtion of wvelet trnsform coefficients in rel-time Moreir-Tmyo, O.; Pined de Gyvez, J. Published in: IEEE Trnsctions on Circuits nd Systems. I, Fundmentl Theory nd Applictions DOI: 0.09/8.558443

More information

DATASHEET HI5812. Features. Applications. Ordering Information. Pinout

DATASHEET HI5812. Features. Applications. Ordering Information. Pinout DTSHEET HI5812 MOS 20 Microsecond, 12-it, Sampling /D onverter with Internal Track and Hold FN3214 Rev 6.00 The HI5812 is a fast, low power, 12-bit, successive approximation analog-to-digital converter.

More information

CS 135: Computer Architecture I. Boolean Algebra. Basic Logic Gates

CS 135: Computer Architecture I. Boolean Algebra. Basic Logic Gates Bsic Logic Gtes : Computer Architecture I Boolen Algebr Instructor: Prof. Bhgi Nrhri Dept. of Computer Science Course URL: www.ses.gwu.edu/~bhgiweb/cs35/ Digitl Logic Circuits We sw how we cn build the

More information

MAXIMUM FLOWS IN FUZZY NETWORKS WITH FUNNEL-SHAPED NODES

MAXIMUM FLOWS IN FUZZY NETWORKS WITH FUNNEL-SHAPED NODES MAXIMUM FLOWS IN FUZZY NETWORKS WITH FUNNEL-SHAPED NODES Romn V. Tyshchuk Informtion Systems Deprtment, AMI corportion, Donetsk, Ukrine E-mil: rt_science@hotmil.com 1 INTRODUCTION During the considertion

More information

Section 16.3 Double Integrals over General Regions

Section 16.3 Double Integrals over General Regions Section 6.3 Double Integrls over Generl egions Not ever region is rectngle In the lst two sections we considered the problem of integrting function of two vribles over rectngle. This sitution however is

More information

HI5812. CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold. Features. Applications. Ordering Information.

HI5812. CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold. Features. Applications. Ordering Information. Data Sheet March 31, 2005 FN3214.6 MOS 20 Microsecond, 12-it, Sampling /D onverter with Internal Track and Hold The is a fast, low power, 12-bit, successive approximation analog-to-digital converter. It

More information

A New Control for Series Compensation of UPQC to Improve Voltage Sag/Swell

A New Control for Series Compensation of UPQC to Improve Voltage Sag/Swell AUT Journl of Modeling nd Simultion AUT J. Model. Simul., 49()(7)7584 DOI:.6/misj.6.843 A New Control for Series Compenstion of to Improve oltge Sg/Swell M. Torin Esfhni, nd B. hidi Dept. of Eletril Engineering,

More information

EE Controls Lab #2: Implementing State-Transition Logic on a PLC

EE Controls Lab #2: Implementing State-Transition Logic on a PLC Objective: EE 44 - Controls Lb #2: Implementing Stte-rnsition Logic on PLC ssuming tht speed is not of essence, PLC's cn be used to implement stte trnsition logic. he dvntge of using PLC over using hrdwre

More information

Defining the Rational Numbers

Defining the Rational Numbers MATH10 College Mthemtis - Slide Set 2 1. Rtionl Numers 1. Define the rtionl numers. 2. Redue rtionl numers.. Convert etween mixed numers nd improper frtions. 4. Express rtionl numers s deimls.. Express

More information

MEASURE THE CHARACTERISTIC CURVES RELEVANT TO AN NPN TRANSISTOR

MEASURE THE CHARACTERISTIC CURVES RELEVANT TO AN NPN TRANSISTOR Electricity Electronics Bipolr Trnsistors MEASURE THE HARATERISTI URVES RELEVANT TO AN NPN TRANSISTOR Mesure the input chrcteristic, i.e. the bse current IB s function of the bse emitter voltge UBE. Mesure

More information

TRANSISTORS: DYNAMIC CIRCUITS. Introduction

TRANSISTORS: DYNAMIC CIRCUITS. Introduction TRANSISTORS: DYNAMIC CIRCUITS Introdution The point of biasing a iruit orretly is that the iruit operate in a desirable fashion on signals that enter the iruit. These signals are perturbations about the

More information

10.4 AREAS AND LENGTHS IN POLAR COORDINATES

10.4 AREAS AND LENGTHS IN POLAR COORDINATES 65 CHAPTER PARAMETRIC EQUATINS AND PLAR CRDINATES.4 AREAS AND LENGTHS IN PLAR CRDINATES In this section we develop the formul for the re of region whose oundry is given y polr eqution. We need to use the

More information

5 I. T cu2. T use in modem computing systems, it is desirable to. A Comparison of Half-Bridge Resonant Converter Topologies

5 I. T cu2. T use in modem computing systems, it is desirable to. A Comparison of Half-Bridge Resonant Converter Topologies 74 EEE TRANSACTONS ON POER ELECTRONCS, VOL. 3, NO. 2, APRL 988 A Comprison of Hlf-Bridge Resonnt Converter Topologies Abstrct-The hlf-bridge series-resonnt, prllel-resonnt, nd combintion series-prllel

More information

Double Integrals over Rectangles

Double Integrals over Rectangles Jim Lmbers MAT 8 Spring Semester 9- Leture Notes These notes orrespond to Setion. in Stewrt nd Setion 5. in Mrsden nd Tromb. Double Integrls over etngles In single-vrible lulus, the definite integrl of

More information

Evaluating territories of Go positions with capturing races

Evaluating territories of Go positions with capturing races Gmes of No Chne 4 MSRI Pulitions Volume 63, 2015 Evluting territories of Go positions with pturing res TEIGO NAKAMURA In nlysing pturing res, or semeis, we hve een fousing on the method to find whih plyer

More information

CHAPTER 3 EDGE DETECTION USING CLASICAL EDGE DETECTORS

CHAPTER 3 EDGE DETECTION USING CLASICAL EDGE DETECTORS CHAPTER 3 EDE DETECTION USIN CLASICAL EDE DETECTORS Edge detection is one o te most importnt opertions in imge nlsis. An edge is set o connected piels tt lie on te boundr between two regions. Te clssiiction

More information