Understanding Basic Analog Ideal Op Amps


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1 Appliction Report SLAA068A  April 2000 Understnding Bsic Anlog Idel Op Amps Ron Mncini Mixed Signl Products ABSTRACT This ppliction report develops the equtions for the idel opertionl mplifier (op mp). It ssumes tht slient prmeters re perfect. Severl exmples of op mp circuits re described. Contents Introduction The Noninverting Op Amp The Inverting Op Amp The Adder The Differentil Amplifier Complex Feedbck Networks Video Amplifiers Cpcitors Conclusions List of Figures 1 The Noninverting Op Amp The Inverting Op Amp The Adder Circuit The Differentil Amplifier Differentil Amplifier With CommonMode Input Signl T Network in Feedbck Loop Thevenin s Theorem Applied to T Network Video Amplifier LowPss Filter HighPss Filter
2 Introduction The nme Idel Op Amp is pplied to this nd similr nlysis becuse the slient prmeters of the op mp re ssumed to be perfect. There is no such thing s n idel op mp, but present dy op mps come so close to idel tht Idel Op Amp nlysis becomes close to ctul nlysis. Op mps deprt from the idel in two wys. First, dc prmeters, such s input offset voltge, re lrge enough to cuse deprture from the idel. The idel ssumes tht input offset voltge is zero. Second, c prmeters, such s gin, re function of frequency, so they go from lrge vlues t dc to smll vlues t high frequencies. Both error sources re treted in lter Understnding. ppliction notes published in this series. This ssumption simplifies the nlysis, thus it clers the pth for insight. It is so much esier to see the forest when brush nd huge trees do not surround you. Although the idel op mp nlysis mkes use of perfect prmeters, the nlysis is often vlid becuse some op mps pproch perfection. In ddition, when working t low frequencies, severl khz, the idel op mp nlysis produces ccurte nswers. Voltge feedbck op mps re covered in this ppliction note, nd current feedbck op mps re covered in lter ppliction notes. Severl ssumptions hve to be mde before the idel op mp nlysis cn proceed. First, ssume tht the current flow into the input leds of the op mp is zero. This ssumption is lmost true in FET op mps where input currents cn be less thn pa, but this is not lwys true in bipolr highspeed op mps where tens of µa input currents re found. Second, the op mp gin is ssumed to be infinite, hence it drives the output voltge to ny vlue required to stisfy the input conditions. This ssumes tht the op mp output voltge cn chieve ny vlue. Sturtion occurs when the output voltge comes close to power supply ril, but relity does not negte the ssumption, it only bounds it. Also, implicit in the infinite gin ssumption is the need for zero input signl. The gin drives the output voltge until the voltge between the input leds (the error voltge) is zero. This leds to the third ssumption tht the voltge between the input leds is zero. The impliction of zero voltge between the input leds mens tht if one input is tied to hrd voltge source such s ground, then the other input is t the sme potentil. The current flow into the input leds is zero, so the input impednce of the op mp is infinite. Four, the output impednce of the idel op mp is zero. The idel op mp cn drive ny lod without n output impednce dropping voltge cross it. The output impednce of most op mps is frction of n ohm for low current flows, so this ssumption is vlid in most cses. Five, the frequency response of the idel op mp is flt; this mens tht the gin does not vry s frequency increses. By constrining the use of the op mp to the low frequencies, we mke the frequency response ssumption true. PARAMETER NAME PARAMETERS SYMBOL VALUE Input current IIN 0 Input offset voltge VOS 0 Input impednce ZIN Output impednce ZOUT 0 Gin 2 Understnding Bsic Anlog Idel Op Amps
3 The Noninverting Op Amp The noninverting op mp hs the input signl connected to its noninverting input, thus its input source sees n infinite impednce. There is no input offset voltge becuse V OS = V E = 0, hence the negtive input must be t the sme voltge s the positive input. The op mp output drives current into until the negtive input is t the voltge,. This ction cuses to pper cross. The voltge divider rule is used with being the input to the voltge divider, nd being the output of the voltge divider. Since no current cn flow into either op mp led, use of the voltge divider rule is llowed. Eqution 1 is written with the id of the voltge divider rule, nd lgebric mnipultion yields eqution 2 in the form for gin prmeter. VE Figure 1. The Noninverting Op Amp (1) 1 (2) When becomes very lrge with respect to, / 0 nd eqution 2 reduces to eqution 3. 1 Under these conditions = 1 nd the circuit becomes unity gin buffer. is usully deleted to chieve the sme results, nd when is deleted, cn lso be deleted ( must be shorted when it is deleted). When nd re deleted, the op mp output is connected to its inverting input with wire. Some op mps re selfdestructive when is left out of the circuit, so is used in mny buffer designs. When is included in buffer circuit, its function is to protect the inverting input from n over voltge, nd it cn hve lmost ny vlue (20k is often used). cn never be left out of the circuit in current feedbck mplifier design becuse determines stbility in current feedbck mplifiers. Notice tht the gin is only function of the feedbck nd gin resistors, so the feedbck hs ccomplished its function of mking the gin independent of the op mp prmeters. The gin is djusted by vrying the rtio of the resistors. The ctul resistor vlues re determined by the impednce levels tht the designer wnts to estblish. If = 10K nd = 10K the gin is two s shown in eqution 2, nd if = 100K nd = 100K the gin is still two. The impednce levels of 10 K or 100 K determine the current drin, the effect stry cpcitnce will hve, nd few other points. The impednce level does not set the gin; the rtio of / does. (3) Understnding Bsic Anlog Idel Op Amps 3
4 The Inverting Op Amp The noninverting input of the inverting op mp circuit is grounded. One ssumption we mde is tht the input error voltge is zero, so the feedbck keeps inverting the input of the op mp t virtul ground (not ctul ground but cting like ground). The current flow in the input leds is ssumed to be zero, hence the current flowing through equls the current flowing through. Using Kirchoff s lw, we write eqution 4. Algebric mnipultion gives us eqution 5. I1 IB I2 VE IB Figure 2. The Inverting Op Amp I 1 I 2 (4) Notice tht the gin is only function of the feedbck nd gin resistors, so the feedbck hs ccomplished its function of mking the gin independent of the op mp prmeters. The ctul resistor vlues re determined by the impednce levels tht the designer wnts to estblish. If =10K nd =10K the gin is minus one s shown in eqution 5, nd if =100K nd =100K the gin is still minus one. The impednce levels of 10K or 100K determine the current drin, the effect stry cpcitnce will hve, nd few other points, but the impednce level does not set the gin; the rtio of / does. One finl note; the output signl is the input signl mplified nd inverted. The input impednce is set by becuse the inverting input led is held t virtul ground. The Adder An dder circuit cn be mde by connecting more inputs to the inverting op mp. The opposite end of the resistor connected to the inverting input is held t virtul ground by the feedbck; therefore, dding new inputs does not ffect the response of the existing inputs. (5) V1 V2 VN R1 R2 RN Figure 3. The Adder Circuit Superposition is used to clculte the output voltges resulting from ech input, nd the output voltges re dded lgebriclly to obtin the totl output voltge. Eqution 6 is the output eqution when V 1 nd V 2 re grounded. Equtions 7 nd 8 re the other superposition equtions, nd the finl result is given in eqution 9. 4 Understnding Bsic Anlog Idel Op Amps
5 N R N V N (6) 1 V 1 2 V 2. V 1 V 2 R N V N. (7) (8) (9) The Differentil Amplifier The differentil mplifier circuit mplifies the difference between signls pplied to the inputs. Superposition is used to clculte the output voltge resulting from ech input voltge, nd then the two output voltges re dded to rrive t the finl output voltge. V1 R1 R2 V V V2 R3 R4 Figure 4. The Differentil Amplifier The op mp input voltge resulting from the input source, V 1, is clculted in equtions 10 nd 11. The voltge divider rule is used to clculte the voltge, V, nd the noninverting gin eqution (eqution 2) is used to clculte the noninverting output voltge, 1. V V 1 1 V (G ) V 1.. The inverting gin (eqution 5) is used to clculte the stge gin for 2 in eqution 12. These inverting nd noninverting gins re dded in eqution V 2.. (12) (10) (11) V 1.. V 2 (13) When = nd =, eqution 13 reduces to eqution 14.. V1 V 2. (14) Understnding Bsic Anlog Idel Op Amps 5
6 It is now obvious tht the differentil signl, (V 1 V 2 ), is multiplied by the stge gin, so the nme differentil mplifier suits the circuit. Becuse it only mplifies the differentil portion of the input signl, it rejects the commonmode portion of the input signl. A commonmode signl is illustrted in Figure 5. Becuse the differentil mplifier strips off or rejects the commonmode signl, this circuit configurtion is often employed to strip dc or injected commonmode noise off signl. V1 VCM V2 Figure 5. Differentil Amplifier With CommonMode Input Signl The disdvntge of this circuit is tht the two input impednces cnnot be mtched when it functions s differentil mplifier, thus there re two nd three op mp versions of this circuit specilly designed for high performnce pplictions requiring mtched input impednces. Complex Feedbck Networks When complex feedbck networks re put into the feedbck loop, the circuits get hrder to nlyze becuse the gin equtions cn not be used. The usul technique is to write node or loop equtions, nd to solve these equtions. Becuse component is grounded, superposition is not of ny use, but Thevenin s theorem usully cn be used s is shown in the exmple problem given below. Sometimes it is desirble to hve low resistnce pth to ground in the feedbck loop. Stndrd inverting op mps cn not do this when the driving circuit sets the input resistor vlue, nd the gin specifiction sets the feedbck resistor vlue. Inserting T network in the feedbck loop yields degree of freedom tht enbles both specifictions to be met with low dc resistnce pth in the feedbck loop. X R1 R2 Y R4 Figure 6. T Network in Feedbck Loop Brek the circuit t point X Y, stnd on the terminls looking into, nd clculte the Thevenin equivlent voltge s shown in eqution 15. The Thevenin equivlent impednce is clculted in eqution Understnding Bsic Anlog Idel Op Amps
7 V TH R TH (15) (16) Replce the output circuit with the Thevenin equivlent circuit s shown in Figure 7, nd clculte the gin with the id of the inverting gin eqution s shown in eqution 17. R1 R2 RTH VTH Figure 7. Thevenin s Theorem Applied to T Network Substituting the Thevenin equivlents into eqution 17 yields eqution 18. V TH R TH R TH... R3... (17) (18) Algebric mnipultion yields eqution 19. (19) Specifictions for the circuit you re required to build re n inverting mplifier with n input resistnce of 10K ( = 10K), gin of 100, nd feedbck resistnce of 20K or less. The inverting op mp circuit cn not meet these specifictions becuse must equl 1000K. Inserting T network with = = 10K nd = 485K does meet the specifictions. Video Amplifiers Video signls contin high frequencies, nd they use coxil cble to trnsmit nd receive signls. The cble connecting these circuits hs chrcteristic impednce of 75 Ω. To prevent reflections, which cuse distortion nd ghosting, the input nd output circuit impednces must mtch the 75 Ω cble. Mtching the input impednce is simple for noninverting mplifier becuse its input impednce is very high; just mke R IN = 75 Ω. nd cn be selected s very high vlues, in the kω rnge, so tht they hve miniml ffect on the impednce of the input or output circuit. A mtching resistor, R M, is plced in series with the op mp output to rise its output impednce to 75 Ω; terminting resistor, R T, is plced t the input of the next stge to mtch the cble. Understnding Bsic Anlog Idel Op Amps 7
8 RIN RM RT Figure 8. Video Amplifier The mtching nd terminting resistors re equl in vlue, nd they form voltge divider of 1/2 becuse R T is not loded. Very often is selected equl to so tht the op mp gin equls two. Then the system gin, which is the op mp gin multiplied by the divider gin, is equl to one (2 1/2 = 1). Cpcitors Cpcitors re key component in circuit designer s tool kit, thus short discussion on evluting their ffect on circuit performnce is in order. Cpcitors hve n impednce of X C = 1 (2πfC). Note tht when the frequency is zero the cpcitive impednce (lso known s rectnce) is infinite, nd tht when the frequency is infinite the cpcitive impednce is zero. These endpoints re derived from the finl vlue theorem, nd they re used to get rough ide of the ffect of cpcitor. When cpcitor is used with resistor, they form wht is clled brekpoint. Without going into complicted mth, just ccept tht the brek frequency occurs t f = 1/(2π RC) nd the gin is 3 db t the brek frequency. CF Figure 9. LowPss Filter The low pss filter circuit hs cpcitor in prllel with the feedbck resistor. The gin for the low pss filter is given in eqution 20. X C At very low frequencies X C, so domintes the prllel combintion in eqution 20, nd the cpcitor hs no effect. The gin t low frequencies is /. At very high frequencies X C 0, so the feedbck resistor is shorted out, thus reducing the circuit gin to zero. At the frequency where X C = the gin is reduced to hlf or 3 db becuse equl impednces in prllel equl hlf the vlue of either impednce. Connecting the cpcitor in prllel with where it hs the opposite effect mkes high pss filter. Eqution 21 gives the eqution for the high pss filter. (20) 8 Understnding Bsic Anlog Idel Op Amps
9 CG Figure 10. HighPss Filter 1 X C (21) At very low frequencies X C, so domintes the prllel combintion in eqution 21, nd the cpcitor hs no effect. The gin t low frequencies is 1 /. At very high frequencies X C 0, so the gin setting resistor is shorted out thus incresing the circuit gin to mximum. This simple technique is used to predict the form of circuit trnsfer function rpidly. Better nlysis techniques re presented in more dvnced ppliction notes for those pplictions requiring more precision. Conclusions When the proper ssumptions re mde, the nlysis of op mp circuits is strightforwrd. These ssumptions, which include zero input current, zero input offset voltge, nd infinite gin, re not n unrelistic ssumption becuse the new op mps mke them true in mny pplictions. When the signl is comprised of low frequencies, the gin ssumption is vlid becuse op mps hve very high gin t low frequencies. When CMOS op mps re used, the input current is in the femto mp rnge; close enough to zero for most pplictions. Lser trimmed input circuits reduce the input offset voltge to few micro volts; close enough to zero for most pplictions. The idel op mp is becoming rel; especilly for undemnding pplictions. The mth required for idel op mp nlysis is not rigorous, thus most people should be ble to nlyze simple op mp circuits. The more dvnced pplictions require complex op mp circuits, but there re mny of these shown in the pplictions literture. Grb TI op mp nd hve fun. Understnding Bsic Anlog Idel Op Amps 9
10 IMPORTANT NOTICE Texs Instruments nd its subsidiries (TI) reserve the right to mke chnges to their products or to discontinue ny product or service without notice, nd dvise customers to obtin the ltest version of relevnt informtion to verify, before plcing orders, tht informtion being relied on is current nd complete. All products re sold subject to the terms nd conditions of sle supplied t the time of order cknowledgment, including those pertining to wrrnty, ptent infringement, nd limittion of libility. TI wrrnts performnce of its semiconductor products to the specifictions pplicble t the time of sle in ccordnce with TI s stndrd wrrnty. Testing nd other qulity control techniques re utilized to the extent TI deems necessry to support this wrrnty. Specific testing of ll prmeters of ech device is not necessrily performed, except those mndted by government requirements. Customers re responsible for their pplictions using TI components. In order to minimize risks ssocited with the customer s pplictions, dequte design nd operting sfegurds must be provided by the customer to minimize inherent or procedurl hzrds. TI ssumes no libility for pplictions ssistnce or customer product design. TI does not wrrnt or represent tht ny license, either express or implied, is grnted under ny ptent right, copyright, msk work right, or other intellectul property right of TI covering or relting to ny combintion, mchine, or process in which such semiconductor products or services might be or re used. TI s publiction of informtion regrding ny third prty s products or services does not constitute TI s pprovl, wrrnty or endorsement thereof. Copyright 2000, Texs Instruments Incorported
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