AP1511A/B BRILLIANT ENERGY MICROELECTRONICS TECHNOLOGY CO.,LTD. IR Filter Switch Driver

Transcription

1 BRILLIANT ENERGY MICROELECTRONICS TECHNOLOGY CO.,LTD AP1511A/B DESCRIPTION SOT-26 AP1511 is designed for IR-Cut Removable (ICR) driver IC designed to switch an infrared filter. AP1511 has a low saturation voltage bi-directional H-bridge driver circuit. Built-in protection diode to clear the resulting feedback current ICR and to prevent ESD damage. Bi-directional H-bridge driver circuit AP1511 within their resistance is less than 3 ohm, so the required ICR module determined by their current coil impedance to the power supply 5 volts, for example, when the ICR internal 300mA current flowing through the coil, AP1511 H-bridge driving circuit will generate 0.73V voltage drop. AP1511A provided with single-wire control wire control, and AP1511B single line control and provide a single-step operation (One-Shot) function. FEATURES 1.8V input level low saturation voltage 300mA, VDD = 5V) low standby current (<10uA) operating voltage of 2.5V to 5.5V PIN CONFIGURATION Pin # Mnemonic I/O Description 1 ENB I Low-active enable CE I External capacitor 2 GND - Ground 3 FBC I Forward/Backward control 4 OU 1 O Driver output 1 5 VDD - Power supply 6 OU 2 O Driver output 2 1/8 1

2 Absolute Maximum Ratings (unless otherwise specified, Temperature=25 ) Characteristicic mbol Rating Unit Supply Voltage VDD 5.5 V Input Voltage VIN VDD+0.4V Output Current ( Continue ) IOUT 500 ma ( Pulse, 50% duty ) Operating Temperature Range TOPR -40~125 Storage Temperature Range TSTO -65~ Electrical Characteristics (unless otherwise specified, Temperature=25 & VDD=5.0V) Characteristic Sym. Condition Limit Min. yp. Max. Unit Supply Voltage VDD V Supply Current ISTB(A) ISTB(B) Driver input control ENB/FBC Steady state or standby state version A Steady state or standby state version B μa μa IDD Transit state ma Input High H VIH VDD+0.4 V Input High L VIL *VDD V Driver output OUT1/OUT2 Output Voltage (upper + lower) VOUT1 I OUT = 200 ma V VOUT2 I OUT = 300 ma V VOUT3 I OUT = 400 ma V Rise transition time TR From 0.1*VDD to 0.9*VDD n Fall transition time TF From 0.9*VDD to 0.1*VDD n 2/8 1

3 Characteristictic m. Condition Limit Unit Propagation Delay Time ENB OUT1 / 2 ( L to H ) ENB OUT1 / 2 ( H to L ) t plh t phl VDD = 5V, Load = 18 Pulse Width of ENB t PW n Maximum frequency of ENB f MAX MH Propagation delay time between ENB and OUT1/2 PWM waveform for ENB 3/8

4 Typical Application ( AP1511A ) Truth Table and Diagram of Controls 4/8

5 Typical Application ( AP1511B ) Truth Table and Diagram of Controls T One-Shot length is determined by the CE pin connected to the external capacitor. Its relation to T one-shot = 1.3 x 10 6 x C CE ( second ) When the external capacitor value is fixed, IC temperature rise 1, Tone-Shot will be reduced by 0.2%. In fact the average value of the capacitor will vary with temperature, 25 maximum capacitance value, the capacitance value will deviate from 25 reduced. therefore proposed Tone-Shot is set to double the time required ICR so at any temperature are normal operation. 5/8

6 VCC Rb C1 Sensor - + OP1 Vo AP1511 FBC VCC Vcmp R3 Vcom + OP2 C2 R4 - Vcmp _ H = Vcc + Vcom + R 1+ ( Vo = Vc c ) Vcmp _ L = 0 + Vcom = Vcom R 1+ R 1+ R 1+ ( Vo = GND ) Vo Vo Vm Vm Vcc Vcc GND Vcmp_L Vcmp_H Vcmp GND Vth Vcmp ( )/ 2 = Vcc + Vcom Vth = Vcmp _ H +Vcmp _ L ( ) Vm = Vcmp _ H Vcmp _ L 2(+ ) / 2 = Vcc 2(+ ) R 1+ Description OPAMP above formula composed of the Schmitt trigger circuit How to calculate Vth and Vm, the voltage value can be determined by and. When the input signal is above or below Vcmp_H Vcmp_L, Schmitt trigger circuit output changes this feature can improve a noise tolerance and eliminate interference. 6/8

7 The AP1511 and FBC ENB pin is high impedance input, no upgrade includes resistor. Under most circumstances, AP1511 is controlled by the MCU or HOST CPU GPIO. GPIO two forms three-state output (tri-states output) and open-drain output (open-drain output). HOST CPU VDD AP1511 HOST CPU CORE Input Buffer Drive Circuit HOST CPU with tri-state output buffer Because the tri-state output can send a high level and low level VDD GND. So this one kind of ENB GPIO directly to the AP1511 and FBC pins can be. HOST CPU VDD VDD AP1511 Rp HOST CPU CORE Input Buffer Drive Circuit Host CPU with open-drain output buffer If the open-drain output which can output low GND, it is necessary to add a resistor Rp enhance the GPIO to generate a high level VDD. This a pull-up resistor Rp resistance of about several hundred k can Smaller pull-up resistor can be obtained faster rise time, but when the GPIO output low level would be more power. 7/8

8 Symbol Dimensions in Millimeters Dimensions in Inches Min Max Min Max A A A b C D E e 0.95 TYP TYP e TYP TYP H L θ Q'ty / Reel Reel Size 3000pcs 7" DWG NO:HN-SOT A1 8/8