Dual 2W Power Amplifier, I 2 C interface Stereo Input with Volume Control

Transcription

1 Dual W Power Amplifier, I C interface Stereo Input with Volume Control FEATURES Operation range:.4v ~ 6.5V Volume control range Gain: 0 to db, 3dB/step Attenuation: 0 to -77.5dB,.5dB/step Output mode : Speaker( BTL)/Headphone(SE) BTL Output power R L =4Ω, W at 5V, 0.8W at 3.3V, 360mW at.4v R L =8Ω,.3W at 5V, 0.53W at 3.3V, 50mW at.4v SE Output power R L =3Ω, 93mW at 5V, 35mW at 3.3V, 5mW at.4v Control interface : I C Excellent Power Supply Rejection Ratio(PSRR) Flexibility power management Component less Reduce pop noise circuit Housed in TSSOP6(enhanced thermal PAD) package APPLICATIONS Multimedia system, Portable Digital Audio. DESCRIPTION The is low distortion stereo power amplifier (SE/BTL) integrated volume control. It can drive W of continuous average power into a dual 4Ω bridged-tied (BTL) speaker or * 90mW into stereo 3Ω single ended (SE) headphone. The volume control offers wide range of gain and attenuation for stereo input. All of the functions are easy setting that can be set by IC interface. The has good features for portable equipment, including wide voltage operation.4v~6.5v, low power consumption, power management, component less, make the ideally suitable for use in the portable digital audio equipments. BLOCK DIAGRAM REV 3 /9

2 PIN CONFIGURATION Symbol Pin Description V SS Connected to ground CAP Capacitor connected RIN 3 Right channel input AV SS 4 Negative supply voltage OUTR- 5 SE right channel output or negative output of BTL right channel PV DDR 6 Positive supply voltage for right channel of power amplifier OUTR 7 Positive output of BTL right channel PV SSR 8 Negative supply voltage for right channel of power amplifier PV SSL 9 Negative supply voltage for left channel of power amplifier OUTL 0 Positive output of BTL left channel PV DDL Positive supply voltage for left channel of power amplifier OUTL- SE left channel output or negative output of BTL left channel AV DD 3 Positive supply voltage LIN 4 Left channel input SDA 5 I C data input SCL 6 I C clock input Note:. SE: Single Ended. BTL: Bridged-Tied Load VSS CAP RIN AVSS PVDDR OUTR PVSSR 6 SCL Thermal Pad, TSSOP SDA LIN AVDD OUTR- OUTL- PVDDL OUTL PVSSL ORDERING INFORMATION Package Part number Packaging Marking Transport Media 6Pin TSSOP (lead free) TGTR G.5k Units Tape and Reel 6Pin TSSOP (lead free) TGU G 90 Units Tube RoHS Compliance ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating Unit VDD Supply voltage 6.5 V V ESD Electrostatic handling 000 V T STG Storage temperature range -65 to 50 T A Operating ambient temperature range -40 to 85 T J Maximum junction temperature 50 T S Soldering temperature, 0 seconds 60 R THJA Thermal resistance from junction to ambient in free air TSSOP6 (enhanced thermal pad) 5 /W REV 3 /9

3 OPERATING RATINGS Symbol Parameter Min Typ Max Unit V DD Supply voltage V 5V ELECTRICAL CHARACTERISTICS (Ta=5, V DD =5V, V SS =0V, f=khz; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics V CAP V DC I Q Voltage at CAP Output DC level Quiescent current 0.5V DD 0.5V 0.5V DD DD V DD 0.5V 0.5V DD DD 0.05 All devices are active, BTL All devices are active, SE 6.7 L-ch (R-ch) PD, BTL 5. L-ch (R-ch) PD, SE 3.4 All devices power down I PD Power down current All devices power down, ua except CAP=/ VDD ATT Mute attenuation -90 db GA RAN Gain/Attenuation range Gain 0 - db Attenuation db G STEP Gain step db A STEP Attenuation step db E GA Gain/Attenuation step error db V ICH Serial interface high input level V V ICL Serial interface low input level 0.8 V AC Characteristics PSRR CS THDN S/N Po PD: Power Down Power supply rejection ratio Channel separation Total harmonic distortion plus Noise Signal-to-noise ratio Maximum output power BTL Mode, R L =8Ω CAP=uF, f=00hz SE Mode, R L =3Ω CAP=uF, f=00hz BTL Mode, R L =8Ω Po=W SE Mode, R L =3Ω Po=60mW SE mode, R L =3Ω, 75mW SE mode, A-weighting, 75mW BTL Mode, R L = 4Ω THDN = % BTL Mode, R L = 8Ω THDN = % SE Mode, R L = 3Ω THDN = 0.% V V ma db db db db db % db - - W W - 93m - W REV 3 3/9

4 3.3V ELECTRICAL CHARACTERISTICS (Ta=5, V DD =3.3V, V SS =0V, f=khz; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics I Q Quiescent current AC Characteristics THDN Po Total harmonic distortion plus Noise Maximum output power All devices are active, BTL All devices are active, SE L-ch (R-ch) PD, BTL L-ch (R-ch) PD, SE SE mode, R L =3Ω, 35mW BTL Mode, R L = 4Ω THDN = % BTL Mode, R L = 8Ω THDN = % SE Mode, R L = 3Ω THDN = 0.% ma db % W W - 35m - W.4V ELECTRICAL CHARACTERISTICS (Ta=5, V DD =.4V, V SS =0V, f=khz; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics I Q Quiescent current AC Characteristics THDN Po Total harmonic distortion plus Noise Maximum output power All devices are active, BTL All devices are active, SE L-ch (R-ch) PD, BTL L-ch (R-ch) PD, SE SE mode, R L =3Ω, 5mW BTL Mode, R L = 4Ω THDN = % BTL Mode, R L = 8Ω THDN = % SE Mode, R L = 3Ω THDN = 0.% ma db % W W - 5m - W REV 3 4/9

5 TYPICAL PERFORMANCE CHARACTERISTICS (Ta=5 ; unless otherwise specified) VDD=5V, Po=W BTL mode, RL=4Ω VDD=3.3V, Po=0.8W BTL mode, RL=4Ω VDD=.4V, Po=330mW BTL mode, RL=4Ω THDN vs. frequency THDN vs. frequency THDN vs. frequency VDD=5V, Po=.W BTL mode, RL=8Ω VDD=3.3V, Po=0.53W BTL mode, RL=8Ω VDD=.4V, Po=50mW BTL mode, RL=8Ω THDN vs. frequency THDN vs. frequency THDN vs. frequency Po=5mW VDD=5V, Po=90mW SE mode, RL=3Ω VDD=3.3V, Po=35mW SE mode, RL=3Ω VDD=.4, Po=5mW SE mode, RL=3Ω THDN vs. frequency THDN vs. frequency THDN vs. frequency REV 3 5/9

6 f=0khz f=0khz f=0khz f=khz f=khz f=khz VDD=5V BTL mode RL=4Ω f=0hz VDD=3.3V BTL mode RL=4Ω f=0hz VDD=.4V BTL mode RL=4Ω f=0hz OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W) THDN vs. output power THDN vs. output power THDN vs. output power f=0khz f=0khz f=0khz f=khz f=khz f=0hz f=khz f=0hz f=0hz VDD=5V BTL mode RL=8Ω VDD=3.3V BTL mode RL=8Ω VDD=.4V BTL mode RL=8Ω OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W) THDN vs. output power THDN vs. output power THDN vs. output power f=0khz f=0khz f=0khz f=0hz f=khz f=0hz f=khz f=khz f=0hz VDD=5V SE mode RL=3Ω VDD=3.3V SE mode RL=3Ω VDD=.4V SE mode RL=3Ω OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W) THDN vs. output power THDN vs. output power THDN vs. output power REV 3 6/9

7 CHANNEL SEPARATION (db) VDD=5V, Po=W BTL, RL=8Ω CHANNEL SEPARATION (db) VDD=5V, Po=60mW SE, RL=3Ω Channel separation vs. frequency Channel separation vs. frequency CAP=0uF CAP=0uF CAP=uF CAP=uF PSRR (db) PSRR (db) VDD=5V, VRR=00mVrms, BTL RL=8Ω VDD=5V, VRR=00mVrms, SE RL=3Ω PSRR vs. frequency PSRR vs. frequency All Devices activate. LPD or RPD QUIESCENT CURRENT (ma) BTL SE QUIESCENT CURRENT (ma) BTL SE SUPPLY VOLTAGE (V) Quiescent current vs. supply voltage SUPPLY VOLTAGE (V) Quiescent current vs. supply voltage REV 3 7/9

8 I C CONTROL INTERFACE Data are transmitted to and from the MCU and via the SDA and SCL. The SDA and SCL make up the BUS interface. It should be noted that pull-up resistors must be connected to the positive supply voltage. V DD SDA (Serial Data Line) Rp Rp Pull up resistors SCL (Serial Clock Line) MCU I C interface protocol The format consists of the following: A START condition A chip address byte including the chip address. (7bits) The 8 th bit of the byte must be 0.(write=0, read=) The chip must always acknowledge the end of each transmitted byte. A data sequence (N-bytes Acknowledge) A STOP condition SDA SCL S START CONDITION ADDRESS R / W ACK DATA ACK DATA ACK P STOP CONDITION I C chip address 88H bits address W REV 3 8/9

9 I C data bytes description MSB LSB Function 0 0 B B B0 A A A0 L-ch, Attenuation and Mute 0 B B B0 A A A0 R-ch, Attenuation and Mute 0 0 G G G0 0 0 L-ch, Input Gain 0 G G G0 0 0 R-ch, Input Gain 0 RPD LPD PDPR CAP PD Power Down Mode S/B Output mode (SE/BTL) Where Ax =.5dB/step; Bx = 0dB/step; Gx = 3dB/step Attenuation and Mute MSB LSB Function 0 0 L-ch, Attenuation and Mute B B B0 A A A0 0 R-ch, Attenuation and Mute db db db db db db db db db db db 0-30 db db 0-50 db 0-60 db -70 db Mute Initial state: Both L-ch and R-ch are mute-on. REV 3 9/9

10 Input Gain MSB LSB Function 0 0 L-ch, Input Gain G G G R-ch, Input Gain db db db 0 9 db 0 0 db 0 5 db 0 8 db db Initial state: Both L-ch and R-ch are 0dB gain. Power Down Mode MSB LSB Function 0 RPD LPD PDPR CAP PD Power mode selection and power management 0 R-ch PA output is active mode R-ch PA output is power down mode 0 L-ch PA output is active mode Initial state: All are the power down modes. Enable the power down preparation before the chip will be shut down. L-ch PA output is power down mode 0 Disable preparation for power off Enable preparation for power off 0 Set the voltage of CAP to middle of supply voltage Pull down CAP pin to ground Output mode (SE/BTL) MSB LSB Function S/B Output mode, mixer control and audio format 0 Output mode is BTL Output mode is SE Initial state: Output mode is BTL mode. REV 3 0/9

11 I C Initial code and status MSB LSB Function Initial status 0 0 L-ch, Attenuation and Mute Mute On 0 R-ch, Attenuation and Mute Mute On L-ch, Input Gain 0dB R-ch, Input Gain 0dB 0 Power Down Mode All devices are power down Output mode (SE/BTL) BTL I C CODE EXAMPLE Input gain Set the left channel gain to be 3dB and the right channel gain to be 3dB Gain Start Address ACK ACK ACK Stop L-ch, G = 3dB The left and right input channels are independent. R-ch, G = 3dB Input Attenuation Set the left channel to be -5dB and the right channel to be -30dB -0dB -5dB -30dB 0dB Start Address ACK ACK ACK Stop L-ch, Att = -5dB R-ch, Att = -30dB Power down mode Set the L-ch PA output to be active mode. L-ch Start Address ACK 0 0 ACK Stop Left PA is active mode Output mode Set the output mode to be BTL mode Output mode Start Address ACK ACK Stop BTL mode REV 3 /9

12 OPERATION PROCEDURE The sequence of operation: power on active power down active power off. The basic flowcharts are as follows: For HP mode and HP/BTL mode REV 3 /9

13 For BTL mode only REV 3 3/9

14 APPLICATION INFORMATION A base application circuit REV 3 4/9

15 Output mode operation -- SE mode and BTL mode The output has two modes, SE mode and BTL mode. The mode is selected by IC code via MCU. In BTL mode, the outputs of A(B) and A(B) are then used to drive the speakers(4ω/8ω). - A - A OUTR R L 4Ω / 8Ω - B OUTR- OUTL- - B OUTL R L 4Ω / 8Ω I C Interface SCL SDA In the SE mode, the amplifiers A and B are shutdown, and become the high output impedance states. - A A OUTR- 00uF k Headphone Jack R L 6Ω / 3Ω Shutdown - - B OUTL- 00uF B k Shutdown - I C Interface SCL SDA Headphone sense The output mode is SE or BTL that is decided by a headphone. It has to be set SE mode when a headphone is plug-in status. The output mode is selected by IC command code by MCU. Please note that the don t detect a headphone automatically. Thus a detect function is executed via MCU. An operation diagram is shown as follows: The HP_sense pin is high when a headphone is plug-in. The HP_sense pin is low when a headphone is not plug-in. REV 3 5/9

16 EXTERNAL DIMENSIONS TSSOP6 (Thermal Pad) D D Detail A E E E C A A B e y A L L Symbol Dimension in mm Dimension in inches Min Nom Max Min Nom Max A A A b C D D E 6.4 BSC 0.5 BSC E E e 0.65 BSC BSC L L θ 0 o - 8 o 0 o - 8 o y REV 3 6/9

17 DEMO BOARD Function description Label : Supply Input Supply voltage range is.4v to 6.5V. Label : Reset All I/O pins are reset to default values. Label 3: Headphone Jack Used 3.5mm diameter of headphone with 3ohm Label 4: Speaker Output Connected to speaker with 8ohm or 4 ohm Label 5: Signal Input Connected to audio signals. Label 6: LED Indicator The LEDs indicate the chip status and IR received status. Power ON status, it is green-dark blink twice and then keeps on a light state. Power OFF status, it is green-dark blink four times and then keeps on a dark state. It is green-dark blink once when the MCU has received the function code correctly. SE mode and BTL mode operation The headphone controls operational mode. System enters SE mode when headphone jack is empty. When a set of headphone plugged into the jack, the system switched to BTL mode. REV 3 7/9

18 IR Controller Power ON/OFF : The power key. Press the key once to set power-on or power-off for. The default values are GAIN 0dB, ATTENUATION 0dB and MUTE-ON. VOL, VOL- : The volume control keys. The volume control in.5db/step as the switch is pressed once, the range is -77.5dB to 0dB. Gain, Gain- : The gain control keys. The gain control in 3dB/step as the switch is pressed once, the range is 0dB to db. Mute : The mute key Press the key once to set mute-on or mute-off. PD/Active : The power down key. Press the key once to set power-down or activation for. REV 3 8/9

19 REV 3 9/9 Circuit C3 0.u C3 0u C 0u C u C4 u J AVCC SP SPK_R SP SPK_L DVDD R G 3 L J3 INPUT P3.7 RST P.0 P3.0 P. 3 P3. 3 P. 4 XTAL 4 P.3 5 XTAL 5 P.4 6 P3. 6 P.5 7 P3.3 7 P.6 8 P3.4 8 P.7 9 P3.5 9 Vcc 0 GND 0 U AT89C405 VS IR 3 GND Q IR C 47u C5 470P R 0 R 0K Y 4M C6 0P C7 0P R4 0K C 0u S RST DGND IR_IN DGND AGND IR_IN SCL SDA SCL SDA J DVDD C8 0.u C9 u HP-IN HP-R R 3 HP-L 4 L 5 G 6 HEADPHONE C5 00u C4 00u R9 K R0 K 3 J5 OUT R6 00K HP_IN C6 u C7 u C0 u W Jumper DGND AGND R7 K R8 K D POWER R3 K W JUMP AVCC Vss CAP RIN 3 AVss 4 -OUTR 5 PVDDR 6 OUTR 7 PVSSR 8 PVSSL 9 OUTL 0 PVDDL -OUTL AVDD 3 LIN 4 SDA 5 SCL 6 U AGND R5 00K J6 INR C8 u L INL 3 Q NMOS AVCC