Dr. Weidong Kuang. The University of Texas Rio Grande Valley Department of Electrical Engineering (956)

Transcription

1 Dr. Weidong Kuang The University of Texas Rio Grande Valley Department of Electrical Engineering (956) EDUCATION PhD, University of Central Florida, 2003 Major: Electrical Engineering MS, Nanjing University of Aeronautics & Astronautics, 1994 Major: Electrical Engineering BS, Nanjing University of Aeronautics & Astronautics, 1991 Major: Electronics and Communication Engineering EMPLOYMENT Associate professor, University of Texas at Rio Grande Valley (August 2015) Associate Professor, University of Texas Ð Pan American (September 1, August 1, 2015) Assistant Professor, University of Texas Ð Pan American (August August 2009) PUBLICATIONS Conference Proceedings Yu Bai, Bo Hu, Weidong Kuang, and Mingjie Lin. Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices. Proceedings of the 26th edition on Great Lakes Symposium on VLSI. (2016): Yu Bai and Weidong Kuang. Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance. Digital System Design (DSD), th Euromicro Conference on. (2011): Weidong Kuang and Yu Bai. Soft error in FPGA-implemented asynchronous circuits. Programmable Logic (SPL), 2011 VII Southern Conference on. (2011): Weidong Kuang, Enjun Xiao, Casto Ibarra, and Peiyi Zhao. Design asynchronous circuits for soft error tolerance IEEE International Conference on Integrated Circuit Design and Technology. (2007): 1 5. Weidong Kuang, Casto Ibarra, and Peiyi Zhao. Soft error hardening for asynchronous circuits. 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007). (2007): Generated on Nov 05, 2018 Page 1 of 5

2 Weidong Kuang, Enjun Xiao, CM Ibarra, and Peiyi Zhao IEEE International Conference on Integrated Circuit Design and Technology> 1-4. (June 2007) Weidong Kuang and Edward Banatoski. Testing for threshold logic circuits based on resonant tunneling diodes. Threshold. 2, (2006): 1. Weidong Kuang and JS Yuan. An adaptive supply-voltage scheme for low power self-timed CMOS digital design. VLSI Design, Proceedings. 16th International Conference on. (2003): Weidong Kuang, Jiann-Shiun Yuan, and Abdel Ejnioui. Supply voltage scalable system design using self-timed circuits. VLSI, Proceedings. IEEE Computer Society Annual Symposium on. (2003): Weidong Kuang and JS Yuan. Low power operation using self-timed circuits and ultra-low supply voltage. Microelectronics, The 14th International Conference on 2002-ICM. (2002): Weidong Kuang and JS Yuan. Soft digital signal processing using self-timed circuits. Semiconductor Electronics, Proceedings. ICSE IEEE International Conference on. (2002): Weidong Kuang, JS Yuan, RF DeMara, D Ferguson, and M Hagedorn. A delay-insensitive FIR Filter for DSP applications. Proc. Ninth An. NASA Symp. on VLSI Design, Albuquerque, NM, November. (2000): 8 9. Qiwu Tan and Weidong Kuang. Detecting the amplitude and phase of multi-channel for phased array. Xi'an: International Symposium on Antenna and Electromagnetics. (1997): Weidong Kuang, Jieping Zhang, Track techniques in a solid state phased array radar. Beijing: Proceedings of the 3rd Annual Symposium of Beijing Society of Astronautics. (1997): Weidong Kuang. Analysis of the effect of SAR autofocus error on imaging performance. Beijing: The Symposium on Radar Target Imaging. (1995): Journal Articles Weidong Kuang. Correction and Comment on An Adaptive Resolution Asynchronous ADC Architecture for Data Compression in Energy Constrained Sensing Applications. IEEE Transactions on Circuits and Systems I: Regular Papers. 4, no. 60 (2013): Peiyi Zhao, Jason McNeely, Weidong Kuang, Nan Wang, and Zhongfeng Wang. Design of sequential elements for low power clocking system. IEEE Transactions on very large scale integration (VLSI) systems. 19, no. 5 (2011): Weidong Kuang, Peiyi Zhao, Jiann Yuan, and Ronald DeMara. Design of asynchronous circuits for high soft error tolerance in deep submicrometer CMOS circuits. IEEE transactions on very large scale integration (VLSI) systems. 18, no. 3 (2010): Peiyi Zhao, Jason McNeely, Pradeep Golconda, Soujanya Venigalla, Nan Wang, Magdy Bayoumi, Weidong Kuang, and Luke Downey. Low-power clocked-pseudo-nmos flip-flop for level conversion in dual supply systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 17, no. 9 (2009): Weidong Kuang, Lizhi Cao, C Yu, and Jiann Yuan. PMOS breakdown effects on digital circuits Modeling and analysis. Microelectronics Reliability. 48, no. 8 (2008): Peiyi Zhao, Jason McNeely, Pradeep Golconda, Magdy Bayoumi, Robert Barcenas, and Weidong Kuang. Low-power clock branch sharing double-edge triggered flip-flop. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15, no. 3 (2007): Generated on Nov 05, 2018 Page 2 of 5

3 Weidong Kuang and JS Yuan. Energy-efficient self-timed circuit design using supply voltage scaling. IEE Proceedings-Circuits, Devices and Systems. 151, no. 4 (2004): Jiann Yuan and Weidong Kuang. Teaching asynchronous design in digital integrated circuits. IEEE Transactions on Education. 47, no. 3 (2004): Weidong Kuang. Iterative ring and power-aware design techniques for self-timed digital circuits. University of Central Florida. (2003) Weidong Kuang, JS Yuan, RF DeMara, M Hagedorn, and K Fant. Performance analysis and optimisation of NCL self-timed rings. IEE PROCEEDINGS CIRCUITS DEVICES AND SYSTEMS. 150, no. 3 (2003): Weidong Kuang. An approach to direct digital sampling of IF bandpass signal and its hardware implementation. Journal of system engineering and electronics. 18, no. 11 (1996): PRESENTATIONS Weidong Kuang and Edward Banatoski. "Testing for Threshold Logic Circuits Based on Resonant Tunneling Diodes." the 6th IEEE Conference on Nanotechnology, Cincinnati Ohio. (July 2006) TEACHING Courses Taught Adv Digital System Desig Adv Digital System Design Digital Signal Processing Digital Signal Processing I Digital Systems Engineering II Digital Systems Engr I Digital Systems Engr I Lab Digital Systems Engr II Digital Systems I Digital Systems I Lab Digital Systems II Electric Circuits I Electrical & Electronic Sys Electronics for CMPE Electronics for CMPEà  Electronics for CMPEåÊ Electronics for CMPEæ Electronics for Cmp Engr Generated on Nov 05, 2018 Page 3 of 5

4 Independent Study Intro to Elect Engr Master's Thesis I Master's Thesis II Microprocessor Systems Prob & Stat Electrical Enginee Senior Design I Senior Design II Sr Design Hardware Trk I Sr Design Hrdware Trk II Topics-Electrical Engr Directed Student Learning Master's Thesis Committee Member. Edni Rosal,, Department of Electrical Engineering. (November 2016) Master's Thesis Committee Member. David Leal, "computer network", Department of Electrical Engineering. (October 2016) SERVICE Department Service Committee Member, curriculum committee. (May 2018) Committee Member, graduate committee. (September August 2018) Committee Member, faculty search committee. (January May 2018) Committee Member, annual evaluation committee. (September May 2018) Committee Member, graduate committee. (September August 2017) Committee Member, faculty annual evaluation committee. (September 1, May 31, 2017) College Service Development Activities Attended Workshop, "Online faculty round table," center for online learning and teaching techology. (October 6, 2017) Workshop, "UTRGV CBI conference," UTRGV. (April 30, 2016) Faculty Development Leave, Rice University. (January 10, April 20, 2015) Summer Faculty Position, Oak Ridge National Lab. (June 10, August 15, 2013) Generated on Nov 05, 2018 Page 4 of 5

5 Professional Service Generated on Nov 05, 2018 Page 5 of 5