Data Converters. Springer FRANCO MALOBERTI. Pavia University, Italy

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1 Data Converters by FRANCO MALOBERTI Pavia University, Italy Springer

Contents Dedicat ion Preface 1. BACKGROUND ELEMENTS 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 The Ideal Data Converter Sampling 1.2.1 Undersampling 1.2.2 Sampling-time Jitter Amplitude Quantization 1.3.1 Quantization Noise 1.

2 Contents Dedicat ion Preface 1. BACKGROUND ELEMENTS The Ideal Data Converter Sampling Undersampling Sampling-time Jitter Amplitude Quantization Quantization Noise Properties of the Quantization Noise kt/c Noise Discrete and Fast Fourier Transforms Windowing Coding Schemes The D/A Converter Ideal Reconstruction Real Reconstruction References The Z-Transform 2. DATA CONVERTERS SPECIFICATIONS Type of Converter Conditions of Operation Converter Specifications General Features V xiii Vll

viii CONTENTS 2.4 Static Specifications 51 2.5 Dynamic Specifications 60 2.6 Digital and Switching Specifications 72 References 76 3. NYQUIST-RATE D/A CONVERTERS 77 3.1 Introduction 77 3.1.1 DAC Applications 79 3.

3 viii CONTENTS 2.4 Static Specifications Dynamic Specifications Digital and Switching Specifications 72 References NYQUIST-RATE D/A CONVERTERS Introduction DAC Applications Voltage and Current References Types of Converters Resistor based Architectures Resistive Divider X-Y Selection Settling of the Output Voltage Segmented Architectures Effect of the Mismatch Trimming and Calibration Digital Potentiometer R-2R Resistor Ladder DAC Deglitching Capacitor Based Architectures Capacitive Divider DAC Capacitive MDAC "Flip Around" MDAC Hybrid Capacitive-Resistive DACs Current Source based Architectures Basic Operation Unity Current Generator Random Mismatch with Unary Selection Current Sources Selection Current Switching and Segmentation Switching of Current Sources Other Architectures 131 References NYQUIST RATE A/D CONVERTERS Introduction Timing Accuracy 143

Contents ix 4.2.1 Metastability error 146 4.3 Full-Flash Converters 147 4.3.1 Reference Voltages 148 4.3.2 Offset of Comparators 150 4.3.3 Offset Auto-zeroing 152 4.3.4 Practical Limits 155 4.

4 Contents ix Metastability error Full-Flash Converters Reference Voltages Offset of Comparators Offset Auto-zeroing Practical Limits Sub-Ranging and Two-Step Converters Accuracy Requirements Two-step Converter as a Non-linear Process Folding and Interpolation Double Folding Interpolation Use of Interpolation in Flash Converters Use of Interpolation in Folding Architectures Interpolation for Improving Linearity Time-Interleaved Converters Accuracy requirements Successive Approximation Converter Errors and Error Correction Charge Redistribution Pipeline Converters Accuracy Requirements Digital Correction Dynamic Performances Sampled-data Residue Generator Other Architectures Cyclic (or Algorithmic) Converter Integrating Converter Voltage-to-Frequency Converter 202 References CIRCUITS FOR DATA CONVERTERS Sample-and-Hold Diode Bridge S&H Diode Bridge Imperfections Improved Diode Bridge Switched Emitter Follower Circuit Implementation 215

X CONTENTS 5.3.2 Complementary Bipolar S&H 216 5.4 Features of S&Hs with BJT 217 5.5 CMOS Sample-and-Hold 222 5.5.1 Clock Feed-through 224 5.5.2 Clock Feed-through Compensation 226 5.5.3 Two-stages OTA as T&H 227 5.

5 X CONTENTS Complementary Bipolar S&H Features of S&Hs with BJT CMOS Sample-and-Hold Clock Feed-through Clock Feed-through Compensation Two-stages OTA as T&H Use of the Virtual Ground in CMOS S&H Noise Analysis CMOS Switch with Low Voltage Supply Switch Bootstrapping Folding Amplifiers Current-Folding Voltage Folding Völtage-to-Current Converter Clock Generation 247 References 251 OVERSAMPLING AND LOW ORDER SA MODULATORS Introduction Delta and Sigma-Delta Modulation Noise Shaping First Order Modulator Intuitive Views Use of 1-bit Quantization Second Order Modulator Circuit Design Issues Offset Finite Op-Amp Gain Finite Op-Amp Bandwidth Finite Op-Amp Slew-Rate ADC Non-ideal Operation DAC Non-ideal Operation Architectural Design Issues Integrator Dynamic Range Dynamic Ranges Optimization Sampled-data Circuit Implementation Noise Analysis

Contents XI 6.6.5 Quantization Error and Dithering 294 6.6.6 Single-bit and Multi-bit 296 References 301 HIGH-ORDER, CT SA CONVERTERS AND SA DAC 303 7.1 SNR Enhancement 303 7.

6 Contents XI Quantization Error and Dithering Single-bit and Multi-bit 296 References 301 HIGH-ORDER, CT SA CONVERTERS AND SA DAC SNR Enhancement High Order Noise Shaping Single Stage Architectures Stability Analysis Weighted Feedback Summation Modulator with Local Feedback Chain of Integrators with Distributed Feedback Cascaded SA Modulator Dynamic ränge for MASH Continuous-time SA Modulators S&H Limitations CT Implementations Design of CT from Sampled-Data Equivalent Band-Pass SA Modulator Interleaved N-Path Architecture SynthesisoftheNTF Oversampling DAC bitDAC Double Return-to-zero DAC 350 References 356 DIGITAL ENHANCEMENT TECHNIQUES Introduction Error Measurement Trimming of Elements Foreground Calibration Background Calibration Gain and Offset in Interleaved Converters Offset Calibration without Redundancy Dynamic Matching Butterfly Randomization Individual Level Averaging Data Weighted Averaging 385

Xll CONTENTS 8.7 Decimation and Interpolation 391 8.7.1 Decimation 391 8.7.2 Interpolation 395 References 399 TESTING OF D/A AND A/D CONVERTERS 401 9.1 Introduction 401 9.2 Test Board 403 9.

7 Xll CONTENTS 8.7 Decimation and Interpolation Decimation Interpolation 395 References 399 TESTING OF D/A AND A/D CONVERTERS Introduction Test Board Quality and Reliability Test Data Processing Best-fit-line Sine Wave Fitting Histogram Method Static DAC Testing Transfer Curve Test Superposition of Errors Non-linearity Errors Dynamic DAC Testing Spectral Features Conversion Time Glitch Energy Static ADC Testing Code Edge Measurement Dynamic ADC Testing Time Domain Parameters Improving the Spectral Purity of Sine Waves Aperture Uncertainty Measure Settling-time Measure Use of FFT for Testing 431 References 434 Index 435

Tuesday, March 1st, 9:15 11:00. Snorre Aunet Nanoelectronics group Department of Informatics University of Oslo.

Nyquist Analog to Digital it Converters Tuesday, March 1st, 9:15 11:00 Snorre Aunet (sa@ifi.uio.no) Nanoelectronics group Department of Informatics University of Oslo 3.1 Introduction 3.1.1 DAC applications