APPLICATION BULLETIN

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1 APPLICATION BULLETIN Mailing Address: PO Box 400 Tucson, AZ 74 Street Address: 70 S. Tucson Blvd. Tucson, AZ 70 Tel: (0) 74- Twx: Telex: 0-49 FAX (0) 9-0 Immediate Product Info: (00) 4- INPUT FILTERING THE INA7 ±00V DIFFERENCE AMPLIFIER By R. Mark Stitt (0) Many customers have asked how to add input filtering to the INA7. Since the INA7 is rated for ±00V input voltage (±00V without damage), it is commonly used in environments with very high input noise or with high-voltage input transients. This bulletin shows how to connect input filters, discusses the errors they can add, and shows how to eliminate the errors. Figure shows the connection of a differential input filter. A pole is formed by C and the two external input resistors. f db = /(4 π C ). Differential input filtering is preferred because mismatches in filter components do not degrade CMR. V kω kω V C 0.0µF R.kΩ R 0.0kΩ INA7 DON T USE COMMON-MODE INPUT FILTERS ALONE Don t be tempted to use common-mode input filtering alone (Figure ) unless you are prepared to carefully match components. Mismatches between the C time constants reduce AC CMR. The mismatches result in a differential input signal in response to AC common-mode inputs. Even if you successfully match the components for good AC CMR at room temperature, maintaining the match over temperature can be a problem. A COMBINATION COMMON-MODE AND DIFFERENTIAL INPUT FILTES OK If you want common-mode input filtering, use it in conjunction with differential input filtering as shown in Figure. If V V kω kω C R.kΩ R 0.0kΩ A differential pole is formed at: f db = /(4 π C ) AC CMR is not degraded by a differential input filter. INA7 FIGURE. INA7 with Differential Input Filter. Don t use this common-mode input filter alone. AC CMR will be degraded by mismatches in the filter time constants. FIGURE. INA7 with Common-Mode Input Filter. V kω kω V C 0.0µF C 4.7µF R.kΩ R 0.0kΩ INA7 If C >> C, AC common-mode errors due to C mismatches will be shunted by C, improving AC CMR. FIGURE. INA7 with a Combination Differential and Common-Mode Input Filter. C >> C, AC common-mode errors will be shunted by C so AC CMR can be successfully boosted. A value of C = 00 C is suggested. Figure 4 shows actual CMR vs Frequency performance plots for the Figure and Figure circuits. Standard INA7 performance is shown for comparison. The standard INA7 has about 0dB CMR at 0kHz. Mismatches of % in R C time constants (% C mismatch) cause the Figure circuit CMR to drop below 0dB at less than 00Hz. Adding a 99 Burr-Brown Corporation AB-09 Printed in U.S.A. March, 99 SBOA0

2 CMR (db) Fig Circuit 00 Fig Circuit Standard INA7 k 0k 00k Frequency (Hz) FIGURE 4. CMR vs Frequency Plots for Figure and Circuits with Standard INA7 for Comparison. 4.7µF differential input filter capacitor shunts out commonmode filter errors producing greater than 70dB CMR to 00kHz as shown in the plot of Figure s performance. INPUT RESISTORS CAN REDUCE DC CMR Notice that the DC CMR of the Figure circuit is reduced from 9dB to db. The CMR reduction is due to mismatches from input filter resistors,. CMR in the INA7 depends on close resistor ratio matching. For errors in and R : CMR = 0 Log(%/0) Where: CMR = CMR for errors in or R [db] % = the error in or R [%] The number, 0, in the denominator comes from, R sensitivity equations. S CMR = ±R, /( + ) For example, % = 0.00% is required for the typical 94dB INA7 CMR. Even though the kω input resistors are relatively small compared to the input resistors in the INA7, mismatches will reduce CMR. Even if perfectly matched external input resistors are used there can still be problems with CMR. Although some resistor ratios in the INA7 are carefully matched to achieve good CMR, the /R ratio is not. A typical mismatch of % can be expected. The effect is to add an effective % mismatch to external resistors. The following worst-case CMR can be expected: CMR = 0 Log((ERRO + ERROR )/0) Where: ERRO = Error due,, and R mismatches [%] ERRO = (T OL + )/( +. 0 ) = DC resistance of external filter resistor,, [Ω] T OL = Tolerance of [%], i.e..0 for % CM7 ERROR INA7 GRADE (db) (%) INA7BM typ INA7BM min 0.00 INA7KP min TABLE I. Initial INA7 CMR Values. ERRO ERROR CMR (Ω) (%) (%) (db) k k k k TABLE II. Examples of Worst-Case CMR to be Expected (INA7BM and selected % s). ERROR = Initial INA7 error [%] See Table I Also, 0 ERROR = 0(CM7 /0) CM7 = Initial INA7 CMR [db] See Tables I and II for examples. CMR TRIM If you want to use input resistors and must be assured of good DC CMR, you can use the trim circuit shown in Figure. Resistor TCR mismatches can limit difference amplifier performance over temperature. Use high quality film resistors and keep for good performance V V C R.kΩ 0Ω R 0.0kΩ 00Ω INA7 CMR Trim FIGURE. INA7 with Differential Input Filter and CMR Trim. 0Ω

3 over temperature. ADDED INPUT RESISTORS CAUSE GAIN ERROR Adding input resistors to the INA7 causes gain error. When all resistor ratios are properly adjusted for good CMR, INA7 gain is R /. When input filter resistors are added, gain is reduced to R /( + ). With =, gain is V/V (approximately.% gain error). Since gain does not depend on R,, or, the gain error can not be corrected by adding resistance in series with any pin. CORRECTING GAIN ERROR To correct for the gain error introduced by the input filter resistors, you can add a small amount of positive feedback as shown in Figure. Resistors A, B, and A must be selected to maintain CMR and to give the proper positive feedback to correct for gain error. The following procedure is suggested: Set A = 0Ω This is an arbitrary but adequate value for A. It is the smallest standard % value. With this small value, even a % ratio matching error between A and A would only degrade INA7 CMR to.db. In practice, ratio errors will be lower than this when closest standard % resistors are used. Calculate B and A and use closest standard % resistor value. 9 R B A + A With < and A = 0Ω this is an adequate approximation for all practical purposes. If R =, =, and A = 0Ω: B 0 + A 7MΩ 7.4kΩ, use 7.kΩ R A B 4(R A ) + 4(R B ) 4(A B ) With R = and A = 0Ω: A. B B With B = 7.4kΩ, A =.Ω, use Ω. FINE-TRIM FOR ZERO GAIN ERROR You must trim to get zero gain error. The resistors in the INA7 are accurately ratio trimmed to give excellent CMR and gain accuracy, but their absolute values are only accurate to within about ±0%. With the values calculated above, gain error will be reduced from approximately.% to about ±0.%. For lower gain error use the gain-trim circuit shown in Figure 7. The circuit is the same as in Figure except, B is replaced with a kω fixed resistor and a kω pot. To trim for zero gain error, ground the INA7 inputs (0V input) and measure the offset voltage, FF, at the output. Apply a known input voltage, V REF, (e.g. 0.0V) to the INA7 noninverting input. Measure V REF so you know its precise value. Adjust the kω pot for the correct INA7 V C R V C R V R.kΩ A Ω 0.0kΩ A 0Ω INA7 B 7.kΩ V R.kΩ A Ω 0.0kΩ B kω A 0Ω INA7 C kω Gain Trim FIGURE. INA7 with Differential Input Filter and Positive Feedback Circuit to Compensate for Gain Error Due to. FIGURE 7. INA7 with Differential Input Filter and Gain Trim Circuit.

4 output voltage: UT = V REF + FF. You can automate the trim process by using an amplifier with a known gain of V/V. The Burr-Brown INA0BM difference amplifier with gain error = ±0.0% max is a good choice. Instead of using a voltage reference, drive the input of the INA7 with a ±V, 0Hz sine or triangle wave (see AN-, Fig. 4 for a suitable triangle generator circuit). Connect one input of the INA0 to the driven INA7 input. Connect the other input of the INA0 to the INA7 output. Adjust the kω gain trim pot for zero AC at the INA0 output. Using the AC technique allows you to distinguish between offset and gain error. If you want to adjust both gain and CMR, use the circuit shown in Figure. V V C R.kΩ CMR Trim A 0Ω R 0.0kΩ B kω A 0Ω INA7 C kω Gain Trim FIGURE. INA7 with Differential Input Filter and Both Gain Trim and CMR Trim Circuits. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. 4

5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 000, Texas Instruments Incorporated

APPLICATION BULLETIN

APPLICATION BULLETIN Mailing Address: PO Box 100 Tucson, AZ 873 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 8706 Tel: (0) 76-1111 Twx: 910-9-111 Telex: 066-691 FAX (0) 889-10 Immediate Product Info: