SINGLE-SUPPLY, RAIL-TO-RAIL OPERATIONAL AMPLIFIERS

Transcription

1 OPA OPA OPA OPA OPA OPA OPA SINGLE-SUPPLY, RAIL-TO-RAIL OPERATIONAL AMPLIFIERS MicroAmplifier Series FEATURES RAIL-TO-RAIL INPUT RAIL-TO-RAIL OUTPUT (within mv) MicroSIZE PACKAGES WIDE BANDWIDTH:.MHz HIGH SLEW RATE: V/µs LOW THD+NOISE:.% (f = khz) LOW QUIESCENT CURRENT: µa/channel SINGLE, DUAL, AND QUAD DESCRIPTION OPA series rail-to-rail CMOS operational amplifiers are optimized for low voltage, single supply operation. Rail-to-rail input/output and high speed operation make them ideal for driving sampling analog-to-digital converters. They are also well suited for general purpose and audio applications as well as providing I/V conversion at the output of D/A converters. Single, dual, and quad versions have identical specifications for design flexibility. The OPA series operates on a single supply as low as.v with an input common-mode voltage range that extends mv below ground and mv above the positive supply. Output voltage swing is to within mv APPLICATIONS DRIVING A/D CONVERTERS PCMCIA CARDS DATA ACQUISITION PROCESS CONTROL AUDIO PROCESSING COMMUNICATIONS ACTIVE FILTERS TEST EQUIPMENT of the supply rails with a kω load. They offer excellent dynamic response (BW =.MHz, SR = V/µs), yet quiescent current is only µa. Dual and quad designs feature completely independent circuitry for lowest crosstalk and freedom from interaction. The single (OPA) packages are the tiny -lead SOT-- surface mount, SO- surface mount, and -pin DIP. The dual (OPA) comes in the miniature MSOP- surface mount, SO- surface mount, and -pin DIP packages. The quad (OPA) packages are the space-saving SSOP- surface mount, SO- surface mount, and the -pin DIP. All are specified from C to + C and operate from C to + C. A SPICE macromodel is available for design analysis. Out V +In OPA SOT-- NC In +In V In OPA -Pin DIP, SO- NC Output NC Out A In A +In A V OPA A B -Pin DIP, SO-, MSOP- Out B In B +In B Out A In A +In A +V +In B In B Out B NC A B OPA SSOP- D C Out D In D +In D V +In C In C Out C 9 NC International Airport Industrial Park Mailing Address: PO Box, Tucson, AZ Street Address: S. Tucson Blvd., Tucson, AZ Tel: () - Twx: 9-9- Internet: FAXLine: () - (US/Canada Only) Cable: BBRCORP Telex: -9 FAX: () 9- Immediate Product Info: () - OPA// 99 Burr-Brown Corporation PDS-C Printed in U.S.A. December, 99 SBOS

2 SPECIFICATIONS: V S =.V to V At T A = + C, R L = kω connected to V S / and V OUT = V S /, unless otherwise noted. Boldface limits apply over the specified temperature range, T A = C to + C. V S = V. OPANA, PA, UA OPAEA, PA, UA OPAEA, PA, UA PARAMETER CONDITION MIN TYP () MAX UNITS OFFSET VOLTAGE Input Offset Voltage V OS V S = V ± ± µv vs Temperature dv OS /dt ±. µv/ C vs Power Supply PSRR V S =.V to.v, V CM = V µv/v T A = C to + C V S =.V to.v, V CM = V µv/v Channel Separation, dc. µv/v INPUT BIAS CURRENT Input Bias Current I B ±. ± pa T A = C to + C ± pa Input Offset Current I OS ±. ± pa NOISE Input Voltage Noise, f =. to khz µvrms Input Voltage Noise Density, f = khz e n nv/ Hz Current Noise Density, f = khz i n fa/ Hz INPUT VOLTAGE RANGE Common-Mode Voltage Range V CM. () +. V Common-Mode Rejection Ratio CMRR.V < V CM < ().V 9 db V S = V,.V < V CM <.V db V S =.V,.V < V CM < V db INPUT IMPEDANCE Differential Ω pf Common-Mode Ω pf OPEN-LOOP GAIN Open-Loop Voltage Gain A OL R L = kω, mv < V O < () mv db T A = C to + C R L = kω, mv < V O < () mv db R L = kω, mv < V O < () mv db T A = C to + C R L = kω, mv < V O < () mv db R L = kω, mv < V O < () mv 9 db T A = C to + C R L = kω, mv < V O < () mv 9 db FREQUENCY RESPONSE Gain-Bandwidth Product GBW G =. MHz Slew Rate SR V S = V, G =, C L = pf V/µs Settling Time,.% V S = V, V Step, C L = pf µs.% V S = V, V Step, C L = pf. µs Overload Recovery Time G = V S. µs Total Harmonic Distortion + Noise THD+N V S = V, V O = Vp-p (), G =, f = khz. % OUTPUT Voltage Output Swing from Rail () R L = kω, A OL db mv T A = C to + C R L = kω, A OL db mv R L = kω, A OL db mv T A = C to + C R L = kω, A OL db mv R L = kω, A OL 9dB mv T A = C to + C R L = kω, A OL 9dB mv Short-Circuit Current I SC ± ma Capacitive Load Drive C LOAD See Typical Curve POWER SUPPLY Specified Voltage Range V S. V Operating Voltage Range. to. V Quiescent Current (per amplifier) I Q I O =, V S = +V 9 µa T A = C to + C I O =, V S = +V µa TEMPERATURE RANGE Specified Range + C Operating Range + C Storage Range + C Thermal Resistance θ JA SOT-- Surface Mount C/W MSOP- Surface Mount C/W SO- Surface Mount C/W -Pin DIP C/W SSOP- Surface Mount C/W SO- Surface Mount C/W -Pin DIP C/W NOTES: () V S = +V. () V OUT =.V to.v. () Output voltage swings are measured between the output and power supply rails. OPA//

3 PIN CONFIGURATIONS Top View SOIC/DIP ELECTROSTATIC DISCHARGE SENSITIVITY OPA Out A In A A +In A +In B B In B D C 9 Out D In D +In D V +In C In C This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Out B Out C ABSOLUTE MAXIMUM RATINGS () Supply Voltage....V Signal Input Terminals, Voltage ()... (V ).V to () +.V Current ()... ma Output Short-Circuit ()... Continuous Operating Temperature... C to + C Storage Temperature... C to + C Junction Temperature... C Lead Temperature (soldering, s)... C NOTES: () Stresses above these ratings may cause permanent damage. () Input terminals are diode-clamped to the power supply rails. Input signals that can swing more than.v beyond the supply rails should be currentlimited to ma or less. () Short-circuit to ground, one amplifier per package. PACKAGE/ORDERING INFORMATION PACKAGE SPECIFIED DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE NUMBER () RANGE MARKING NUMBER () MEDIA Single OPANA -Lead SOT-- C to + C A OPANA- Tape and Reel " " " " " OPANA-K Tape and Reel OPAPA -Pin DIP C to + C OPAPA OPAPA Rails OPAUA SO- Surface-Mount C to + C OPAUA OPAUA Rails () Dual OPAEA MSOP- Surface-Mount C to + C AA OPAEA- Tape and Reel " " " " " OPAEA- Tape and Reel OPAPA -Pin DIP C to + C OPAPA OPAPA Rails OPAUA SO- Surface-Mount C to + C OPAUA OPAUA Rails () Quad OPAEA SSOP- Surface-Mount C to + C OPAEA OPAEA- Tape and Reel " " " " " OPAEA- Tape and Reel OPAPA -Pin DIP C to + C OPAPA OPAPA Rails OPAUA SO- Surface Mount C to + C OPAUA OPAUA Rails () NOTES: () For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. () Models with -, -, and -K are available only in Tape and Reel in the quantities indicated (e.g., - indicates devices per reel). Ordering pieces of OPANA-K will get a single piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book. () SO- and SO- models also available in Tape and Reel. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. OPA//

4 TYPICAL PERFORMANCE CURVES At T A = + C, V S = +V, and R L = kω connected to V S /, unless otherwise noted. Voltage Gain (db) OPEN-LOOP GAIN/PHASE vs FREQUENCY 9. k k k M M Phase ( ) PSRR, CMRR (db) POWER SUPPLY and COMMON-MODE REJECTION vs FREQUENCY k k k M CMRR PSRR k INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY k CHANNEL SEPARATION vs FREQUENCY Current Noise Voltage Noise (nv Hz) k Voltage Noise Current Noise (fa Hz) Channel Separation (db) G =, All Channels k k k M. k k k. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY R L = k CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY G = R L = k k THD+N (%).. G = G = R L = R L = k R L = k R L = k Output Resistance (Ω) k k k G = G =. k k k k k k M M OPA//

5 TYPICAL PERFORMANCE CURVES (CONT) At T A = + C, V S = +V, and R L = kω connected to V S /, unless otherwise noted. OPEN-LOOP GAIN AND POWER SUPPLY REJECTION vs TEMPERATURE R L = kω COMMON-MODE REJECTION vs TEMPERATURE A OL, PSRR (db) A OL R L = kω R L = kω PSRR 9 Temperature ( C) CMRR (db) 9 V S =.V to V, V CM =.V to ().V V S = V, V CM =.V to.v V S =.V, V CM =.V to V Temperature ( C) Quiescent Current (µa) QUIESCENT CURRENT vs TEMPERATURE Per Amplifier 9 Temperature ( C) Quiescent Current (µa) QUIESCENT CURRENT vs SUPPLY VOLTAGE Per Amplifier Supply Voltage (V) Short-Circuit Current (ma) SHORT-CIRCUIT CURRENT vs TEMPERATURE 9 I SC +I SC Temperature ( C) Short-Circuit Current (ma) SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE I SC Supply Voltage (V) +I SC OPA//

6 TYPICAL PERFORMANCE CURVES (CONT) At T A = + C, V S = +V, and R L = kω connected to V S /, unless otherwise noted. Input Bias Current (pa) INPUT BIAS CURRENT vs TEMPERATURE k. Temperature ( C) Input Bias Current (pa) INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE Common-Mode Voltage (V) Output Voltage (V) OUTPUT VOLTAGE SWING vs OUTPUT CURRENT + C + C C + C + C C Output Voltage (Vp-p) MAXIMUM OUTPUT VOLTAGE vs FREQUENCY V S =.V Maximum output voltage without slew rate-induced distortion. V S =.V ± ± ± ± ± ± ± ± ±9 ± Output Current (ma) k M M Percent of Amplifiers (%) Typical production distribution of packaged units. OFFSET VOLTAGE PRODUCTION DISTRIBUTION Percent of Amplifiers (%) OFFSET VOLTAGE DRIFT MAGNITUDE PRODUCTION DISTRIBUTION Typical production distribution of packaged units. 9 Offset Voltage Drift (µv/ C) Offset Voltage (µv) OPA//

7 TYPICAL PERFORMANCE CURVES (CONT) At T A = + C, V S = +V, and R L = kω connected to V S /, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE C L = pf LARGE-SIGNAL STEP RESPONSE C L = pf mv/div V/div µs/div µs/div SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE SETTLING TIME vs CLOSED-LOOP GAIN Overshoot (%) G = + G = G = Settling Time (µs).%.% G = + See text for reducing overshoot. Load Capacitance (pf) k. Closed-Loop Gain (V/V) OPA//

8 APPLICATIONS INFORMATION OPA series op amps are fabricated on a state-of-the-art. micron CMOS process. They are unity-gain stable and suitable for a wide range of general purpose applications. Rail-to-rail input/output make them ideal for driving sampling A/D converters. In addition, excellent ac performance makes them well-suited for audio applications. The class AB output stage is capable of driving Ω loads connected to any point between and ground. Rail-to-rail input and output swing significantly increases dynamic range, especially in low supply applications. Figure shows the input and output waveforms for the OPA in unity-gain configuration. Operation is from a single +V supply with a kω load connected to V S /. The input is a Vp-p sinusoid. Output voltage is approximately.9vp-p. V OUT V S = +, G = +, R L = kω V/div Power supply pins should be bypassed with.µf ceramic capacitors. OPERATING VOLTAGE OPA series op amps are fully specified from +.V to +V. However, supply voltage may range from +.V to +.V. Parameters are guaranteed over the specified supply range a unique feature of the OPA series. In addition, many specifications apply from C to + C. Most behavior remains virtually unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltages or temperature are shown in the typical performance curves. RAIL-TO-RAIL INPUT The input common-mode voltage range of the OPA series extends mv beyond the supply rails. This is achieved with a complementary input stage an N-channel input differential pair in parallel with a P-channel differential pair (see Figure ). The N-channel pair is active for input voltages close to the positive rail, typically ().V to mv above the positive supply, while the P-channel pair is on for inputs from mv below the negative supply to approximately ().V. There is a small transition region, typically ().V to ().V, in which both pairs are on. This mv transition region can vary ±mv with process variation. Thus, the transition region (both stages on) can range from ().V to ().V on the low end, up to ().V to ().V on the high end. FIGURE. Rail-to-Rail Input and Output. Reference Current + V BIAS Class AB Control Circuitry V O V BIAS V (Ground) FIGURE. Simplified Schematic. OPA//

9 OPA series op amps are laser-trimmed to the reduce offset voltage difference between the N-channel and P-channel input stages, resulting in improved commonmode rejection and a smooth transition between the N-channel pair and the P-channel pair. However, within the mv transition region PSRR, CMRR, offset voltage, offset drift, and THD may be degraded compared to operation outside this region. A double-folded cascode adds the signal from the two input pairs and presents a differential signal to the class AB output stage. Normally, input bias current is approximately fa, however, input voltages exceeding the power supplies by more than mv can cause excessive current to flow in or out of the input pins. Momentary voltages greater than mv beyond the power supply can be tolerated if the current on the input pins is limited to ma. This is easily accomplished with an input resistor as shown in Figure. Many input signals are inherently current-limited to less than ma, therefore, a limiting resistor is not required. I OVERLOAD ma max kω FIGURE. Input Current Protection for Voltages Exceeding the Supply Voltage. OPAx V OUT RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For light resistive loads (>kω), the output voltage is typically a few millivolts from the supply rails. With moderate resistive loads (kω to kω), the output can swing to within a few tens of millivolts from the supply rails and maintain high open-loop gain. See the typical performanc curve Output Voltage Swing vs Output Current. CAPACITIVE LOAD AND STABILITY OPA series op amps can drive a wide range of capacitive loads. However, all op amps under certain conditions may become unstable. Op amp configuration, gain, and load value are just a few of the factors to consider when determining stability. An op amp in unity gain configuration is the most susceptible to the effects of capacitive load. The capacitive load reacts with the op amp s output resistance, along with any additional load resistance, to create a pole in the small-signal response which degrades the phase margin. In unity gain, OPA series op amps perform well, with a pure capacitive load up to approximately pf. Increasing gain enhances the amplifier s ability to drive more capacitance. See the typical performance curve Small-Signal Overshoot vs Capacitive Load. One method of improving capacitive load drive in the unity gain configuration is to insert a Ω to Ω resistor in series with the output, as shown in Figure. This significantly reduces ringing with large capacitive loads. However, if there is a resistive load in parallel with the capacitive load, it creates a voltage divider introducing a dc error at the output and slightly reduces output swing. This error may be insignificant. For instance, with R L = kω and R S = Ω, there is only about a.% error at the output. DRIVING A/D CONVERTERS OPA series op amps are optimized for driving medium speed (up to khz) sampling A/D converters. However, they also offer excellent performance for higher speed converters. The OPA series provides an effective means of buffering the A/D s input capacitance and resulting charge injection while providing signal gain. Figures and show the OPA driving an ADS. The ADS is a -bit, micro-power sampling converter in the tiny MSOP- package. When used with the miniature package options of the OPA series, the combination is ideal for space-limited and low power applications. For further information consult the ADS data sheet. With the OPA in a noninverting configuration, an RC network at the amplifier s output can be used to filter high frequency noise in the signal (Figure ). In the inverting configuration, filtering may be accomplished with a capacitor across the feedback resistor (Figure ). R S OPAx Ω to Ω R L C L V OUT FIGURE. Series Resistor in Unity-Gain Configuration Improves Capacitive Load Drive. 9 OPA//

10 +V.µF.µF = V to V for V to V output. OPA Ω pf +In In ADS -Bit A/D GND V REF DCLOCK D OUT CS/SHDN Serial Interface RC network filters high frequency noise. NOTE: A/D Input = to V REF FIGURE. OPA in Noninverting Configuration Driving ADS. +V pf.µf.µf kω kω OPA +In In ADS -Bit A/D GND V REF DCLOCK D OUT CS/SHDN Serial Interface = V to V for V to V output. NOTE: A/D Input = to V REF FIGURE. OPA in Inverting Configuration Driving ADS. +V Filters Hz to.khz MΩ pf MΩ / OPA kω.mω pf / OPA R L pf FIGURE. Speech Bandpass Filter. OPA//

11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright, Texas Instruments Incorporated