UC284x, UC384x, UC384xY CURRENT-MODE PWM CONTROLLERS

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1 Optimized for Off-Line and dc-to-dc Converters Low Start-Up Current (<1 ma) Automatic Feed-Forward Compensation Pulse-by-Pulse Current Limiting Enhanced Load-Response Characteristics Undervoltage Lockout With Hysteresis Double Pulse Suppression High-Current Totem-Pole Output Internally Trimmed Bandgap Reference 500-kHz Operation Error Amplifier With Low Output Resistance Designed to Be Interchangable With Unitrode UC2842 and UC3842 Series description NC FB NC NC D PACKAGE (TOP IEW) NC No internal connection FB P PACKAGE (TOP IEW) NC CC C OUTPUT POWER GROUND CC OUTPUT The UC2842 and UC3842 series of control integrated circuits provide the features that are necessary to implement off-line or dc-to-dc fixed-frequency current-mode control schemes with a minimum number of external components. Some of the internally implemented circuits are an undervoltage lockout (ULO) featuring a start-up current of less than 1 ma and a precision reference trimmed for accuracy at the error amplifier input. Other internal circuits include logic to ensure latched operation, a pulse-width modulation (PWM) comparator (which also provides current-limit control), and a totem-pole output stage designed to source or sink high-peak current. The output stage, suitable for driving N-channel MOSFETs, is low when it is in the off state. The primary difference between the UC2842-series devices and the UC3842-series devices is the ambient operating temperature range. The UC2842-series devices operate between 40 C and 85 C; the UC3842-series devices operate between 0 C and 70 C. Major differences between members of these series are the ULO thresholds and maximum duty cycle ranges. Typical ULO thresholds of 16 (on) and 10 (off) on the UCx842 and UCx844 devices make them ideally suited to off-line applications. The corresponding typical thresholds for the UCx843 and UCx845 devices are 8.4 (on) and 7.6 (off). The UCx842 and UCx843 devices can operate to duty cycles approaching 100%. A duty cycle range of 0 to 50% is obtained by the UCx844 and UCx845 by the addition of an internal toggle flip-flop, which blanks the output off every other clock cycle. TA 0 C to 70 C 40 C to 85 C AAILABLE OPTIONS PACKAGED DEICES SMALL OUTLINE (D) UC3842D UC3843D UC3844D UC3845D UC2842D UC2843D UC2844D UC2845D PLASTIC DIP (P) UC3842P UC3843P UC3844P UC3845P UC2842P UC2843P UC2844P UC2845P CHIP FORM (Y) UC3842Y UC3843Y UC3844Y UC3845Y The DW package is available taped and reeled. Add the suffix R to the device type, (i.e., LT1054CDWR). PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1995, Texas Instruments Incorporated POST OFFICE BOX DALLAS, TEXAS

2 functional block diagram CC NOM + ULO 5- EN 14 Internal Bias ref Good Logic 11 C 7 OSC 10 OUTPUT Error Amp T 8 POWER GROUNd FB R R 1 S R Current Sense Comparator PWM Latch The toggle flip-flop is present only in UC2844, UC2845, UC3844, and UC3845. NOTE A: Terminal numbers apply to the D package only. 4 2 POST OFFICE BOX DALLAS, TEXAS 75265

3 CURRENT-MODE CONTROLLERS Y chip information This chip, when properly assembled, displays characteristics similar to the. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (5) (6) (4) (3) FB (1) (2) (3) (4) Y (8) (7) (6) (5) CC OUTPUT 93 (7) (2) (2) CHIP THICKNESS: 15 MILS TYPICAL (8) (3) BONDING PADS: 4 4 MILS MINIMUM TJmax = 150 C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. (1) (1) 69 POST OFFICE BOX DALLAS, TEXAS

4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage (see Note 1) (I CC < 30 ma) Self Limiting Analog input voltage range, I (FB and terminals) to 6.3 Output voltage, O (OUTPUT terminal) Input voltage, I, (C terminal, D package only) Supply current, I CC ma Output current, I O ±1 A Error amplifier output sink current ma Continuous total power dissipation See Dissipation Rating Table Output energy (capacitive load) µj Operating free-air temperature range, T A : C to 85 C C to 70 C Storage temperature range, T stg C to 150 C Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to the device terminal. PACKAGE TA 25 C POWER RATING DISSIPATION RATING TABLE DERATE ABOE TA = 25 C TA = 70 C POWER RATING TA = 85 C POWER RATING D 950 mw 7.6 mw/ C 608 mw 494 mw P 1000 mw 8.0 mw/ C 640 mw 520 mw recommended operating conditions MIN NOM MAX MIN NOM MAX Supply voltage, CC and C Input voltage, I, Input voltage, I, FB and Output voltage, O, OUTPUT Output voltage, O, POWER GROUND Supply current, externally limited, ICC ma Average output current, IO ma Reference output current, IO(ref) ma Timing capacitance, CT 1 nf Oscillator frequency, fosc khz Operating free-air temperature, TA C These recommended voltages for C and POWER GROUND apply only to the D package. 4 4 POST OFFICE BOX DALLAS, TEXAS 75265

5 CURRENT-MODE CONTROLLERS electrical characteristics, CC = 15 (see Note 2), R T = 10 kω, C T = 3.3 nf, T A = full range (unless otherwise specified) reference section Output voltage IO = 1 ma, TJ = 25 C Line regulation CC = 12 to m Load regulation IO = 1 ma to 20 ma m Temperature coefficient of output voltage m C Output voltage with worst-case variation CC = 12 to 25, IO = 1 ma to 20 ma Output noise voltage f = 10 Hz to 10 khz, TJ = 25 C µ Output voltage long-term drift After 1000 h at TA = 25 C m Short-circuit output current ma NOTE 2: Adjust CC above the start threshold before setting it to 15. oscillator section Oscillator frequency (see Note 3) TJ = 25 C khz Frequency change with supply voltage CC = 12 to Hz/kHz Frequency change with temperature TA = TMIN to TMAX Hz/kHz Peak-to-peak amplitude at NOTES: 2. Adjust CC above the start threshold before setting it to Output frequency equals oscillator frequency for the UCx842 and UCx843. Output frequency is one-half oscillator frequency for the UCx844 and UCx845. error amplifier section Feedback input voltage at Input bias current µa Open-loop voltage amplification O = 2 to db Gain-bandwidth product MHz Supply voltage rejection ratio CC = 12 to db Output sink current FB at 2.7, at ma Output source current FB at 2.3, at ma High-level output voltage FB at 2.3, RL = 15 kω to Low-level output voltage FB at 2.7, RL = 15 kω to NOTE 2: Adjust CC above the start threshold before setting it to 15. POST OFFICE BOX DALLAS, TEXAS

6 electrical characteristics, CC = 15 (see Note 2), R T = 10 kω, C T = 3.3 nf, T A = full range (unless otherwise specified) (continued) current sense section oltage amplification See Notes 4 and / Current sense comparator threshold at 5, See Note Supply voltage rejection ratio CC = 12 to 25, See Note db Input bias current µa Delay time to output ns NOTES: 2. Adjust CC above the start threshold before setting it to These parameters are measured at the trip point of the latch with FB at oltage amplification is measured between and with the input changing from 0 to 0.8. output section High-level output voltage Low-level output voltage IOH = 20 ma IOH = 200 ma IOL = 20 ma IOL = 200 ma Rise time CL = 1 nf, TJ = 25 C ns Fall time CL = 1 nf, TJ = 25 C ns undervoltage lockout section Start threshold voltage Minimum operating voltage after start-up pulse-width-modulator section Maximum duty cycle UCx842, UCx UCx843, UCx UCx842, UCx UCx843, UCx UCx842, UCx843 95% 97% 100% 95% 97% 100% UCx844, UCx845 46% 48% 50% 46% 48% 50% Minimum duty cycle 0 0 supply voltage Start-up current ma Operating supply current FB and at ma Limiting voltage ICC = 25 ma POST OFFICE BOX DALLAS, TEXAS 75265

7 CURRENT-MODE CONTROLLERS electrical characteristics, CC = 15 (see Note 2), R T = 10 kω, C T = 3.3 nf, T J = 25 C (unless otherwise specified) reference section Y Output voltage IO = 1 ma 5 Line regulation CC = 12 to 25 6 m Load regulation IO = 1 ma to 20 ma 6 m Temperature coefficient of output voltage 0.2 m C Output noise voltage f = 10 Hz to 10 khz 50 µ Output voltage long-term drift After 1000 h at TA = 25 C 5 m Short-circuit output current 100 ma oscillator section Y Oscillator frequency (see Note 3) 52 khz Frequency change with supply voltage CC = 12 to 25 2 Hz/kHz Frequency change with temperature 5 Hz/kHz Peak-to-peak amplitude at 1.7 NOTES: 2. Adjust CC above the start threshold before setting it to Output frequency equals oscillator frequency for the UCx842 and UCx843. Output frequency is one-half oscillator frequency for the UCx844 and UCx845. error amplifier section Y Feedback input voltage at Input bias current 0.3 µa Open-loop voltage amplification O = 2 to 4 90 db Gain-bandwidth product 1 MHz Supply voltage rejection ratio CC = 12 to db Output sink current FB at 2.7, at ma Output source current FB at 2.3, at ma High-level output voltage FB at 2.3, RL = 15 kω to 6 Low-level output voltage FB at 2.7, RL = 15 kω to 0.7 current sense section Y oltage amplification See Notes 4 and 5 3 / Current sense comparator threshold at 5, See Note 4 1 Supply voltage rejection ratio CC = 12 to 25, See Note 4 70 db Input bias current 2 µa Delay time to output 150 ns NOTES: 2. Adjust CC above the start threshold before setting it to These parameters are measured at the trip point of the latch with FB at oltage amplification is measured between and with the input changing from 0 to 0.8. POST OFFICE BOX DALLAS, TEXAS

8 electrical characteristics, CC = 15 (see Note 2), R T = 10 kω, C T = 3.3 nf, T J = 25 C (unless otherwise specified) (continued) output section High-level output voltage Low-level output voltage Y IOH = 20 ma 13.5 IOH = 200 ma 13.5 IOL = 20 ma 0.1 IOL = 200 ma 1.5 Rise time CL = 1 nf 50 ns Fall time CL = 1 nf 50 ns undervoltage lockout section Start threshold voltage Minimum operating voltage after start-up pulse-width-modulator section Maximum duty cycle supply voltage Y UC3842Y, UC3844Y 16 UC3843Y, UC3845Y 8.4 UC3842Y, UC3844Y 10 UC3843Y, UC3845Y 7.6 Y UC3842Y, UC3843Y 97% UC3844Y, UC3845Y 48% Y Start-up current ma Operating supply current FB and at ma Limiting voltage ICC = 25 ma POST OFFICE BOX DALLAS, TEXAS 75265

9 CURRENT-MODE CONTROLLERS APPLICATION INFORMATION Error Amp 0.5 ma Zi FB Zf NOTE A. Error amplifier can source or sink up to 0.5 ma. Figure 1. Error Amplifier Configuration IS (see Note A) + Error Amp 2R Rf R 1 Current Sense Comparator RS Cf NOTE A: Peak current (IS) is determined by the formula: I S(max) 1 R S A small RC filter formed by resistor Rf and capacitor Cf may be required to suppress switch transients. Figure 2. Current Sense Circuit POST OFFICE BOX DALLAS, TEXAS

10 APPLICATION INFORMATION RT (see Note A) CT NOTE A: For RT > 5 KΩ f 1.72 RTCT Figure 3. Oscillator Section Dead Time µ s 100 ÏÏÏÏ CC = RT 5 kω ÏÏÏÏ TA = 25 C DEAD TIME vs TIMING CAPACITANCE CT Timing Capacitance nf R T Timing Resistance k Ω ÏÏÏÏÏ CC = 15 TA = 25 C CT = 22 nf CT = 47 nf TIMING RESISTANCE vs FREQUENCY CT = 100 nf CT = 10 nf CT = 4.7 nf CT = 2.2 nf CT = 1 nf 1 k 10 k 100 k 1 M f Frequency Hz Figure 4 Figure POST OFFICE BOX DALLAS, TEXAS 75265

11 CURRENT-MODE CONTROLLERS APPLICATION INFORMATION open-loop laboratory test fixture In the open-loop laboratory test fixture shown in Figure 6, high-peak currents associated with loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to the terminal in a single-point ground. The transistor and 5-kΩ potentiometer sample the oscillator waveform and apply an adjustable ramp to the terminal. 4.7 kω 1 kω Error Amp Adjust 4.7 kω 2N kω 5 kω Adjust RT DUT FB CC OUTPUT 0.1 µf 0.1 µf A 1 kω, 1 W CC Output CT Figure 6. Open-Loop Laboratory Test Fixture shutdown technique Shutdown of the PWM controller (see Figure 7) can be accomplished by two methods: either raise the voltage at above 1 or pull the terminal below a voltage two diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output remains low until the next clock cycle after the shutdown condition at the or terminal is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR that resets by cycling CC below the lower ULO threshold. At this point the reference turns off, allowing the SCR to reset. 1 kω 330 Ω Shutdown Shutdown 500 Ω To Current Sense Resistor Figure 7. Shutdown Techniques POST OFFICE BOX DALLAS, TEXAS

12 APPLICATION INFORMATION A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converters requiring duty cycles over 50% (see Figure 8). Note that capacitor C forms a filter with R2 to suppress the leading-edge switch spikes. 0.1 µf RT CT R1 R2 C RSENSE Figure 8. Slope Compensation 4 12 POST OFFICE BOX DALLAS, TEXAS 75265

13 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INOLE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEERE PROPERTY OR ENIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated

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