NE556, SA556, SE556, SE556C DUAL PRECISION TIMERS

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1 Two Precision Timing Circuits per Package Astable or Monostable Operation TTL-Compatible Output Can Sink or Source Up to 50 ma Active Pullup or Pulldown Designed to be Interchangeable With Signetics SE556, SE556C, SA556, NE556 applications Precision Timer From Microseconds to Hours Pulse-Shaping CIrcuit Missing-Pulse Detector Tone-Burst Generator Pulse-Width Modulator Pulse-Position Modulator Sequential Timer Pulse Generator Frequency Divider Application Timer Industrial Controls Touch-Tone Encoder SE556C FROM TI IS NOT RECOMMENDED FOR NEW DESIGNS description These devices provide two monolithic, independent timing circuits of the NE555, SA555, SE555, or SE555C type in each package. These circuits can be operated in the astable or the monostable mode with external resistor-capacitor timing control. The basic timing provided by the RC time constant may be actively controlled by modulating the bias of the control voltage input. The threshold and trigger levels are normally two-thirds and one-third respectively of V CC. These levels can be altered by use of the control voltage terminal. When the trigger input falls below trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset input can override all other inputs and can be used to initiate a new timing cycle. When the reset input goes low, the flip-flop is reset and the output goes low. Whenever the output is low, a low impedance path is provided between the discharge terminal and ground. NE556, SA D, J, OR N PACKAGE SE556, SA556C...J PACKAGE (TOP VIEW) DISCH THRES CONT RESET OUT TRIG CONT RESET OUT No internal connection V CC 2DISCH 2THRES 2CONT 2RESET 2OUT 2TRIG SE556, SE556C... FK PACKAGE (TOP VIEW) THRES DISCH TRIG V CC 2DISCH 2TRIG 2OUT 2THRES 2CONT 2RESET functional block diagram (each timer) THRES TRIG CONT R R R RESET R R OUT S DISCH RESET can override TRIG, which can override THRES. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 99, Texas Instruments Incorporated POST OFFICE BOX DALLAS, TEXAS 5265

2 description (continued) The NE556 is characterized for operation from 0 C to 0 C. The SA556 is characterized for operation from 40 C to 5 C, and the SE556 and SE556C are characterized for operation over the full military range of 55 C to 25 C. TA RANGE Vthres max = 5 V AVAILABLE OPTIONS PACKAGE SMALL OUTLINE CHIP OUTLINE CERAMIC DIP PLASTIC DIP (D) (FK) (J) (N) 0 C to 0 C.2 V NE556D NE556J 40 C to 5 C.2 V SA556D SA556J SA556N 55 C to 25 C 0.6 V.2 V SE556FK SE556CFK The D package is available taped and reeled. Add the suffix R to the devicetype (e.g., NE556DR). FUTION TABLE RESET TRIGGER VOLTAGE THRESHOLD VOLTAGE OUTPUT DISCHARGE SWITCH Low Irrelevant Irrelevant Low On High < /3 VDD Irrelevant High Off High > /3 VDD > 2/3 VDD Low On High > /3 VDD > 2/3 VDD As previously established Voltage levels shown are nominal. absollute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC (see Note ) V Input voltage (CONT, RESET, THRES, and TRIG) V CC Output current ± 225 ma Continuous total dissipation See Dissipation Rating Table Operating free-air temperature range: NE C to 0 C SA C to 5 C SE556, SE556C C to 25 C Storage temperature range C to 50 C Case temperature for 60 seconds: FK package C Lead temperature,6 mm (/ inch) from case for 60 seconds: J package C Lead temperature,6 mm (/ inch) from case for 0 seconds: D or N package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE : All voltage values are with respect to network ground terminal. PACKAGE TA 25 C POWER RATING DISSIPATION RATING TABLE DERATING FACTOR ABOVE TA = 25 C TA = 0 C POWER RATING TA = 5 C POWER RATING TA = 25 C POWER RATING D 950 mw.6 mw/ C 60 mw 494 mw N/A FK 35 mw.0 mw/ C 0 mw 5 mw 25 mw J (NE556, SA556) 025 mw.2 mw/ C 656 mw 533 mw N/A J (SE556, SE556C) 35 mw.0 mw/ C 0 mw 5 mw 25 mw N 55 mw 2.6 mw/ C 00 mw 9 mw N/A 2 POST OFFICE BOX DALLAS, TEXAS 5265

3 recommended operating conditions NE556 SA556 SE556 SE556C MIN MAX MIN MAX MIN MAX MIN MAX UNIT Supply voltage, V Input voltage (CONT, RESET, THRES, and TRIG), VI V Output current, IO ±200 ±200 ±200 ±200 ma Operating free-air temperature, TA C electrical characteristics, V CC = 5 V to 5 V, T A = 25 C (unless otherwise noted) VT PARAMETER Threshold voltage level NE556, SA556, TEST CONDITIONS SE556C SE556 MIN TYP MAX MIN TYP MAX = 5 V = 5 V IT Threshold current (see Note 2) na VTRIG Trigger voltage level = 5 V = 5 V ITRIG Trigger current TRIG at 0 V µa VRESET Reset voltage level V IRESET Reset current RESET at RESET at 0 V IDISCH Discharge switch off-state current na VCONT VOL VOH ICC Control voltage (open circuit) Low-level output voltage High-level output voltage Supply current = 5 V = 5 V =5V =5V =5V IOL = 0 ma IOL = 50 ma IOL = 00 ma IOL = 200 ma IOL = 5 ma IOL = ma IOH = 00 ma IOH = 200 ma V = 5 V IOH = 00 ma Output low, = 5 V No Load = 5 V Output high, = 5 V No load = 5 V UNIT V V ma V V ma na NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure. For example, when = 5 V, the maximum value is R = RA + RB 3.4 MΩ, and for = 5 V, the maximum value is 0 MΩ. POST OFFICE BOX DALLAS, TEXAS

4 operating characteristics, V CC = 5 V and 5 V PARAMETER TEST CONDITIONS NE556, SA556, SE556 SE556C MIN TYP MAX MIN TYP MAX Each timer, monostable Initial error of timing interval Each timer, astable TA = 25 C 2.25%.5% Temperature coefficient i of timing interval Supply voltage sensitivity of timing interval Timer Timer 2 ± ±0.5 Each timer, monostable Each timer, astable TA = MIN to MAX ppm/ C Timer Timer 2 ±0 ±0 Each timer, monostable Each timer, astable TA = 25 C %/ V Timer Timer 2 ±0.2 ±0. Output pulse rise time CL L = 5 pf, ns Output pulse fall time TA = 25 C For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run. Values specified are for a device in a monostable circuit similar to Figure 2, with component values as follow: RA = 2 kω to 00 kω, C = 0.µF. Values specified are for a device in an astable circuit similar to Figure, with component values as follow: RA = kω to 00 kω, C = 0.µF. UNIT APPLICATION INFORMATION (5 V to 5 V) Open (see Note A) (5 V to 5 V) RA CONT 0.0 µf RB C RESET DISCH THRES TRIG OUT RL OUT INPUT RA CONT RESET DISCH THRES TRIG OUT RL OUT NOTE A: Bypassing the control voltage input to ground with a capacitor may improve operation. This should be evaluated for individual applications. Figure. Circuit for Astable Operation Figure 2. Circuit for Monostable Operation 4 POST OFFICE BOX DALLAS, TEXAS 5265

5 D (R-PDSO-G**) PIN SHOWN MECHANICAL INFORMATION PLASTIC SMALL-OUTLINE PACKAGE (,2) (0,5) 0.0 (0,35) M PINS ** DIM A MAX A MIN 0.9 (5,00) 0.9 (4,0) (,5) 0.33 (,55) (0,00) 0.36 (9,0) 0.5 (4,00) 0.50 (3,) (6,20) 0.22 (5,0) 0.00 (0,20) NOM Gage Plane A (,2) 0.0 (0,40) Seating Plane (,5) MAX (0,0) (0,0) / D 0/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed (0,5). D. Falls within JEDEC MS-02 POST OFFICE BOX DALLAS, TEXAS

6 FK (S-CQCC-N**) 2 TERMINAL SHOWN MECHANICAL INFORMATION LEADLESS CERAMIC CHIP CARRIER NO. OF TERMINALS ** MIN A MAX MIN B MAX (,69) 0.35 (9,09) 0.30 (,0) 0.35 (9,09) A SQ B SQ (,23) (,26) 0.39 (,) 0.93 (23,3). (2,99) 0.45 (,63) (,6) 0.6 (9,32) (24,43).5 (29,59) (0,3) (2,5) (2,5) 0.50 (2,6).04 (26,6) 0.45 (,63) (,22) (,22) 0.5 (2,).063 (2,0) (0,5) 0.00 (2,03) (,63) (0,5) (,40) (,) (,) (0,9) 0.02 (0,) (0,54) (,2) (,) (0,9) 40400/ D 0/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS POST OFFICE BOX DALLAS, TEXAS 5265

7 J (R-GDIP-T**) PIN SHOWN MECHANICAL INFORMATION CERAMIC DUAL-IN-LINE PACKAGE DIM PINS ** 20 B A MAX 0.30 (,) 0.30 (,) 0.30 (,) 0.30 (,) A MIN (,3) (,3) (,3) (,3) C B MAX B MIN 0.5 (9,94) 0.55 (9,) 0.5 (9,94) 0.55 (9,) 0.90 (23,0) 0.95 (24,) (23,62) C MAX 0.20 (,) (,62) (,62) (,62) (,65) (,) C MIN (6,22) (6,22) (6,22) (6,22) 0.00 (2,54) 0.00 (,) (0,5) MIN A (5,0) MAX 0.30 (3,30) MIN Seating Plane 0.00 (2,54) (0,5) 0.05 (0,3) 0.0 (0,36) 0.00 (0,20) /C 0/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only. E. Falls within MIL-STD-35 GDIP-T, GDIP-T, GDIP-T, and GDIP-T20 POST OFFICE BOX DALLAS, TEXAS 5265

8 N (R-PDIP-T**) PIN SHOWN MECHANICAL INFORMATION PLASTIC DUAL-IN-LINE PACKAGE DIM PINS ** 20 A A MAX 0.5 (9,69) 0.5 (9,69) (23.3) 0.95 (24,) 9 A MIN 0.45 (,92) 0.45 (,92) 0.50 (2.59) (23,) (6,60) (6,0) 0.00 (,) MAX (0,9) MAX (0,5) MIN 0.30 (,) (,3) (5,0) MAX 0.25 (3,) MIN Seating Plane 0.00 (2,54) (0,53) 0.05 (0,3) M NOM / PIN ONLY /C 0/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-00 (20 pin package is shorter then MS-00.) POST OFFICE BOX DALLAS, TEXAS 5265

9 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. ILUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 99, Texas Instruments Incorporated

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