AMIS High-Speed Low Power CAN Transceiver

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AMIS- High-Speed Low Power CAN Transceiver Description The AMIS CAN transceiver is the interface between a controller area network (CAN) protocol controller and the physical bus and may be used in

1 AMIS- High-Speed Low Power CAN Transceiver Description The AMIS CAN transceiver is the interface between a controller area network (CAN) protocol controller and the physical bus and may be used in both V and V systems. The transceiver provides differential transmit capability to the bus and differential receive capability to the CAN controller. Due to the wide common mode voltage range of the receiver inputs, the AMIS is able to reach outstanding levels of electromagnetic susceptibility (EMS). Similarly, extremely low electromagnetic emission (EME) is achieved by the excellent matching of the output signals. The AMIS is a new addition to the CAN high speed transceiver family and offers the following additional features: Features Wake up (WU) Over Bus Voltage Source via V SPLIT Pin for Stabilizing the Recessive Bus Level (Further EMC Improvement) Ideal Passive Behavior when Supply Voltage is Removed Extremely Low Current Standby Mode Compatible with the ISO 9 Standard (ISO 9, ISO 9 and SAE J) High Speed (up to Mbps) Ideally Suited for V and V Industrial and Automotive Applications Extremely Low Current Standby Mode with Wake up via the Bus Low EME Common Mode Choke is No Longer Required Differential Receiver with Wide Common Mode Range ( V) for High EMS Transmit Data () Dominant Time out Function Thermal Protection Bus Pins Protected against Transients in an Automotive Environment Power Down Mode in which the Transmitter is Disabled Bus and V SPLIT Pins Short Circuit Proof to Supply Voltage and Ground Logic Level Inputs Compatible with. V Devices These are Pb Free Devices V CC SOIC CASE XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb Free Package AMIS (Top View) XXXXX ALYW V SPLIT PC0009. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 0 of this data sheet. PIN ASSIGNMENT MARKING DIAGRAM Semiconductor Components Industries, LLC, 0 January, 0 Rev. 0 Publication Order Number: AMIS /D

2 Table. TECHNICAL CHARACTERISTICS Symbol Parameter Conditions Min Max Unit V CC Power Supply Voltage.. V V DC Voltage at Pin 0. V CC V V DC Voltage at Pin 0. V CC V V DC Voltage at Pin 0. V CC V V DC Voltage at Pin 0 < V CC <. V; No Time Limit + V V DC Voltage at Pin 0 < V CC <. V; No Time Limit + V V SPLIT DC Voltage at Pin V SPLIT 0 < V CC <. V; No Time Limit + V V O(dif)(bus_dom) Differential Bus Output Voltage in Dominant State. < R LT < 0. V CM range Input Common Mode Range for Comparator Guaranteed Differential Receiver Threshold and Leakage Current + V V CM peak Common Mode Peak See Figures and mv C load Load Capacitance on IC Outputs 0 pf t pd(rec dom) Propagation Delay to See Figure 90 0 ns t pd(dom rec) Propagation Delay to See Figure 90 ns T J Junction Temperature 0 0 C AMIS POR Timer Thermal Shutdown Mode & Wake up Control Driver Control Wake up Filter + COMP + COMP Figure. Block Diagram PC000.

3 TYPICAL APPLICATION VBAT IN V reg OUT R LT = 0 CAN Controller AMIS C LT = nf CAN BUS R PC0009. Figure. Application Diagram Table. PIN LIST AND DESCRIPTIONS Pin Name Description Transmit Data Input; Low Input Dominant Driver; Internal Pullup Current Ground V CC Supply Voltage Receive Data Output; Dominant transmitter Low Output V SPLIT Common Mode Stabilization Output Low Level CAN Bus Line (Low in Dominant Mode) High Level CAN Bus Line (High in Dominant Mode) Standby Mode Control Input

4 Table. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Conditions Min. Max. Unit V CC Supply Voltage 0. + V V DC Voltage at Pin 0 < V CC <. V; No Time Limit 0 +0 V V DC Voltage at Pin 0 < V CC <. V; No Time Limit 0 +0 V V SPLIT DC Voltage at Pin V SPLIT 0 < V CC <. V; No Time Limit 0 +0 V V DC Voltage at Pin 0. V CC + 0. V V DC Voltage at Pin 0. V CC + 0. V V DC Voltage at Pin 0. V CC + 0. V V tran() Transient Voltage at Pin Note V V tran() Transient voltage at Pin Note V V tran() Transient Voltage at Pin V SPLIT Note V V esd(/ /) Electrostatic Discharge Voltage at and Pin Note Note V esd Electrostatic Discharge Voltage at All Other Pins Note Note Latch up Static Latch up at all Pins Note 0 ma T stg Storage Temperature +0 C T amb Ambient Temperature 0 + C T J Maximum Junction Temperature 0 +0 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Applied transient waveforms in accordance with ISO part, test pulses,, a, and b (see Figure ).. Standardized human body model electrostatic discharge (ESD) pulses in accordance to MIL method 0... Static latch up immunity: Static latch up protection level when tested according to EIA/JESD.. Standardized charged device model ESD pulses when tested according to EOS/ESD DS kv V kv V Table. THERMAL CHARACTERISTICS Symbol Parameter Conditions Value Unit R th(vj a) Thermal Resistance from Junction to Ambient in SOIC Package In free air K/W R th(vj s) Thermal Resistance from Junction to Substrate of Bare Die In free air K/W FUNCTIONAL DESCRIPTION AMIS provides two modes of operation as illustrated in Table. These modes are selectable through pin. Table. OPERATING MODES Mode Pin Pin RXD Normal Low Bus Dominant Bus Recessive Standby High Wake up Request Detected No Wake up Request Detected Normal Mode In the normal mode, the transceiver is able to communicate via the bus lines. The signals are transmitted and received to the CAN controller via the pins and. The slopes on the bus lines outputs are optimized to give extremely low EME. Low High Standby Mode In standby mode both the transmitter and receiver are disabled and a very low power differential receiver monitors the bus lines for CAN bus activity. The bus lines are terminated to ground and supply current is reduced to a minimum, typically 0 A. When a wake up request is

5 detected by the low power differential receiver, the signal is first filtered and then verified as a valid wake signal after a time period of t dbus, the pin is driven low by the transceiver to inform the controller of the wake up request. Split Circuit The V SPLIT Pin is operational only in normal mode. In standby mode this pin is floating. The V SPLIT is connected as shown in Figure and its purpose is to provide a stabilized DC voltage of 0. x V CC to the bus avoiding possible steps in the common mode signal therefore reducing EME. These unwanted steps could be caused by an unpowered node on the network with excessive leakage current from the bus that shifts the recessive voltage from its nominal 0. x V CC voltage. Wake up When a valid wake up (dominant state longer than t dbus ) is received during the standby mode the pin is driven low. Wake up behavior in case of a permanent dominant due to, for example, a bus short represents the only difference between the circuit sub versions listed in the Ordering Information table. It is depicted in Figures and. When the standby mode is entered while a dominant is present on the bus, the unconditioned bus wake up versions will signal a bus wakeup immediately after the state transition (seen as a High level glitch on ). The other version (differing purely by a metal level modification in the digital part) will signal bus wakeup only after the initial dominant is released. In this way it s ensured, that a CAN bus can be put to a low power mode even if the nodes have a level sensitivity to pin and a permanent dominant is present on the bus. Overtemperature Detection A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 0 C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC are reduced. All other IC functions continue to operate. The transmitter off state resets when Pin goes high. The thermal protection circuit is particularly needed when a bus line short circuits. Dominant Time out Function A dominant time out timer circuit prevents the bus lines being driven to a permanent dominant state (blocking all network communication) if Pin is forced permanently low by a hardware and/or software application failure. The timer is triggered by a negative edge on pin. If the duration of the low level on Pin exceeds the internal timer value t dom(), the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on Pin. See Figure 0. This dominant time out time (t dom() ) defines the minimum possible bit rate to 0 kbps. Fail Safe Features A current limiting circuit protects the transmitter output stage from damage caused by accidental short circuit to either positive or negative supply voltage, although power dissipation increases during this fault condition. The pins and are protected from automotive electrical transients (according to ISO ; see Figure ). Pins and are pulled high internally should the input become disconnected. Pins, and will be floating, preventing reverse supply should the V CC supply be removed. t dbus t dbus unconditioned WU Normal Standby* *Even if bus dominant signals longer than tdbus are echoed on, the transceiver stays in standby mode until is released. Figure. AMISTJAA/ Wake up Behavior time t dbus Normal Standby* time *On this derivative, bus dominant signals longer than t dbus are echoed on after the bus passed through a recessive time following the trigger of. The transceiver stays in standby mode until is released. Figure. AMISTJAA Wake up Behavior

6 Definitions All voltages are referenced to (Pin ). Positive currents flow into the IC. AMIS ELECTRICAL CHARACTERISTICS CHARACTERISTICS V CC =. V to. V; T J = 0 C to +0 C; R LT = 0 unless specified otherwise. Symbol Parameter Conditions Min Typ Max Unit SUPPLY (PIN V CC ) I CC Supply Current Dominant; V = 0 V Recessive; V = V CC ma I CCS Supply Current in Standby Mode T J,max = 00 C 0 A TRANSMITTER DATA INPUT (PIN ) V IH High Level Input Voltage Output Recessive.0 V CC + 0. V V IL Low Level Input Voltage Output Dominant V I IH High Level Input Current V = V CC 0 + A I IL Low Level Input Current V = 0 V 00 0 A C i Input Capacitance Not Tested 0 pf TRANSMITTER MODE SELECT (PIN ) V IH High Level Input Voltage Standby Mode.0 V CC + 0. V V IL Low Level Input Voltage Normal Mode V I IH High Level Input Current V = V CC 0 + A I IL Low Level Input Current V = 0 V 0 A C i Input Capacitance Not Tested 0 pf RECEIVER DATA OUTPUT (PIN ) I oh High Level Output Current V o = 0. x V CC 0 ma I ol Low Level Output Current V o = 0. x V CC 0 ma BUS LINES (PINS AND ) V o(reces) (norm) Recessive Bus Voltage Normal Mode V = V CC ; No Load.0..0 V V o(reces) (stby) Recessive Bus Voltage V = V CC ; No Load Standby Mode I o(reces) () Recessive Output Current at Pin V < V < + V; 0 V < V CC <. V I o(reces) () Recessive Output Current at Pin V < V < + V; 0 V < V CC <. V I LI() Input Leakage Current to Pin V CC = 0 V; V = V = V I LI() Input Leakage Current to Pin V CC = 0 V; V = V = V mv. +. ma. +. ma 0 +0 A 0 +0 A V o(dom) () Dominant Output Voltage at Pin V = 0 V.0.. V V o(dom) () Dominant Output Voltage at Pin V = 0 V 0... V V o(dif) (bus_dom) Differential Bus Output Voltage (V V ) V = 0 V; Dominant;. < R LT < V V o(dif) (bus_rec) Differential Bus Output Voltage (V V ) V = V CC ; Recessive; No Load mv I o(sc) () Short Circuit Output Current at Pin V = 0 V; V = 0 V 0 0 ma

7 CHARACTERISTICS V CC =. V to. V; T J = 0 C to +0 C; R LT = 0 unless specified otherwise. Symbol Parameter Conditions Min Typ BUS LINES (PINS AND ) I o(sc) () Short Circuit Output Current at Pin V = V; V = 0 V 0 0 ma V i(dif) (th) Differential Receiver Threshold Voltage (see Figure ) V < V < + V; V < V < + V; Max Unit V V ihcm(dif) (th) Differential Receiver Threshold Voltage for High Common Mode (See Figure ) V < V < + V; V < V < + V; V V i(dif) (hys) Differential Receiver Input Voltage Hysteresis (see Figure ) V < V < + V; V < V < + V; mv R i(cm) () Common Mode Input Resistance at Pin k R i(cm) () Common Mode Input Resistance at Pin k R i(cm) (m) Matching Between Pin and Pin Common Mode Input Resistance V = V 0 + % R i(dif) Differential Input Resistance 0 k C i() Input Capacitance at Pin V = V CC ; Not Tested. 0 pf C i() Input Capacitance at Pin V = V CC ; Not Tested. 0 pf C i(dif) Differential Input Capacitance V = V CC ; Not Tested. 0 pf COMMON MODE STABILIZATION (PIN V SPLIT ) V SPLIT Reference Output Voltage at Pin V SPLIT Normal Mode; 00 A < I SPLIT < 00 A 0. x 0. x V CC V CC I SPLIT(i) V SPLIT Leakage Current Standby Mode + A I SPLIT(lim) V SPLIT Limitation Current Normal Mode + ma POWER ON RESET (POR) PORL POR Level, in Tri State Below POR Level... V THERMAL SHUTDOWN T J(sd) Shutdown Junction Temperature C TIMING CHARACTERISTICS (see Figures and ) t d( BUSon) Delay TXD to Bus Active C l = 00 pf Between to t d( BUSoff) Delay TXD to Bus Inactive C l = 00 pf Between to 0 0 ns ns t d(buson RXD) Delay Bus Active to RXD C rxd = pf 0 ns t d(busoff RXD) Delay Bus Inactive to RXD C rxd = pf ns t pd(rec dom) Propagation Delay TXD to RXD from Recessive to Dominant C l = 00 pf Between to 90 0 ns t d(dom rec) Propagation Delay TXD to RXD from Dominant to Recessive C l = 00 pf Between to 90 ns t d(stb nm) Delay Standby Mode to Normal Mode. 0 s t dbus Dominant Time for Wake up via Bus 0.. s t dom() Dominant Time for Time Out V = 0 V s Baudrate Communication Speed Achievable 0k M bps

8 MEASUREMENT SETUPS AND DEFINITIONS + V 00 nf nf AMIS Transient Generator nf PC0009. pf Figure. Test Circuit for Automotive Transients V High Low Hysteresis PC V i(dif)(hys) Figure. Hysteresis of the Receiver + V 00 nf AMIS RLT 0 CLT 00 pf pf PC0009. Figure. : Test Circuit for Timing Characteristics

9 HIGH LOW V i(dif) = V V 0.9 V Dominant 0. V Recessive 0. x 0. x T d( BUSon) T d( BUSoff) T d(busoff ) T pd(rec dom) T pd(dom rec) Figure. Timing Diagram for AC Characteristics PC0009. t d(stb nm) Mode Standby Normal Transition delay Figure 9. Transition from Standby to Normal time t d(stb nm) Time Out(*) *The time out is reset on rising edge. time Figure 0. AMIS Time Out Bus Blockage Prevention in Case of Controller Failure 9

10 + V 00 nf Generator AMIS. k. k 0 nf Active Probe Spectrum Anayzer 0 0 pf nf Figure. Basic Test Setup for Electromagnetic Measurement PC Figure. EME Measurements DEVICE ORDERING INFORMATION Part Number Version Temperature Range Package Type Shipping AMISTJAAG Unconditioned Bus Wake up 0 C C SOIC * 9 Tube / Tray AMISTJAARG 0 C C SOIC * AMISTJAAL 0 C C SOIC ** AMISTJAARL 0 C C SOIC ** 000 / Tape & Reel 9 Tube / Tray 000 / Tape & Reel AMISTJAAG Bus Wake up Inactive in Case of Bus Fault 0 C C SOIC * 9 Tube / Tray AMISTJAARG 0 C C SOIC * 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD0/D. *Matte Sn, JEDEC MS 0 ** NiPdAu, JEDEC MS 0 0

11 PACKAGE DIMENSIONS X B Y Z H G A D S C 0. (0.00) M Z Y S X S 0. (0.00) M SEATING PLANE Y 0.0 (0.00) M SOIC CASE 0 ISSUE AK N X M K SOLDERING FOOTPRINT* J NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9.. CONTROLLING DIMENSION: MILLIMETER.. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION 0. (0.00) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0. (0.00) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.. 0 THRU 0 ARE OBSOLETE. NEW STANDARD IS 0. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D G. BSC 0.00 BSC H J K M 0 0 N S mm SCALE : inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box, Denver, Colorado 0 USA Phone: 0 or 00 0 Toll Free USA/Canada Fax: 0 or 00 Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: 00 9 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: 00 ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative AMIS /D

NCV7342. High Speed Low Power CAN Transceiver

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