A SIGNAL IDENTIFICATION MODEL FOR MIMO DESIGN

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1 International Journal of Emerging Tehnology and Innovative Engineering Volume I, Issue7, July 2015 (ISSN: ) A SIGNAL IDENTIFICATION MODEL FOR MIMO DESIGN 1 A.Vimala, Department of ETE, Engineering, 1 tel2vimala@gmail.om Dr.P.Karthigai umar, Department of ETE, Engineering, parthigaiumar@gmail.om 2 Y.Camy Joshya, Department of ETE Engineering 2 shiyasmith@gmail.om ABSTRACT This paper presents the design of MIMO signal detetor based on LTE-A downlin. The detetor use multiple input multiple output (MIMO) modes lie Spatial multipleing (SM), Spatial Diversity (SD) and Spae Division Multiple Aess (SDMA). Area effiieny is ahieved by Near Maimum detetion algorithms. The goal of the proet is to develop a parallel multistage VLSI arhiteture to ahieve area effiieny and high detetion throughput. The MIMO modes are implemented in the pre proessing stage of MIMO detetor arhiteture. The parallel multistage VLSI arhiteture is used to ahieve high detetion throughput where multiple nodes are proessed simultaneously in eah layer. The Eulidean distane Calulation and interferene anellation sheme redues the ritial path delay of the system. The detetor design uses 2 2 antenna, 64 QAM modulations with three MIMO modes. Key-Words Multiple Input Multiple Output Signal detetor (MIMO), spatial diversity (SD), spae division multiple aess (SDMA), Spatial Multipleing(SM), Very Large Sale Integration (VLSI) 1. INTRODUCTION The requirement of International Mobile Teleommuniations Advaned (IMTA-A) standard for fourth generation wireless networing is ahieved using third generation partnership proet (3GPP) with LTE-A downlin. The Multiple Input Multiple Output (MIMO) ommuniation system plays a ey role in fourth generation mobile wireless ommuniation standards to inrease the data rate to several mega bits per seond. The signal detetor is designed based on some tree searh algorithm, whih ahieves near ML performane with less ompleity than optimal ML method performane. The MIMO transmission system uses multiple antennas at both the transmitter and reeiver sides [1-3]. The basi antenna onfiguration used in 3GPP-LTE is 2 2 antennas whih an be further inreased to 4 2 or 4 4.In general to ahieve beyond gigabit per seond data rate LTE-A downlin is ombined with Orthogonal frequeny division multiple aess sheme. The VLSI implementation of MIMO detetor is used to ahieve high detetion throughput and area effiieny [4-5]. The main obetive of this proet is to design an area effiient MIMO detetor that supports spatial multipleing(sm), Spatial diversity(sd) and spae division multiple aess(sdma) signal detetion that provide Near maimum detetion performane. At the algorithm level the detetor is designed based on the tree epansion aording to reliable nodes and etend only the reliable nodes so that only fewer branhes are etended for ompleity redution[6-7]. For theoretial analysis we use algorithm level approahes and the real predition of detetor is analyzed from the parallel multistage VLSI arhiteture. The development proess starts from spatial multipleing signal detetion, implemented using an imbalaned epansion sheme applied to Fied Compleity sphere deoder (FSD) [8]. The FSD algorithm is used to redue ompleity redution. The net step is to develop the detetion sheme for spatial diversity and spae division multiple aess sheme [7]. For theoretial verifiation we use real value suessive interferene anellation algorithm for spatial diversity signal detetion. In the detetor arhiteture real value deomposition or qr deomposition at the pre proessing stage and interferene anelation unit at the detetion stage supports spatial diversity signal detetion mode. For SDMA mode the Matri permutation at the preproessing stage reutilizes the imbalaned FSD algorithm in SM mode. The purpose of matri permutation is to move the desired signal of eah user to the top layer of searh tree so that the unwanted 55

2 detetions are avoided [9-12]. The performane of MIMO detetor is simulated using Modelsim. The remainder of this paper is organized as follows. In setion II we give the desription of LTE- A downlin system model. In setion III MIMO detetion algorithms is proposed. In setion IV VLSI arhiteture is implemented. Setion V eplains about the results simulated and finally setion VI onludes the paper. 2. MIMO SYSTEM The LTE-A downlin MIMO transmission system uses one base station (BS) and K-user equipments (UEs) shown in fig.1.here both the base station and user equipments has N antennas. The reeived N 1 omple signal vetor in the n th subarrier of user is given by r, n H, n w, n, n w, n 1 ; n=1,2,.,n sub (1) Where N sub = number of sub arriers,,n =N N is omple hannel matri between the base station and th UE,,n = transmitted symbols, (0),n,. (P-1),n is the P layers of,n is the vetor of identially distributed zero mean Gaussian noise samples,,n is N P preoding matri seleted from finite odeboo In this proet =1 and P=N in both SM and SD transmissions. is set to be N dimensional identity matri in SM system and an Alamouti spae frequeny oding matri in SD system [13-14]. For SDMA system, aording to 3GPP LTE standard P is set to one, K is set to N and,n is hosen suh that H H H,n.,n =1 and,n. l,,l,n =0,n means hermitian transpose of,n.. Fig 1: LTE-A downlin transmission system 3. MIMO DETECTION ALGORITHMS The obetive of MIMO detetion algorithm is to reover the original transmitted by nowing the reeived signal and hannel.the MIMO detetion with near ML algorithm have better performane and high hardware utilization by sharing most of the operations among different nodes. 3.1 Signal Detetion Algorithms for SM Mode Fied Compleity sphere Deoder (FSD) algorithm is used for signal detetion in spatial Multipleing (SM) mode. The purpose of FSD algorithm is, it searhes only the fied number of possible transmitted signals, generated by a small subset of all possible signals loated around the reeived signal vetor. The FSD transforms the losest point searh problem to a tree searh proedure by performing QR deomposition to the hannel matri H=QR, where Q is unitary and R is upper triangular matri. FSD arries the tree searh proedure to alulate the partial Eulidean distane (PED) between the nodes of the tree and it is given by T i = T i+2 + in i + in i+1 in i = y i in i+1 = y i+1 2N 2 R i - R i,i i 2 i, R i,i i 2 2N R R i+1,i+1 i i 1, i+1-r i+1,i+1 i+1 2 (2) Where T i is the partial Eulidean distane between the nodes The reliability of the andidate node is related to the PED, large PED the node is disarded and it is not transmitted and smaller PED the node is transmitted. The imbalaned FSD possess low ompleity and hardware saving is good. 3.2 Signal Detetion for SD Mode The real value or QR deomposition at the pre proessing stage and interferene anellation at detetion stage is used for signal detetion in SD mode. The resulting orthogonal real-valued representation of the QR-deomposed (H n = Q n R n ) system model is then given as (the user inde is also negleted here in the SD mode) y n = R n s n + v n, n [1,2] (3) 56

3 The inter-antenna interferene introdued by 2 is aneled from y i n (n, i [1,2]) after we got the result of 2 n = y i n - 4 l=3 R n,(i,l) S n (4) Sine R n,(1,2) =0(n [1,2]), the symbol 1 is eteted with a similar method given by ) = arg min (y y 2 2 )-(R 1,22 +R 2,22 )I( 1 ) 2 I( 1 I( 1 ) M R( 1 ) =arg min (y y 1 2 )-(R 1,11+ R 2,11 )R( 1 ) 2 R( 1 ) M (5) The detetion results in the proposed algorithm are attained by deoding the real and imaginary parts of 1 and 2 separately. Apparently, this approah maes finding the ML nodes muh simpler than the omple-value ML algorithm, beause the searh zone has been redued from M omple points to M real points. It is worth to reemphasize that this simplifiation is arued from the real-value/qr deomposition and the interferene anelation. 3.3 Signal Detetion for SDMA Mode Deteting the downlin SDMA signal is unique in that only the signals dediated to the th user (i.e., ) are reserved. Obviously, the ML detetion has the problem of spending too muh deteting effort on the unwanted signals ( l,l ). To avoid suh prohibitive omputational waste while maintaining a near-ml performane, we propose to reuse the developed imbalaned-fsd algorithm. Beause the original imbalaned-fsd onduts an ambitious searh at the top layer of the omple-valued searh tree, while using a very simple single-node epansion in the remaining layers,we mae a slight modifiation suh that the desired signal is moved to the top layer to guaranteed a near-ml detetion. The signal movement is aomplished by introduing a permutation matri P as = H 1,..., K]P P P (6) where P = [ 1, -1,, K, ] T is the transmit vetor with being moved to the top layer and P = [p 1, p -1, p +1, p K, p ] is the permutation matri, where p i denotes an N 1 vetor whose ith element is one, but all others are zeros. Taing H as the equivalent hannel matri input, the matri-permutated-fsd then onduts eatly the imbalaned-fsd tree searh to get the estimation result P, in whih is the desired signal for user, retained and outputted for further proessing, while l,l are the signals intended for other users, disarded after detetion. Sine these unneeded signals are deteted at the bottom layers of the searh tree where relatively low-ompleity single-node epansion is performed, the proposed algorithm diminishes the wasted omputation effiiently. 4. VLSI ARCHITECTURE The VLSI arhiteture for MIMO detetor supports the detetion of spatial multipleing, spatial diversity and spae division multiple aess MIMO signals with 2 2/4 4 antenna and 64 QAM modulation.the goal of this proet is to design an area effiient, and high throughput MIMO detetor based on these tehniques in both arhiteture and iruit level design. The detetor is portioned in to a preproessing blo and four stages of proess elements (PEs), orresponding to the eight layers of the searh tree in the ase of 4 4 MIMO onfiguration. Fig.2 VLSI arhiteture of MIMO signal detetor T ing the h nnel m tri H, the preoding matri and the reeived signal vetor as inputs, the pre-proessing blo eeutes matri permutation orthogonal real-value/qr deomposition, as well as the y=q H r alulation. Eah PE stage onsists of three funtion blos: an interferene anelation unit (ICU) that suppresses the inter-antenna interferene introdued by the previously deteted signals, a node seletion unit (NSU) that selets the L i,m best nodes and a PED alulation unit (PCU). The PED alulation unit with orthogonal real value deomposition omputes the Eulidean distane between two adaent tree layers by one PE stage. The number of PE stage is redued to half of the pipelined detetors by real 57

4 value deomposition whih leads to effetive hardware saving. The PEs are divided into PE-A and PE-B, PE-A performs multiple node epansion and PE-B performs single node epansion in remaining three stages. The Min blo at the output stage selets branh with smallest Eulidean distane. 5. IMPLEMENTATION RESULTS AND DISCUSSION The designed multi mode MIMO detetor is modeled in Verilog Hardware Desription Language (Verilog- HDL), and simulated using Modelsim.The proposed detetor will support multiple MIMO signal transmission modes namely spatial multipleing, spatial diversity and spae division multiple aess. The ost redution is ahieved by the proposed method. The modified arhiteture redues arithmetial operations. Fig.5 Output Waveform of PE-B Fig.6 Output Waveform of MIMO detetor Fig.3 Output Waveform of Pre-proessing blo 6. CONCLUSION In this proet, an algorithmi design and VLSI implementation of multi mode MIMO detetor is proposed. At algorithm level, imbalaned FSD, real value suessive interferene anellation and matri permuted FSD are developed for deteting spatial multipleing, spatial diversity and spae division multiple aess signals respetively. The proposed parallel multistage VLSI arhiteture is developed for high throughput MIMO detetor design. 7. REFERENCES Fig.4 Output Waveform of PE_A [1] Liang Liu, Johan Lofgren and Peter Nilsson Area effiient onfigurable high throughputsignal detetor supporting multiple MIMO modes IEEE Trans. Ciruits Syst-1, vol 59, no.9, Sep

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