250 MHz, Voltage Output 4-Quadrant Multiplier AD835

Transcription

1 a FEATURES Simple: Basic Function is W = XY + Z Complete: Minimal External Components Required Very Fast: Settles to.% of FS in ns DC-Coupled Voltage Output Simplifies Use High Differential Input Impedance X, Y and Z Inputs Low Multiplier Noise: nv/ Hz APPLICATIONS Very Fast Multiplication, Division, Squaring Wideband Modulation and Demodulation Phase Detection and Measurement Sinusoidal Frequency Doubling Video Gain Control and Keying Voltage Controlled Amplifiers and Filters MHz, Voltage Output 4-Quadrant Multiplier AD3 FUNCTIONAL BLOCK DIAGRAM X X Y X = X X XY Y = Y XY + Z + Z INPUT AD3 W OUTPUT PRODUCT DESCRIPTION The AD3 is a complete four-quadrant voltage output analog multiplier fabricated on an advanced dielectrically isolated complementary bipolar process. It generates the linear product of its X and Y voltage inputs, with a 3 db output bandwidth of MHz (a small signal rise time of ns). Full-scale ( V to + V) rise/fall times are. ns (with the standard R L of Ω) and the settling time to.% under the same conditions is typically ns. Its differential multiplication inputs (X, Y) and its summing input (Z) are at high impedance. The low impedance output voltage (W) can provide up to ±. V and drive loads as low as Ω. Normal operation is from ± V supplies. Though providing state-of-the-art speed, the AD3 is simple to use and versatile. For example, as well as permitting the addition of a signal at the output, the Z input provides the means to operate the AD3 with voltage gains up to about. In this capacity, the very low product noise of this multiplier ( nv Hz) makes it much more useful than earlier products. The AD3 is available in an -pin plastic mini-dip package (N) and an -pin SOIC (R) and is specified to operate over the 4 C to + C industrial temperature range. PRODUCT HIGHLIGHTS. The AD3 is the first monolithic MHz four quadrant voltage output multiplier.. Minimal external components are required to apply the AD3 to a variety of signal processing applications. 3. High input impedances ( kω pf) make signal source loading negligible. 4. High output current capability allows low impedance loads to be driven.. State of the art noise levels achieved through careful device optimization and the use of a special low noise bandgap voltage reference. 6. Designed to be easy to use and cost effective in applications which formerly required the use of hybrid or board level solutions. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Analog Devices, Inc., 994 One Technology Way, P.O. Box 96, Norwood. MA 6-96, U.S.A. Tel: 67/39-47 Fax: 67/36-73

2 AD3 SPECIFICATIONS Model TRANSFER FUNCTION (T A = + C, V S = V, R L =, C L pf unless otherwise noted) AD3AN/AR (X X)(Y ) W = + Z U Parameter Conditions Min Typ Max Unit INPUT CHARACTERISTICS (X, Y) Differential Voltage Range V CM = ± V Differential Clipping Level. ±.4 V Low Frequency Nonlinearity X = ± V, Y = V.3. % FS Y = ± V, X = V..3 % FS T MIN to T MAX X = ± V, Y = V.7 % FS Y = ± V, X = V. % FS Common-Mode Voltage Range. +3 V Offset Voltage ± 3 mv T MIN to T MAX ± mv CMRR f khz; ± V p-p 7 db Bias Current µa T MIN to T MAX 7 µa Offset Bias Current µa Differential Resistance kω Single-Sided Capacitance pf Feedthrough, X X = ± V, Y = V 46 db Feedthrough, Y Y = ± V, X = V 6 db DYNAMIC CHARACTERISTICS 3 db Small-Signal Bandwidth MHz. db Gain Flatness Frequency MHz Slew Rate W =. V to +. V V/µs Differential Gain Error, X f = 3. MHz.3 % Differential Phase Error, X f = 3. MHz. Degrees Differential Gain Error, Y f = 3. MHz. % Differential Phase Error, Y f = 3. MHz. Degrees Harmonic Distortion X or Y = dbm, nd and 3rd Harmonic Fund = MHz 7 db Fund = MHz 4 db Settling Time, X or Y To.%, W = V p-p ns SUMMING INPUT (Z) Gain From Z to W, f MHz db Small-Signal Bandwidth MHz Differential Input Resistance 6 kω Single Sided Capacitance pf Maximum Gain X, Y to W, Z Shorted to W, f = khz db Bias Current µa OUTPUT CHARACTERISTICS Voltage Swing ±. ±. V T MIN to T MAX ±. V Voltage Noise Spectral Density X = Y =, f < MHz nv/ Hz Offset Voltage ± 7 mv T MIN to T MAX ± mv Short Circuit Current 7 ma Scale Factor Error ± % FS T MIN to T MAX ± 9 % FS Linearity (Relative Error) 3 ±.. % FS T MIN to T MAX ±. % FS POWER SUPPLIES Supply Voltage For Specified Performance ± 4. ± ±. V Quiescent Supply Current 6 ma T MIN to T MAX 6 ma PSRR at Output vs. Vp +4. V to +. V. %/V PSRR at Output vs. Vn 4. V to. V. %/V NOTES T MIN = 4 C, T MAX = + C. Normalized to zero at + C. 3 Linearity is defined as residual error after compensating for input offset, output voltage offset and scale factor errors. All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test. Specifications subject to change without notice.

3 AD3 ABSOLUTE MAXIMUM RATINGS Supply Voltage ±6 V Internal Power Dissipation mw Operating Temperature Range C to +C Storage Temperature Range C to + C Lead Temperature, Soldering 6 sec C ESD Rating V NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Thermal Characteristics: -Pin Plastic DIP (N): θ JC = 3 C/W; θ JA = 9 C/W -Pin Plastic SOIC (R): θ JC = 4 C/W; θ JA = C/W. PIN CONNECTIONS -Pin Plastic DIP (N) -Pin Plastic SOIC (R) Y VN Z 3 4 AD3 TOP VIEW (Not to Scale) 7 6 X X VP W ORDERING GUIDE Model Temperature Range Package Options* AD3AN 4 C to + C N- AD3AR 4 C to + C R- *N = Plastic DIP; R = Small Outline IC Plastic Package (SOIC). Typical Performance Characteristics DG DP (NTSC) FIELD = LINE = Wfm FCC COMPOSITE DIFFERENTIAL GAIN % DIFFERENTIAL PHASE Degrees ST ST ND ND 3RD 3RD Figure. Typical Composite Output Differential Gain & Phase, NTSC for X Channel; f = 3. MHz, R L = Ω 4TH 4TH MIN =. MAX =. p-p/max =. TH MIN =. MAX =.6 p-p =.6 TH 6TH 6TH MAGNITUDE db 4 6 X, Y, Z CH = dbm R L = Ω C L pf GAIN PHASE M M M G Figure 3. Gain & Phase vs. Frequency of X, Y, Z Inputs 9 9 PHASE Degrees DG DP (NTSC) FIELD = LINE = Wfm FCC COMPOSITE MIN =. MAX =.. p-p/max =.3 DIFFERENTIAL GAIN % DIFFERENTIAL PHASE Degrees ST ST ND ND 3RD 3RD 4TH 4TH TH MIN =. MAX =.6 p-p =.6 TH 6TH 6TH MAGNITUDE db k X, Y CH = OdBm R L = Ω C L pf M M M G Figure. Typical Composite Output Differential Gain & Phase, NTSC for Y Channel; f = 3. MHz, R L = Ω Figure 4. Gain Flatness to. db 3

4 AD3 X, Y CH = dbm R L = Ω C L < pf MAGNITUDE db X FEEDTHROUGH Y FEEDTHROUGH Y FEEDTHROUGH X FEEDTHROUGH 4 6 CMRR db M M M G M M M G Figure. X and Y Feedthrough vs. Frequency Figure. CMRR vs. Frequency for X or Y Channel, R L = Ω, C L pf dbm ON SUPPLY X, Y = V.V GND.V PSRR db PSRR ON V+ PSRR ON V mv ns 3k M M M G Figure 6. Small Signal Pulse Response at W Output, R L = Ω, C L pf, X Channel = ±. V, Y Channel = ±. V Figure 9. PSRR vs. Frequency for V+ and V Supply MHz V GND db/div V MHz 3MHz mv ns Figure 7. Large Signal Pulse Response at W Output, R L = Ω, C L pf, X Channel = ±. V, Y Channel = ±. V Figure. Harmonic Distortion at MHz; dbm Input to X or Y Channels, R L = Ω, C L = pf 4

5 AD3 MHz OUTPUT OFFSET DRIFT WILL TYPICALLY BE WITHIN SHADED AREA db/div MHz MHz V OS OUTPUT DRIFT mv OUTPUT V OS DRIFT, NORMALIZED TO AT C TEMPERATURE C Figure. Harmonic Distortion at MHz, dbm Input to X or Y Channel, R L = Ω, C L pf Figure 4. V OS Output Drift 3 db/div MHz MHz 3MHz 3RD ORDER INTERCEPT dbm 3 X CH = 6dBm Y CH = dbm R L = Ω RF FREQUENCY INPUT X CHANNEL MHz Figure. Harmonic Distortion at MHz, dbm Input to X or Y Channel, R L = Ω, C L pf Figure. Fixed LO on Y Channel vs. RF Frequency Input to X Channel 3 +.V GND.V 3RD ORDER INTERCEPT dbm 3 X CH = 6dBm Y CH = dbm R L = Ω V ns LO FREQUENCY ON Y CH MHz Figure 3. Maximum Output Voltage Swing, R L = Ω, C L pf Figure 6. Fixed IF vs. LO Frequency on Y Channel

6 AD3 PRODUCT DESCRIPTION The AD3 is a four-quadrant, voltage output, analog multiplier fabricated on an advanced, dielectrically isolated, complementary bipolar process. In its basic mode, it provides the linear product of its X and Y voltage inputs. In this mode, the 3 db output voltage bandwidth is MHz (a small signal rise time of ns). Full-scale ( V to + V) rise/fall times are. ns (with the standard R L of Ω) and the settling time to.% under the same conditions is typically ns. As in earlier multipliers from Analog Devices, a unique summing feature is provided at the Z-input. As well as providing independent ground references for inputs and output, and enhanced versatility, this feature allows the AD3 to operate with voltage gain. Its X-, Y- and Z-input voltages are all nominally ± V FS, with overrange of at least %. The inputs are fully differential and at high impedance ( kω pf) and provide a 7 db CMRR (f MHz). The low impedance output is capable of driving loads as small as Ω. The peak output can be as large as ±. V minimum for R L = Ω, or ±. V minimum into R L = Ω. The AD3 has much lower noise than the AD34 or AD734, making it attractive in low level signal-processing applications, for example, as a wideband gain-control element or modulator. Basic Theory The multiplier is based on a classic form, having a translinear core, supported by three (X, Y, Z) linearized voltage-to-current converters, and the load driving output amplifier. The scaling voltage (the denominator U, in the equations below) is provided by a bandgap reference of novel design, optimized for ultralow noise. Figure 7 shows the functional block diagram. In general terms, the AD3 provides the function (X X)(Y ) W = + Z () U where the variables W, U, X, Y and Z are all voltages. Connected as a simple multiplier, with X = X X, Y = Y and Z =, and with a scale factor adjustment (see below) which sets U = V, the output can be expressed as W=XY () Simplified representations of this sort, where all signals are presumed to be expressed in volts, are used throughout this data sheet, to avoid the needless use of less-intuitive subscripted variables (such as V X ). We can view all variables as being normalized to V. For example, the input X can either be stated as being in the range V to + V, or simply to +. The latter representation will be found to facilitate the development of new functions using the AD3. The explicit inclusion of the denominator, U, is also less helpful, as in the case of the AD3, if it is not an electrical input variable. Scaling Adjustment The basic value of U in Equation is nominally. V. Figure, which shows the basic multiplier connections, also shows how the effective value of U can be adjusted to have any lower voltage (usually V) through the use of a resistive-divider between W (Pin ) and Z (Pin 4). Using the general resistor values shown, we can rewrite Equation as W = XY + kw + ( k)z ' (3) U (where Z' is distinguished from the signal Z at Pin 4). It follows that XY W = ( k)u + Z' (4) In this way, we can modify the effective value of U to U' = ( k)u () without altering the scaling of the Z' input. (This is to be expected, since the only ground reference for the output is through the Z' input.) Thus, to set U' to V, remembering that the basic value of U is. V, we need to choose R to have a nominal value of times R. The values shown here allow U to be adjusted through the nominal range.9 V to. V, that is, R provides a % gain adjustment. +V +V FB 4.7µF TANTALUM X X X = X X XY AD3 XY + Z + W OUTPUT X Y.µF CERAMIC 7 6 X X X VP W AD3 Y VN Z 3 4 W R = ( k) R kω Y Y = Y 4.7µF TANTALUM.µF CERAMIC FB Z R = kr Ω Z INPUT V Figure 7. Functional Block Diagram Figure. Multiplier Connections Note that in many applications, the exact gain of the multiplier may not be very important; in which case, this network may be omitted entirely, or R fixed at Ω. 6

7 AD3 APPLICATIONS The AD3 is both easy to use and versatile. The capability for adding another signal to the output at the Z input is frequently valuable. Three applications of this feature are presented here: a wideband voltage controlled amplifier, an amplitude modulator and a frequency doubler. Of course, the AD3 may also be used as a square law detector (with its X- and Y-inputs connected in parallel) in which mode it is useful at input frequencies to well over MHz, since that is the bandwidth limitation only of the output amplifier. Multiplier Connections Figure shows the basic connections for multiplication. The inputs will often be single sided, in which case the X and inputs will normally be grounded. Note that by assigning Pins 7 and to these (inverting) inputs, respectively, an extra measure of isolation between inputs and output is provided. The X and Y inputs may, of course, be reversed to achieve some desired overall sign with inputs of a particular polarity, or they may be driven fully differentially. Power supply decoupling and careful board layout are always important in applying wideband circuits. The decoupling recommendations shown in Figure should be followed closely. In remaining figures in this data sheet, these power supply decoupling components have been omitted for clarity, but should be used wherever optimal performance with high speed inputs is required. However, they may be omitted if the full high frequency capabilities of AD3 are not being exploited. A Wideband Voltage Controlled Amplifier Figure 9 shows the AD3 configured to provide a gain of nominally to db. (In fact, the control range extends from well under db to about +4 db.) R and R set the gain to be nominally 4. The attendant bandwidth reduction that comes with this increased gain can be partially offset by the addition of the peaking capacitor C. Although this circuit shows the use of dual supplies, the AD3 can operate from a single 9 V supply with slight revision. V G (GAIN CONTROL) V IN (SIGNAL) X X X VP W AD3 Y 7 +V 6 VN V R 3Ω VOLTAGE OUTPUT Figure 9. Voltage Controlled MHz Amplifier Using the AD3 The ac response of this amplifier for gains of db (V G =. V), 6 db (V G =. V) and db (V G = V) is shown in Figure. In this application, the resistor values have been slightly adjusted to reflect the nominal value of U =. V. The overall sign of the gain may be controlled by the sign of V G. Z 3 4 R 97.6Ω C 33pF db (V G = V) 6dB (V G =.V) db (V G =.V) k k START.Hz Figure. AC Response of VCA An Amplitude Modulator Figure shows a simple modulator. The carrier is applied both to the Y-input and the Z-input, while the modulating signal is applied to the X-input. For zero modulation, there is no product term, so the carrier input is simply replicated at unity gain by the voltage follower action from the Z-input. At X = V, the RF output is doubled, while for X = V, it is fully suppressed. That is, an X-input of approximately ± V (actually ±U, or about. V) corresponds to a modulation index of %. Carrier and modulation frequencies can be up to 3 MHz, somewhat beyond the nominal 3 db bandwidth. Of course, a suppressed carrier modulator can be implemented by omitting the feedforward to the Z-input, grounding that pin instead. MODULATION INPUT CARRIER OUTPUT X X X VP W AD3 Y 7 MODULATED CARRIER OUTPUT Figure. Simple Amplitude Modulator Using the AD3 Squaring and Frequency Doubling Amplitude domain squaring of an input signal, E, is achieved simply by connecting the X- and Y-inputs in parallel to produce an output of E /U. The input may have either polarity, but the output in this case will always be positive. The output polarity may be reversed by interchanging either the X or Y inputs. When the input is a sine wave E sin ωt, a signal squarer behaves as a frequency doubler, since ( E sinωt) = E ( cos ωt ) (6) U U While useful, Equation 6 shows a dc term at the output which will vary strongly with the amplitude of the input, E. M +V 6 VN V Z 3 4 M M STOP.Hz 7

8 AD3 Figure shows a frequency doubler which overcomes this limitation and provides a relatively constant output over a moderately wide frequency range, determined by the time-constant C and R. The voltage applied to the X- and Y-inputs are exactly in quadrature at a frequency f = / πcr and their amplitudes are equal. At higher frequencies, the X-input becomes smaller while the Y-input increases in amplitude; the opposite happens at lower frequencies. The result is a double frequency output, centered on ground, whose amplitude of V for a V input varies by only.% over a frequency range of ±%. Because there is no squared dc component at the output, sudden changes in the input amplitude do not cause a bounce in the dc level. Figure. Broadband Zero-Bounce Frequency Doubler This circuit is based on the identity cos θ sinθ = sinθ ( 7) At ω O = /CR, the X input leads the input signal by 4 (and is attenuated by, while the Y input lags the input signal by 4, and is also attenuated by. Since the X and Y inputs are 9 out of phase, the response of the circuit will be W = U V G C R E (sinωt 4 ) E X X X VP W AD3 Y 7 +V 6 VN V (sinωt + 4 ) = E U (sinωt ) () which has no dc component, R and R3 are included to restore the output to V for an input amplitude of V (the same gain adjustment as mentioned earlier). Because the voltage across the capacitor, C, decreases with frequency, while that across the resistor, R, increases, the amplitude of the output varies only slightly with frequency. In fact, it is only.% below its full value (at its center frequency ω Ο = /CR) at 9% and % of this frequency. Z 3 4 R 97.6Ω R3 3Ω VOLTAGE OUTPUT PIN. (.33) MAX.6 (4.6). (.93) OUTLINE DIMENSIONS Dimensions shown in inches and (mm).. (.).4 (.36) PIN.9 (.).4 (.).43 (.9).34 (.4). (.4) BSC -Pin Plastic DIP (N Package) 4.7 (.77).4 (.). (7.).4 (6.).6 (.). (.3).3 (3.3) MIN SEATING PLANE -Pin Plastic SOIC (R Package).96 (.).9 (4.). (.7) BSC.74 (4.).497 (3.) 4.44 (6.).4 (.).9 (.49).3 (.3). (.9).94 (.39).9 (.).7 (.9).3 (.).3 (7.6). (.3). (.4).9 (4.9). (.93).96 (.) x 4.99 (.). (.7).6 (.4) PRINTED IN U.S.A. C93a 3 /94