HA-2520, HA-2522, HA-2525

Transcription

1 HA-, HA-, HA- Data Sheet September 99 File Number 9. MHz, High Slew Rate, Uncompensated, High Input Impedance, Operational Amplifiers HA-// comprise a series of operational amplifiers delivering an unsurpassed combination of specifications for slew rate, bandwidth and settling time. These dielectrically isolated amplifiers are controlled at close loop gains greater than without external compensation. In addition, these high performance components also provide low offset current and high input impedance. V/µs slew rate and ns (.%) settling time of these amplifiers make them ideal components for pulse amplification and data acquisition designs. These devices are valuable components for RF and video circuitry requiring up to MHz gain bandwidth and MHz power bandwidth. For accurate signal conditioning designs the HA-// s superior dynamic specifications are complemented by na offset current, MΩ input impedance and offset trim capability. MIL-STD- product and data sheets are available upon request. Ordering Information PART NUMBER (BRAND) TEMP. RANGE ( o C) PACKAGE HA-- - to Pin Metal Can T.C HA-- - to Pin Metal Can T.C HA-- to Pin Metal Can T.C HA-- to Ld PDIP E. PKG. NO. Features High Slew Rate V/µs Fast Settling ns Full Power Bandwidth MHz Gain Bandwidth (A V ) MHz High Input Impedance MΩ Low Offset Current nA Compensation Pin for Unity Gain Capability Applications Data Acquisition Systems RF Amplifiers Video Amplifiers Signal Generators Pinouts HA- (CERDIP) HA- (PDIP, CERDIP, SOIC) TOP VIEW -IN +IN - + HA-- - to Ld CERDIP F.A HA-- to Ld CERDIP F.A HA9P- (H) to Ld SOIC M. HA-// (METAL CAN) TOP VIEW IN- - + IN+ CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. --INTERSIL or -- Copyright Intersil Corporation 999

2 HA-, HA-, HA- Absolute Maximum Ratings Supply Voltage (Between and Terminals) V Differential Input Voltage V Output Current ma Operating Conditions Temperature Range HA-/ o C to o C HA o C to o C Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) θ JC ( o C/W) Metal Can Package PDIP Package N/A CERDIP Package SOIC Package N/A Maximum Junction Temperature (Hermetic Packages) o C Maximum Junction Temperature (Plastic Package) o C Maximum Storage Temperature Range o C to o C Maximum Lead Temperature (Soldering s) o C (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications V SUPPLY = ±V PARAMETER TEMP ( o C) HA-- HA-- HA-- MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS INPUT CHARACTERISTICS Offset Voltage mv Full mv Offset Voltage Drift Full µv/ o C Bias Current na Full na Offset Current na Full na Input Resistance (Note ) MΩ Common Mode Range Full ±. - - ±. - - ±. - - V TRANSFER CHARACTERISTICS Large Signal Voltage Gain (Notes, ) Common Mode Rejection Ratio (Note ) kv/v Full kv/v Full db Gain Bandwidth (Notes, ) MHz Minimum Stable Gain V/V PUT CHARACTERISTICS Output Voltage Swing (Note ) Full ±. ±. - ±. ±. - ±. ±. - V Output Current (Note ) ± ± - ± ± - ± ± - ma Full Power Bandwidth (Notes, ) MHz TRANSIENT RESPONSE (A V = +) Rise Time (Notes,,, ) ns Overshoot (Notes,,, ) % Slew Rate (Notes,,, ) ± ± - ± ± - ± ± - V/µs Settling Time (Notes,,, ) µs

3 HA-, HA-, HA- Electrical Specifications V SUPPLY = ±V (Continued) PARAMETER TEMP ( o C) HA-- HA-- HA-- MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS POWER SUPPLY CHARACTERISTICS Supply Current ma Power Supply Rejection Ratio (Note 9) Full db NOTES:. This parameter value is based on design calculations.. R L = kω.. V CM = ±V.. A V >.. V O = ±.V.. C L = pf.. V O = ±mv. 9. V = ±.V.. See Transient Response Test Circuits and Waveforms. Slew Rate. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW = πv. V = ±V. PEAK Test Circuits and Waveforms +.V INPUT -.V +V % PUT V % ERROR BAND -V SLEW ±mv FROM t RATE FINAL VALUE = V/ t SETTLING TIME FIGURE. SLEW RATE AND SETTLING TIME INPUT V ±mv 9% PUT % V ±mv OVERSHOOT RISE TIME NOTE: Measured on both positive and negative transitions from V to +mv and V to -mv at the output. FIGURE. TRANSIENT RESPONSE µf INPUT.Ω.µF + - µf PUT pf IN + - pf Ω Ω pf D G N S Ω.µF Ω 999.9Ω SETTLING TIME TEST POINT Ω CR CR FIGURE. SLEW RATE AND TRANSIENT RESPONSE NOTES:. A V = -.. Feedback and summing resistor ratios should be.% matched.. Clipping diodes CR and CR are optional. HP- recommended. FIGURE. SETTLING TIME TEST CIRCUIT

4 HA-, HA-, HA- Test Circuits and Waveforms (Continued) kω IN. C C NOTE: Tested offset adjustment range is V OS + mv minimum referred to output. Typical ranges are ±mv with R T = kω. FIGURE. SUGGESTED V OS ADJUSTMENT AND ENSATION HOOK-UP Schematic Diagram +INPUT Q Q 9 Q R R Q R OFFSET- PIN R Q R AA R.K R A Q A Q A R BB R.K R B Q R A R B Q Q Q Q Q Q 9 Q Q A Q Q B Q A Q B Q Q R A Q R B R A R B R 9 Q B Q B Q A Q A Q B OFFSET+ Q B C pf Q Q Q B R Q R 9 D Q B Q 9 D R R Q A PUT R Q A D A -INPUT All Intersil semiconductor products are manufactured, assembled and tested under ISO9 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site

5 HA-, HA-, HA- Typical Application Inverting Unity Gain Circuit Figure shows a Compensation Circuit for an inverting unity gain amplifier. The circuit was tested for functionality with supply voltages from ±V to ±V, and the performance as tested was: Slew Rate V/µs; Bandwidth MHz; and Settling Time (.%) ns. Figure illustrates the amplifier s frequency response, and it is important to note that capacitance at pin must be minimized for maximum bandwidth. IN K K pf K K + - HA- FIGURE. INVERTING UNITY GAIN CIRCUIT GAIN (db) PHASE GAIN K K M M FIGURE. FREQUENCY RESPONSE FOR INVERTING UNITY GAIN CIRCUIT PHASE SHIFT (DEGREES) Typical Performance Curves V S = ±V, T A = o C, Unless Otherwise Specified OFFSET VOLTAGE (mv) BIAS CURRENT (na) FIGURE. OFFSET VOLTAGE vs TEMPERATURE ( TYPICAL UNITS FROM LOTS) FIGURE 9. BIAS CURRENT vs TEMPERATURE ( TYPICAL UNITS FROM LOTS) OFFSET BIAS CURRENT (na) A VOL (kv/ V) FIGURE. OFFSET CURRENT vs TEMPERATURE ( TYPICAL UNITS FROM LOTS) FIGURE. OPEN LOOP GAIN vs TEMPERATURE ( TYPICAL UNITS FROM LOTS)

6 HA-, HA-, HA- Typical Performance Curves V S = ±V, T A = o C, Unless Otherwise Specified (Continued) PUT CURRENT (±ma) PUT VOLTAGE SWING (±V) R L = kω FIGURE. PUT CURRENT vs SUPPLY VOLTAGE FIGURE. PUT VOLTAGE SWING vs SUPPLY VOLTAGE SUPPLY CURRENT (ma) o C o C - o C GAIN (db) GAIN AT A V = PHASE AT A V = OPEN LOOP PHASE OPEN LOOP GAIN K K K M M M PHASE ANGLE (DEGREES) FIGURE. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE. FREQUENCY RESPONSE - K pf pf K K M M M pf pf pf pf INPUT NOISE VOLTAGE (nv/ Hz) INPUT NOISE CURRENT INPUT NOISE VOLTAGE. K K K. INPUT NOISE CURRENT (pa/ Hz) FIGURE. OPEN LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM PIN TO GROUND FIGURE. INPUT NOISE CHARACTERISTICS

7 HA-, HA-, HA- Typical Performance Curves V S = ±V, T A = o C, Unless Otherwise Specified (Continued) PUT VOLTAGE SWING (V P-P ) V SUPPLY = ±V V SUPPLY = ±V V SUPPLY = ±V NORMALIZED TO ±V DATA R L = kω C L = pf BANDWIDTH NEGATIVE SLEW RATE POSITIVE SLEW RATE K K M M FIGURE. PUT VOLTAGE SWING vs FREQUENCY. 9 9 FIGURE 9. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE Die Characteristics DIE DIMENSIONS: mils x mils x 9 mils (µm x µm x µm) METALLIZATION: Type: Al, % Cu Thickness: kå ±kå SUBSTRATE POTENTIAL: Unbiased PASSIVATION: Type: Nitride (Si N ) over Silox (SiO, % Phos.) Silox Thickness: kå ±kå Nitride Thickness:.kÅ ±.kå TRANSISTOR COUNT: PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout HA-, HA-, HA- -IN +IN