Advanced Digital-Radio Baseband Processor A Software-Defined Radio Baseband Processor IC

Transcription

1 Advaced Digital-Radio Basebad Processor A Software-Defied Radio Basebad Processor C Combiatio Full-Duplex Voice-Codec ad Digital Sigal Processor C A-to-D ad D-to-A terfaces NNOVATONS NV/TwoWay/981/1 March 200 Software-Defied Radio (SDR) Processor C Multi-Mode Digital/Aalogue PMR ad Truked Radio High tegratio Saves Cost, Space, Power ad Desig Time Programmable Flexibility Eables Use i May Radio Systems Trasmit ad Receive Aalogue ad Digital Processig - Tx ad Rx programmable multi-tap FR filters Exceptioal Rx SNAD Performace Full-Duplex Voice Codec with put ad Output Gai Settig ad Speaker/Earpiece Power Amplifiers Flexible Serial terfaces for Multi-Processor Operatio Auxiliary s ad s for Acillary Radio Fuctios Autoomously Performs May Critical DSP tesive Fuctios SUTABLE APPLCATONS Low-Power 2.5V Operatio TETRA - APCO25 - Tetrapol - RCR STD-39 - ARB STD-T61 - ARB STD-T85 EV9810 EvKit Available.... ad may other digital radio systems CML Microcircuits Two-Way Radio COMMUNCATON SEMCONDUCTORS

2 Digital Radio* - Commuicate with CML - Narrowbad digital radio systems provide may advatages over traditioal aalogue FM approaches. By implemetig error correctio, a digital system ca cosistetly maitai a respectable operatig rage eve i the presece of sigificat iterferece. The majority of curret PMR ad truked digital radio systems deal ot oly i voice trasactios, but also i data, video ad still graphics; all withi a fixed badwidth. the case of voice trasactios over a digital system, the digital radio system ca provide high-quality voice output, eve i high oise eviromets. Local Oscillator Voice Voice Coder Chael Codig, TDMA Frame Formattig Oscillator / DPSK RRC RRC RF Modulator '' 90 '' Carrier Oscillator Cartesia Loop Liear PA Tx Audio terface Rx Audio terface Processig µc ad/or DSP Tx Radio terface Acillary Tx Radio Aalogue terface terfaces Rx Radio terface Mod. ad RF Tx Battery PA Temp. PA Power AGC RSS RF Rx, F ad Demod. A theoretical arrowbad digital radio implemetatio High Performace Digital Radio voice desigs rely o a DSP to perform may of the sigal cotrol, ecodig, iterfacig, routig, level ad shapig tasks. The CMX981 is a truly uiversal i-phase ad quadrature ( ad ) compatible digital radio basebad processor ad voice-codec that ca be used with may types of aalogue ad digital modulatio schemes. With its flexibility, via software defiitio, the CMX981 ca be used i may types of system, icludig those operatig i: AM ad FM modes, ad usig AM, BPSK, PSK, pi/ DPSK ad FSK modulatio schemes. The CMX981 goes may steps further i the provisio, o chip, of the majority of basebad ad system iterfacig: voicebad digital-to-aalogue ad aalogue-to-digital coversio, Rx ad Tx sigal shapig via multi-tap digital FR filters ad pi/ DPSK modulatio. cluded o chip is a voice-codec sectio with gai cotrol ad loudspeaker ad earphoe amplifiers. additio to basebad sigal path processig, the CMX981 offers auxiliary D-to-A ad A-to-D fuctios for the iterfacig of other radio operatios. The itegratio of sigal processig fuctios digitally withi the CMX981 reduces the load requiremets o the host DSP ad µc, thus allowig the selectio of a lower cost, lower speed ad lower powered DSP/µC, ad releasig the host cotroller s time ad power for other tasks. The CMX981 s default filter co-efficiets are aimed at the TETRA stadard, but this versatile basebad C ca be programmed to operate i may other radio voice ad high-speed data systems. Direct access is available for writig to the ad Tx filters; additioally, the pi/ DPSK modulator ca be bypassed to allow formatted data to be writte directly to the sigal path. Flexible clock dividers allow differet voice codec ad sigal codec rates to be accommodated. *For the purposes of this ovatios documet, discussios cetre aroud arrowbad public ad private mobile ad truked radio systems. Other radio systems ca employ the CMX981. RF Amp Voice Badpass Voice Decoder pi/ DPSK Demodulator, Chael Decoder, TDMA Framig Narrowbad Digital Radio Stadards F Amp CMX981 withi a typical (TETRA) digital radio - the CMX981 performs the majority of basebad processes TETRA: TErrestrial Truked RAdio is a ope digital truked radio stadard defied by the Europea Telecommuicatios Stadardisatio stitute (ETS) to meet the eeds of digital, cellular, truked radio etworks. TETRA systems have bee, to-date, desiged ad developed otably as a mobile system for hadlig emergecy ad safety tasks ad is widely established i over 55 coutries. APCO 25 (P25) is a ope digital radio stadard suite specified for high-performace public safety radio applicatios i North America. Supportig both voice ad data services the suite icludes several America Natioal Stadards stitute (ANS) approved techical stadards developed by the TA TR-8 Committee ad its subcommittees. P25 Phase 1 radios support both digital ad aalog FM modulatio so they iteroperate with legacy aalog FM equipmet. Spectral efficiecy is 1 voice per 12.5kHz RF badwidth. P25 Phase 2 radios provide 1 voice per 6.25kHz RF badwidth. certai public safety bads, FCC rules ow require that radios support P25 iteroperability mode. Tetrapol is a digital truked radio system based o FDMA access ad GMSK modulatio. Like its competitor, TETRA, Tetrapol is widely used i a large umber of coutries, predomiately i Europe. RCR STD-39 is the stadard for 00MHz professioal digital mobile commuicatio systems icludig TDMA public radio i Japa. ARB STD-T61 is the stadard for 800MHz digital MCA systems i Japa usig p/ shift PSK for lad vehicles such as taxis. ARB STD-T85 is the stadard for 00MHz ad 150MHz Japaese professioal digital mobile commuicatio systems, icludig SCPC public radio. 90 RRC RRC '' '' '' '' CMX981 elemet Cotets - Digital Radio 2 - Operatioal Fuctios 3 - Voice Codec Trasmit 5 - Receive Cotrol; Power; terface 7 - Package ad Evaluatio outside back cover - 2

3 Operatioal Fuctios Microphoe 1 Microphoe 2 Loudspeaker VDDPA Earpiece VSSPA VSSPA AUX AUX3 AUX2 AUX1 Master (MCLK) Clock (up to 10MHz) CLOCK GEN CLOCKS Select To ad From Host µc or DSP Symbol Clock (18kHz) N_R1 N_R2 N_RESET CBUSEN CMDFS/CCLK CMDDAT/CDATA CMDRDFS/CSN CMDRDDAT/RDATA CMDFS2 CMDDAT2 CMDRDFS2 CMDRDDAT2 Serial terface Clock (Out) (MCLK MCLK/2 MCLK/) Fast Serial Port 2 Fast Serial Port 1 / C-BUS Cotrol Cotrol ad Routig terface, Test, Coefficiet ad Cotrol Data 36kb/sec Data Tx (ecode) Decimatio terpolatio Rx (decode) 16x FFO 18kSymbol/sec Badpass Sidetoe Badpass pi/ DPSK Modulator Rx/Tx loopback (test ad moitor) 18kSymbol/sec for each chael Direct Write Access Poit 0 to 22.5dB 1.5dB Step to -27.5dB 1dB Step Trasmit Chael (Tx radio iterface) Toe Geerator RRC (79-tap FR) 0/20dB 0 to -30dB 2dB Step 1kSample/sec for each chael 0 1 Ctrl 0or6dB PAs Liear Voice Codec (Rx ad Tx audio iterface) RRC (63-tap FR) 0or6dB Gai, Phase, Rampig, ad Offset Adjustmet 10-bit 10-bit 10-bit 1kSample/sec for each chael Tx Data Access Poit Logic SRAM Acillary Fuctios (aalogue iterfaces) 10-bit 1-bit 10-bit Sample ad Hold Recostructio MUX AUX1 AUX2 AUX3 AUX AUX5 AUX6 TXP TXN TXP TXN ad Outputs to Modulator TXFS TXDAT RXFS RXDAT Fast Serial Port 3 Serial terfaces Rx DATA 1kSample/sec for each chael RRC (63-tap FR) Receive Chael (Rx radio iterface) Low Pass (63-tap FR) 1kSample/sec for each chael Gai ad Offset Adjustmet Decimatio ad Verier Cotrol 2.30Mb/sec for each chael 16-bit Ctrl Tx/Rx loopback (test ad moitor) Ati-alias Supply puts RXP RXN RXP RXN ad puts from Demodulator VDDRX VDDTX VDDO VDDAUX VDDVC VDDD VDDD BAS1 BAS2 VSSD VSSD VSSD VSSVC VSSAUX VSSTX VSSRX - Give us the sigal - Let us do the rest - 3

4 Voice Codec Ecode (Tx) aalogue-to-digital coversio with coarse ad fie level cotrol Decode (Rx) digital-to-aalogue coversio with level cotrol plus earpiece ad loudspeaker PAs Sidetoe facility with level adjust Call/user toes available to Rx path Selectable clock/sample rates Microphoe 1 Microphoe 2 Loudspeaker Earpiece Select VSSPA VDDPA VSSPA Ecode (Tx) Path Dual selectable differetial microphoe sources put amp with selectable gai: 0db, 20dB ad mute Fie gai cotrol with 22.5dB rage 1-bit Sigma-Delta aalogue-to-digital coversio Digital ecode badpass filter coforms to CCTT G.712 stadard; with selectable highpass sectio Decimatio filter provides (8kHz) data suitable for radio system sigal formattig process 0 to 22.5dB 1.5dB Step 0/20dB Cotrol ad Routig Decimatio Tx terpolatio Rx Badpass Sidetoe Badpass to -27.5dB 1dB Step Toe Geerator 0 to -30dB 2dB Step 0or6dB PAs 0or6dB Liear Voice Codec Separate Rx ad Tx Paths Cotrolled by host via iteral registers Cofigurable to full-duplex operatio Decode (Rx) Path Data writte via serial iterface iterpolated to 32kHz Digital decode badpass filter coforms to CCTT G.712 stadard; with selectable highpass sectio Level ad period adjustable rig-toe geerator (0 to khz) ad programmable sidetoe path available 1-bit Sigma-Delta digital-to-aalogue coversio Fie gai cotrol with 0 to -30 db rage Two selectable output driver (0 or 6 db) amps: - Differetial speaker (130mW ito 8W ) - Sigle-eded earpiece (16.5mW ito 32W ) The digitizig voice codec of the CMX981 coverts voice sigals to ad from digital form ad ca be cofigured to apply a digital voice filter to meet the G.712 stadard. The ecode path (Tx) accepts a differetial aalogue audio iput sigal, coverts it ito digital form ad the applies digital filterig to produce a processed data stream. The decode path (Rx) accepts a digital stream writte to the serial iterface, applies digital filterig, coverts the result to a aalogue sigal, ad presets the audio at either differetial speaker or sigle-eded earphoe driver outputs. Additioally a sidetoe path ad audio toes ca be programmed. The iclusio of this audio/digital iterface facility o-chip miimizes the eed for additioal areas of PCB ad the attedat exteral compoets; o chip processig i this sectio reduces the host µc/dsp hardware, software, capacity ad power requiremets.

5 Trasmit Sectio pi/ DPSK modulatio Accurate cotrollable filterig Chael gai, phase ad offset maipulatio Aalogue recostructio Trasmit data access Programmable clock/sample rates Programmable output sigal rampig Chael Gai, Phase ad Offset Adjust depedet ( ad ) chael atteuatio is programmable - chael phase iversio is facilitated Phase pre-distortio provides compesatio for o-orthogoal carrier-phase i the RF modulator depedet ad digital offset correctio for aalogue Tx path offsets - or advace or retard The trasmit sectio of the CMX981 accepts the data stream from the host processor, via the serial iterface, ad passes it through the pi/ DPSK modulator. ad data streams from the modulator are applied to the relevat chael multi-tap digital filter to provide shapig i accordace with the RF chael requiremets. The availability of gai, phase ad offset adjustmets allow the dyamic compesatio of RF hardware ad trasmissio chael aomalies. To miimise the geeratio of spurii at Tx o ad off, the sigal level of each chael ca be ramped up (ad dow) at a programmed rate. Both chael sigals are recostructed via digitalto-aalogue coverters ad lowpass filters before beig made available as differetial aalogue outputs to the RF modulator. Provisio is made, to each digital chael, to allow the iput of data streams after the pi/ DPSK modulator for use with systems usig alterative modulatio schemes. As a system check, Tx ad Rx loopback test ad moitor paths are available. Note that the 18ksymbols/sec rate is suitable for TETRA use. Other rates may be programmed for use i other systems. pi/ DPSK Modulatio Symbol data from exteral processes via serial port -word deep FFO Bypassable pi/ DPSK modulator provides ecoded ad values for each iput phase Serial terfaces Cotrol ad Routig terface, Test, Coefficiet ad Cotrol Data Tx DATA 36kb/sec Trasmit Chael 16x FFO 18kSymbol/sec DATA pi/ DPSK Modulator Rx/Tx loopback (test ad moitor) 18kSymbol/sec for each chael RRC (79-tap FR) Direct Write Access - for alterative modulatio iputs Poits Trasmit Data Access Read ad write fuctios - Read the or sigal value at that poit - Write data directly ito the Sigma-Delta for other modulatio schemes Direct write access to the or iputs of the FR filters for the isertio of data 0 1 Ctrl RRC (63-tap FR) 1kSample/sec for each chael Gai, Phase, Rampig, ad Offset Adjustmet 1kSample/sec for each chael Tx Data Access Poits Logic 1-bit Tx/Rx loopback (test ad moitor) Recostructio Accurate, Cotrollable ig Programmable multi-tap FR filters for both ( ad ) chaels provide stopbad rejectio ad Root Raised Cosie (RRC) shapig Alterative FR coefficiets ca be programmed via serial iterface TXP TXN TXP TXN ad Outputs to Modulator Programmable Output Rampig Two modes of Tx output sigal-rampig are available: Liear or Sigmoidal Both amplitude ramp-up ad ramp-dow actios are programmable Aalogue Recostructio Low distortio 1-bit Sigma-Delta digital-to-aalogue coversio Switched capacitor lowpass filters shape ad outputs to RF modulator Tx/Rx ad Rx/Tx loopback facilities for test ad moitorig 5

6 Receive Sectio Aalogue-to-digital coversio Exceptioal SNAD performace Dyamic sigal maipulatio Digital processig Programmable clock dividers The receive sectio of the CMX981 accepts the demodulated ad output sigal from the radio sectio via differetial chael iputs. -bad pick-up is miimized usig this iput method. Samplig frequecy rejectio is carried out by the bypassable ati-alias filter. The followig Sigma-Delta aalogue-to-digital coverter displays extremely low distortio ad a dyamic rage i excess of 90dB. Gai ad offset adjustmet is available, to each chael, to set the dyamic rage of data withi the chael ad to remove system geerated offsets; phase iversio is available. The two chaels are idepedetly programmable thus allowig differetial gai correctios withi the digital domai. Digital filterig is applied to the data by two cascaded multi-tap FR filters which ehace stopbad rejectio ad provide a programmed shape (the default is a RRC respose) ad reduce the reliace o aalogue compoets. The CMX981 processed Rx data is the available to the system processor/s; demodulatio, would typically be performed by a exteral DSP. Aalogue-to-Digital Differetial aalogue ad iputs Selectable ati-alias filters exhibit high samplig frequecy rejectio Wide rage, low-distortio Sigma-Delta aalogue-to-digital coversio provides ad sigle bits for processig Dyamic Sigal Maipulatio Dyamic gai adjustmet with sigal phase iversio if required System offsets ca be stabilised Serial terfaces Cotrol ad Routig terface, Test, Coefficiet ad Cotrol Data Rx DATA Rx/Tx loopback (test ad moitor) 1kSample/sec for each chael RRC (63-tap FR) Low Pass (63-tap FR) Receive Chael 1kSample/sec for each chael Gai ad Offset Adjustmet Decimatio ad Verier Cotrol 2.30Mb/sec for each chael 16-bit Ctrl Ati-alias Tx/Rx loopback (test ad moitor) RXP RXN RXP RXN ad puts from Demodulator Digital Processig Programmable multi-tap low-pass ad RRC FR decimatio filters provide pre-process shapig ad chaels are idepedetly programmable Rx/Tx ad Tx/Rx loopback facilities for test ad moitorig 6

7 Cotrol; Power; terface To ad From Host µc or DSP MCLK SClk Symbol Clock (18kHz) N_R1 N_R2 N_RESET CBUSEN CMDFS/CCLK CMDDAT/CDATA CMDRDFS/CSN CMDRDDAT/RDATA CMDFS2 CMDDAT2 CMDRDFS2 CMDRDDAT2 Master Clock (MCLK) (up to 10MHz) CLOCK GEN Serial terface Clock Out MCLK MCLK/2 MCLK/ Serial terfaces Cotrol Fast Serial Port 1 / C-BUS Fast Serial Port 2 Cotrol ad Routig terface, Test, Coefficiet ad Cotrol Data CLOCKS Versatile Processor terfaces Cotrol ad Programmig dividual Power Rails Acillary Fuctios Versatile Processor terfaces C-BUS ad Fast serial iterfaces provide adaptable cotrol ad data paths to cater for multi-processor (µc or DSP) systems Selectable iterface serial-clock rate: MCLK, MCLK/2, MCLK/ Bi-directioal operatio Hardware iterlock modes Automatic powersave mode Cotrol ad Programmig Tx, Rx ad codec sample rates are idepedetly programmable Versatile clock divisio permits a wide rage of sample rates to suit differet data rates ad system requiremets dividual Power Supply Rails 2.25 to 2.75 volt rage with 3.3 volt tolerat iterface circuits Separate iterface power rail Aalogue ad digital supply separatio Separate isolated power-pis help maitai low oise desig - Aalogue ad digital - Voice codec - terface - Acillary fuctios Separate aalogue ad referece levels (V BAS ) AUX AUX3 10-bit 10-bit 10-bit SRAM AUX2 AUX1 10-bit Acillary Fuctios 10-bit Sample ad Hold MUX AUX1 AUX2 AUX3 AUX AUX5 AUX6 Acillary Fuctios Programmig ad cotrol is via iteral registers from the serial iterface/s Four 10-bit mootoic digital-to-aalogue coverters to assist i exteral cotrol fuctios Additioally, oe output is available to eable sequeced power rampig of the RF output - the ramp profile is programmable A multi-iput multiplexed aalogue-to-digital coverter, with sample ad hold facility for exteral moitorig TXFS TXDAT RXFS RXDAT Fast Serial Port 3 Supply puts VDDRX VDDTX VDDO VDDAUX VDDVC VDDD VDDD BAS1 BAS2 VSSD VSSD VSSD VSSVC VSSAUX VSSTX VSSRX 7

8 Recet Two-Way Radio C Products From CML CMX69 Adaptive Delta Modulatio (ADM) Codec CMX838 FRS/PMR6/GMRS Family Radio Processor CMX823 Multi-Stadard Aalogue Pagig-Toe Decoder CMX881 Basebad Processor for PMR ad Truked Radios CMX882 Basebad Processor with Data for Leisure Radios CMX883 Basebad Processor for Leisure Radios CML s full rage of products for Two-Way Radio, Wirelie Telecom ad Wireless Data eviromets ca be viewed o Member Compaies CML Microcircuits (UK)Ltd COMMUNCATON SEMCONDUCTORS Oval Park, Lagford, MALDON, Essex CM9 6WG, Eglad Tel: + (0) Fax: + (0) sales@cmlmicro.com EV9810 Evaluatio Kit for the CMX981 The EV9810 evaluatio kit is iteded to allow ivestigatio, demostratio ad evaluatio of the CMX981 C. This PCB-based EvKit provides a hardware ad iterface platform for both hardware ad software desigers to develop, test ad iterface prototype equipmets. Aalogue PCB with Low Noise-Floor Desig Buffered Serial terface Ports with Sigal Shiftig Differetial or Sigle-eded Basebad Sigal /O Dual (+ ad -) 8 Volt Supply Requiremet O-board Regulators for All Power Rails Separate 5-Volt Power Rail for Aalogue terfaces Auxiliary ad Coectios Available Microphoe puts ad Speaker/Earpiece Outputs via 3.5mm Moo Jack Sockets Sigal ad Power Test Access Access to All CMX981 Fuctios CMX981 1 Device Supplied -Situ Separate Digital ad Aalogue Groud Plaes User Maual ad Circuit ad EvKit Layout Diagrams Provided CML Help Desk: techsupport@cmlmicro.com CML Microcircuits (USA) c. COMMUNCATON SEMCONDUCTORS formatio Bethaia Statio Road, Wisto-Salem, NC 27105, USA Tel: , Fax: us.sales@cmlmicro.com CML Microcircuits (Sigapore)PteLtd COMMUNCATON SEMCONDUCTORS Sigapore No. 2 Kallag Puddig Road, #09-05/06 Mactech dustrial Buildig, Sigapore Tel: Fax: sg.sales@cmlmicro.com Shaghai No. 218, Tia Mu Road West, Tower 1, Uit 1008, Shaghai Kerry Everbright City, Zhabei, Shaghai , Chia Tel: ad Fax: c.sales@cmlmicro.com.c Packages CMX9811-0º to +85ºC 6-lead VFM Your Local CML Distributor Your Local CML Distributor 200 CML Microcircuits A CML Microsystems Plc Compay