A Batteryless 19µW MICS/ISM- Band Energy Harvesting Body Area Sensor Node SoC

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1 A Batteryless 19µW MICS/ISM- Band Energy Harvesting Body Area Sensor Node SoC Fan Zhang, Yanqing Zhang, Jason Silver, Yousef Shakhsheer, Manohar Nagaraju, Alicia Klinefelter, Jagdish Pandey, James Boley, Eric Carlson, Aatmesh Shrivastava, Brian Otis, Benton Calhoun University of Washington, Seattle, WA University of Virginia, Charlottesville, VA 1

2 Introduction Information Assessment, Treatment Wireless body area sensor nodes (BASN) enable inexpensive continuous monitoring of patients Battery replacement for body-worn devices may not be feasible or desirable

3 Commercial-off-the-shelf (COTS) wireless BASN (top) Digital Logic Memory Memory Microcontroller Watch Crystal (bottom) Radio RF Transceiver Matching network RF crystal Antenna connector Other Components: Amplifiers, ADC, Power, Interface P AVG > 20 mw (continuous transmission) < 2 hours of battery life (33mAh) 3

4 Custom low-power BASN IC Custom IC Battery (33 mah) Rai, ISSCC Morrison, DAC 2010 Digitize & transmit ECG, EMG, neural data No signal processing Battery life: 3 days (100% duty cycle (DC)) 4

5 Output Voltage (V) Opportunity: energy harvesting COLD HEAT FLOW LOAD HOT n p 0.05 On-body measurement of COTS thermoelectric generator (TEG) (4 x 4 cm 2 ) Room Temp C k 5 Ω 10 Ω 50 Ω 100 Ω 1 kω Load Resistance (Ω) Forearm Back of Neck Chest Shoulder Abdomen Lower Thigh Lower Back Upper Calf 5

6 Output Voltage (V) Opportunity: energy harvesting COLD HEAT FLOW LOAD HOT n p 0.05 On-body measurement of COTS thermoelectric generator (TEG) (4 x 4 cm 2 ) Room Temp C ~60µW ~200µW Forearm Back of Neck Chest Shoulder Abdomen Lower Thigh Lower Back Upper Calf k 5 Ω 10 Ω 50 Ω 100 Ω 1 kω Load Resistance (Ω) 6

7 Our proposed solution ECG µcontroller EMG AFE ADC Memory DSP RF EEG Power Mgmt. Boost Converter V BOOST Voltage Regulation Signal Path Power Path TEG RF Kick-Start CONVENTIONAL: Battery No signal processing Transmission at 100% DC PROPOSED: NO battery harvest power Extract information Selective transmission 7

8 ENERGY HARVESTING Functional diagram V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG Boost DPM: Digital Power Management DPM ROM Boot AFE: Analog Front-End Processing AFE SIGNAL PATH RF 8

9 ENERGY HARVESTING Startup and energy harvesting V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG RF-kick Boost DPM ROM Boot AFE Processing RF SIGNAL PATH

10 ENERGY HARVESTING Startup and energy harvesting V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG Boost RF-kick POR DPM ROM Boot AFE Processing RF SIGNAL PATH

11 ENERGY HARVESTING Signal processing path V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG Boost DPM ROM Boot AFE Processing RF SIGNAL PATH 11

12 ENERGY HARVESTING Signal processing path V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG Boost DPM Flexible signal path ROM Boot AFE Processing RF SIGNAL PATH 12

13 ENERGY HARVESTING Power management V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG Boost DPM ROM Boot AFE Processing RF SIGNAL PATH 13

14 ENERGY HARVESTING Power management V BOOST Monitor POWER MANAGEMENT Stoplight Regulate TEG DVS Boost DPM ROM Boot AFE Processing RF SIGNAL PATH 14

15 System block diagram 15

16 Energy harvesting ROM 16

17 Hybrid energy harvesting Rectifier RF: -10 dbm 6 stages Off-chip Boost Converter V BOOST : 1.35V Power Mgmt. TEG V TEG : 30 mv Gate Control Storage Cap 1 N 1 N Off-chip Over-Voltage Clamp Power-On Reset (POR) Capable of thermal, photovoltaic, and/or RF energy harvesting 17

18 Boost converter 1cm Carlson, Strunz, Otis, JSSC 2010 Measured efficiency of 38% for V in =30mV, V out =1.35V Requires minimum voltage (V KILL ) to sustain conversion 18

19 Voltage (V) Measured RF kick-start RF Pulse, -10dBm V BOOST 0.5 Boost Converter turns on V TEG time (s) Wireless RF pulse provides one-time kick-start The node runs indefinitely thereafter 19

20 Boot-up sequence POR 1.2 V 1 V Programmed? No Yes V BOOST POR out 132B ROM (AFib Detection) 1404B RAM (Reprogrammable) Instruction memory (IMEM) POR issues reset at 1.0V Upon boot-up, the chip fetches instructions from the ROM (default) or the RAM If V BOOST < V KILL, RF burst can revive chip to default 20 algorithm in ROM

21 Signal path 21

22 Analog front-end (AFE) 1 of 4 channels Cf Cf In+ Cs Cs AmpIn+ AmpIn- Gm Cfilter Cfilter Gm Gm Cfilter GND Cfilter Gm Out+ Cs Cs VgaIn+ Cf AmpOut+ LNA AmpOut- In- Out- VgaIn- VGA Gm Gm V CM VgaOut Pseudo-resistor Chopper modulator Cf Chopper-stabilized low-noise amp Variable-gain amp 6 programmable gain db 3 µw / channel Vbias2 Vbias1 AmpIn+ Vcs VDD AmpOut+ Vbias3 CMFB AmpIn- GND AmpOut- Vbias5 Vbias4 VgaIn- Vcs VDD Vbias6 VgaIn+ GND VgaOut 22

23 Flexible signal path ECG Data processing Flexible Architecture for Data Processing Generic Path MCU: microcontroller MCU Data transmission Flexible Architecture for Data Transmission Stream EMG AFE Example Custom Path FIR RR+ AFib Processed Data Store and Burst 4kB DMem Data for TX TX EEG Example of Mixed Path Event-Based Burst FIR ENV Detect MCU 4kB DMem If event Data processing: max flexibility (generic path) or max efficiency (biosignal accelerators) Data transmission: supports modes from streaming (100% DC) to rare event detection (~0% DC) 23

24 Measured Energy/Op (pj) Energy efficient accelerators MCU RR+AFib Accel. 30-Tap FIR Accel Delay (µs) 30 Tap FIR Env. Detect R-R Extract Accelerators: Programmable FIR Heart rate (R-R) extraction Atrial Fibrillation (AFib) detection Band energy extraction Direct memory access (DMA) Packetizer Energy Efficiency / Sample MCU Accel MCU Accel MCU Accel 6.3 nj 57.6 pj 3.6 nj 530 fj 12 pj 3 fj 110x 6800x 4000x 24

25 Sampling rate control Duty cycle, data rate control DPM: signal path control Chip program DPM IMEM Power and Channel control V BOOST Digitized V BOOST Power/clock gate, clock rate, and bus control DMA/SRAM Bio-signal Accelerators LNA VGA ADC Packetizer 25

26 MCU vs. DPM IMEM MCU DPM Generic processing (e.g. add, multiple) Control instructions (e.g. power/clock-gate) Execution of instructions toggles automatically between MCU and DPM. Operation DPM Energy MCU Energy NOP 0.7 pj 1.46 pj Control Signals 2.8 pj 2.92 pj Branch Commands 2.9 pj 4.38 pj 26

27 Frequency multiplying TX Pandey, Otis, JSSC 11 Frequency multiplication: synthesis at low frequency, transmission at high frequency Edge-combiner based frequency multiplier ILRO-based edge generator PA integrates the edge combiner 27

28 BFSK data modulation Measured Data Modulation 1 0 C L ΔC FSK Data C L Quartz reference clock is pulled using DC (~200ppm) Δf is multiplied by 9x (~100kHz) 28

29 Power management 29

30 Voltage regulation V BOOST : 1.35V Linear Regulators Switched-Cap Regulator 0.5 V Bandgap F 1 F 1 F 2 Bias Gen F 2 V REF, I REF 0.5V 0.5V 1.0V 1.2V V 1.2V PADS, AFE 1.0V TX LO 0.5V TX PA 0.5V DPM, MEM, ACCEL Variable V in 50mV, enabling DVS. 30

31 Power management scheme V BOOST V REF SEL Channel 1 Channel 2 Channel 3 Channel 4 MUX ADC DPM V BOOST is scaled and digitized DPM compares V BOOST vs. V THR (programmable) DPM chooses reconfigurable modes ( stoplight )

32 Stoplight Closed-loop power management Green Yellow Red Yellow Green V TEG (V) Supply (V) V DD, AFE V Boost VGA Out (V) TX Duty- Cycle Time (s) MODES AFE Process Data Mem. Inst. Mem. Transmit V THR 1.35 V Green Yellow / Red 1.3 V 1.1 V V

33 TX EN ADC in(v) RX Clock RX Data RX Clock RX Data TX Data TX Data Voltage(mV) Voltage (mv) TX DATA RX DATA RX CLK Continuous transmission of ECG Raw-Data Mode: Real ECG Reconstructed ECG time (s) time (s) time (ms) time (s) Time (s) R-R Mode: 1 V ECG signal measured from 655ms a healthy human subject BOOST sample Wireless 0.5 link demonstrated between the custom IC and a 1 1.2ms Time (s) commercial receiver (TI CC1101) 650µs µw from V BOOST 1

34 R-R interval extraction of ECG ADC IN (V) ms V Boost sample TX EN TX DATA µs Header Data CRC Time (s) Every 5s, V BOOST is sampled to check for sufficient energy DPM enables RF crystal oscillator (20ms) and TX (650µs) 19 µw from V BOOST Powered from a 30mV input 34

35 AFib Detect (V) Input ECG Signal (V) AFib detection of ECG AFib begins Chip detects AFib Time (s) When a rare AFib occurs, TX is enabled to transmit the last 8 beats of ECG (in the data memory). 19 µw from V BOOST Powered from a 30mV input 35

36 Estimated Total chip Power (µw) Selective transmission With next-generation TEGs TX (0.14µA) Clock Gen (2µA) AFE (4µA) Digital (4.6µA) Supply Regulation (3µA) Effective Transmit Rate (kbps) TX DC: 0.013% Battery-free with TEGs today Selective TX and ULP circuits enable energy harvesting 36

37 2.5 mm SoC die photo 0.13 µm CMOS 3.3 mm 37

38 Comparison with prior work This Work Kim VLSI'11 Rai ISSCC 09 Verma JSSC 10 Yan JSSC'11 Chen ISSCC'10 Sensors ECG, EMG, Neural, ECG, ECG, Temp, ECG EEG EEG EMG, EEG TIV Pressure Supply 30 mv, Voltage -10 dbm 1.2 V 1 V 1 V 1.2 V 0.4/0.5 V E Harvesting Thermal, RF Solar Supply Reg. AFE 4-ch 3-ch 1-ch 18-ch 4-ch N/A TX datarate 200 kb/s 100 kb/s 1 Mbps (On-body link) TX P DC (100% on) 160 µw 400 µw 2.8 mw TX P OUT dbm -16 dbm -6 dbm TX band 402 / / 433 MHz MHz MHz Clock + Clock Power Power Mgmt. Power gating, gating gating DPM DVS

39 Microprocessor Accelerator Memory Comparison with prior work (cont.) This Work 1.5 pj/inst 200kHz (8b RISC ISA) Prog. FIR, AFIB, DMA, Env. Det., Packetizer 5.5kB ( V) Kim VLSI'11 Rai ISSCC 09 Verma JSSC 10 Yan JSSC'11 4x SIMD, FIR, DMA, Encryption ASIC DSP FIR, Packetizer, Compression Chen ISSCC' pj/inst 73kHz (32b COR- M3) 42kB (1.2V) 20kB (1.2V) 5kB (0.4V) Dig. Power 2.1µW ~12µW N/A 2.1µW 500µW 2.1µW (MCU) Total Power 19µW 31.1µW 500µW 77.1µW 2.4mW 7.7µW Note on Total Power (includes): 8b ADC, DSP (R-R extract), TX at 0.013% DC 12b ADC, DSP (heart beat detection) 8b ADC, TX at 100% DC 12b ADC, DSP (EEG feature extraction) 10b ADC, DSP (data comp, FIR), SRAM, TX at 5% DC Data acquisition, DSP (DFT), SRAM Technology 130nm 180nm 130nm 180nm 180nm 180nm

40 Conclusion 1. First wireless biosignal processing chip powered solely from a TEG with RF kickstart enabling battery-free operation 2. Our chip integrates state-of-the-art MICS/ISM transmitter, AFE, powertrain, and biosignal accelerators 3. These blocks are intelligently controlled to enable programmable datapath and closed-loop power management 40

41 Thank you! 41

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