Software Pipelining for the Pegasus IR

Transcription

1 Softwre Ppelnng for the Pegsus IR Cod Hrtwg Ele Krevt Abstrct Modern processors, especll VLIW processors, often hve the blt to eecute multple nstructons smultneousl. Tkng dvntge of ths cpblt s crucl for hgh performnce softwre pplctons. Softwre ppelnng s technque desgned to ncrese the level of prllelsm n los. We prose new pproch to softwre ppelnng bsed on drect mnpultons of control flow grphs n Pegsus: n ntermedte representton used b the CASH compler. In ths pper, we descrbe the desgn nd mplementton of our softwre ppelnng lgorthm. Addtonll, we provde detled nlss of the metrcs nd heurstcs used b our lgorthm n the contet of smple code emple. Introducton Modern VLIW rchtectures cn schedule multple nstructons t once, but the re constrned b dt nd control dependences tht lmt the portunt for prllel eecuton. True dt dependences occur when n nstructon depends on the result of prevous nstructon. Other dt dependences occur when two ertons wrte to the sme vrble, or n nput vrble to n nstructon s wrtten to b lter nstructon. Control dependences occur when predcted nstructons re condtonll eecuted. Softwre complers use prllelzton technques to work round these dependences nd eplot s much nstructon level prllelsm s possble from gven progrm. Softwre ppelnng s hghl effectve technque to ncrese the level of vlble prllelsm n the bod of lo b restructurng the code to overlp ertons from dfferent tertons. B overlppng tertons, there re more nstructons vlble for schedulng nd better portuntes to schedule nstructons n prllel. Snce the code n lo m be eecuted mn tmes over, even smll mprovement n nstructon level prllelsm cn led to sgnfcnt performnce mprovement. Softwre ppelnng n generl hs been the source of much reserch, nd we cover bref clssfcton nd surve of the most pulr technques n Secton 2. Our pproch dffers from prevous reserch becuse we ppl our lgorthms n the contet of Pegsus: n ntermedte representton used b the CASH compler [4, 5]. The CASH compler trnsltes progrms wrtten n C nto mplementtons of hrdwre components. Pegsus ws desgned to support sptl computton, so ertons n progrm correspond to ctul hrdwre ertons, nd Pegsus grph models both the dt flow nd control flow of progrm. In Pegsus, bsc blocks n the control flow grph re combned nto hperblocks tht represent unts of specultve work. So whle prevous pproches to softwre ppelnng use lo bod of nstructons, our pproch mkes use of hperblocks, ertors, nd representton tht revels dependences n control flow grph. B mplementng ths pproch n Pegsus nd not the generted ssembl code, we bstrct w lower-level resource constrnts tht re hndled n the lter stges of complton. To mplement softwre ppelnng n Pegsus, we prose loclzed nd tertve pproch tht ppelnes ertons one t tme. Our pproch computes erton outputs for future lo tertons n the current terton. Ppelnng n erton conssts of movng tht erton from the hperblock of lo bod nto the hperblock s pre-heder, nd the dt-flow for vlues before nd fter eecutng tht erton re fed nto the lo hperblock. Then ech lo terton uses the vlue of the erton lred computed, ether n the pre-heder or durng prevous terton, nd computes the erton vlue for future terton. Ths pproch s nlogous to preprng temporr vrbles of future tertons to mke the lo bod schedule more effcent. An erton s cnddte to be ppelned f t mtches number of possble ptterns, descrbed full n Secton 4. Pttern mtchng n Pegsus s

2 smple locl decson, snce ptterns depend onl on the tpe of erton nd the source of ts nputs. In our current mplementton, becuse we do not crete n eplogue, ertons must lso be sde-effect free (e.g., lods m be ppelned but not stores). Our pproch lso chooses ertons to ppelne tht re on the most epensve pths from the begnnng to the end of hperblock. Ths heurstc for choosng the net erton to ppelne tends to decouple the more epensve ertons from longer pth dependences, so fter softwre ppelnng more ertons re scheduled n prllel. Whle the potentl beneft of softwre ppelnng s substntl, possble negtve sde effects re ncresed regster pressure nd wsted specultve ertons. The ncrese n regster pressure cn come from computng nstructons from multple tertons t once, nd cn result n regster spllng. Wsted specultve ertons cn occur when etr nstructons re computed to prepre ver tghtl ppelned lo tht hs control flow whch eecutes the lo onl ver few tmes or not t ll. If not hndled correctl, these sde effects cn elmnte the beneft of softwre ppelnng, nd even do more hrm thn good. Snce schedulng wth resource constrnts s well known NP-hrd problem [7], heurstcs re generll used to vod the worst of these stutons, nd feedbck pproch between the dfferent stges of the compler cn provde better hnts s to the most effectve strteges. For emple, less ggressve softwre ppelnng strteg should be mplemented n response to regster spllng. We do not eplctl mplement such feedbck lo, but ths s n re for future work tht s full comptble wth our pproch. 2 Relted Work Mn lgorthms est to perform softwre ppelnng, nd usng clssfcton develed b Alln et l. [3] these lgorthms generll perform ether kernel recognton or modulo schedulng. Percolton schedulng [0] s n ddtonl pproch wth more loclzed decson process tht doesn t ft ectl nto ether of the prevous clssfctons, lthough ts concepts of prmtve trnsformtons re combned wth lo unrollng n Aken s Perfect Ppelnng kernel recognton lgorthm [2]. Kernel recognton technques ssume the schedule for lo tertons s fed nd unroll the lo some n number of tmes, choosng vlue of n tht revels enough nstructons to mprove the nstructon level prllelsm wthout cretng too much code sze epnson. A pttern recognton stge then dentfes repetng kernel from the unrolled lo tht cn be scheduled effcentl. A well known emple of ths technque s Aken nd Ncolu s Perfect Ppelnng [, 2]. Alterntvel, modulo schedulng technques focus on cretng schedule from one terton of lo tht cn be repeted wthout voltng n resource nd precedence constrnts. A mnmum ntton ntervl s clculted for the mnmum number of nstructons requred to seprte repeted tertons of the schedule. If the scheduler fls to fnd schedule wth the mnmum ntton ntervl, t wll ncrement ths ntervl nd terte the sme process. Emples of ths technque nclude Lm s herrchcl reducton method tht hndle condtonl sttements on VLIW mchnes [9] nd Ru s Itertve Modulo Schedulng [3, 5]. Ru lso dscusses how regster pressure nd llocton strteges re ffected b hs pproch, but specfcll vods the problem of wht to do when there re not enough vlble regsters [4]. Percolton schedulng pples mn tomc progrm trnsformtons to prllel eecuton controlflow grph bsed on number of gudnce rules nd heurstcs (ncludng nformton from dtdependenc nlss). The nodes n prllel eecuton grph contn mn ertons, nd ertons re moved between nodes f there re no dependenc constrnts [6, 0,, 2]. At bsc level, Percolton Schedulng m pper smlr to our pproch, however, the trnsformtons of Percolton Schedulng re ctull ver dfferent becuse the chnge the order of ndependent ertons. Snce the Pegsus grph encpsultes both dt-flow nd control-flow nformton, the orderng of seres of ertors n Pegsus hperblock must lws be respected, snce ertons tht pper lter n the orderng depend on the results of erler ertons. The prllel eecuton grph used n Percolton Schedulng does not hve these desrble dependence prertes bult nto the grphcl structure. Also, Percolton Schedulng produces code eplosons b vstng nodes on ever globl control pth between moves, whle our pttern mtchng lgorthm mkes use of loclzed decsons. 2

3 3 Approch mu mu mu mu mu mu const We prose mplementng softwre ppelnng through drect mnpulton of Pegsus grphs. The prmr gol of ths pproch s to reduce dt dependences between ertons n n effort to ncrese the portunt for nstructon level prllelsm. At hgh level, we mplement softwre ppelnng b movng ertons between tertons of lo. For emple, f vlue s loded from memor n lo bod, we cn move tht lod to the prevous lo terton. In ths w, the loded vlue s vlble mmedtel t the begnnng of new tertons nd uses of t re not requred to wt for lod del. Menwhle, the current terton wll eecute the lod tht wll be used b the net terton. Ths effectvel decouples the dependenc between the lod nd ts uses. Ths method lso requres ddng n nstnce of the erton to the lo preheder. The output of ths erton s used n the frst lo terton. It s mportnt to note tht snce the lo preheder wll lws eecute under our mplementton, t s mportnt tht we onl move ertons tht re sde-effect free. Movng ertons between lo tertons requres tht we ddress severl chllenges. Frst, we need n lgorthm tht cn correctl move ertons between tertons of lo. Second, we must choose set of ertons tht we cn ppelne wthout ntroducng ncorrectness. Thrd, we must choose prort for ech nstructon tht cn be ppelned. Lstl, we need heurstc to decde when we hve cheved the tml ppelned grph. In other words, once n erton s successfull moved, we need w to determne f we should move nother. To ppelne specfc Pegsus crcut, we ppl n tertve lgorthm tht moves one erton per terton. The frst step of ths lgorthm s to mrk ll the ertons tht re possble to move. As stted erler, n order for n erton to be cnddte, t must be sde-effect free. Addtonll, n order to smplf the lgorthm, n erton must hve onl constnts nd mus s ts prents n the grph. Once the possble ertons re mrked, we use heurstc to compute the cost of the most epensve pth through ech erton to the end of the lo bod. Then we choose the erton wth the most epensve pth to ppelne. Ths method llows us to reduce the cost of the most epensve pth through lo bod. In other words, t reduces the dt dependences for the lo bod. lod output output output output Fgure : Ptterns recognzed b softwre ppelnng nclude sde-effect free ertons wth nputs tht re mus or constnts. 4 Desgn In ths secton we descrbe the specfc lgorthm we hve desgned to mplement softwre ppelnng n Pegsus s well s show smple emple eecuton of ths lgorthm. 4. The Algorthm We hve desgned n tertve lgorthm. For ech terton of the lgorthm, we mke lst of ertons vlble for ppelnng, choose specfc erton from these, nd move the selected erton. We then evlute whether nother terton should be eecuted. Avlble Opertons The frst step of our lgorthm s to fnd ertons tht re cnddtes to be ppelned. In order to be cnddte, n erton must meet severl requrements. As descrbed lter, the selected erton wll be moved one terton bck. Ths mples tht the erton n queston wll eecute t lest one etr tme. Therefore, the erton chosen must be sde-effect free. Addtonll, our lgorthm requres tht onl ertons t the begnnng of lo cn be moved. Snce Pegsus s grph representton, these requrements re recognzed through pttern mtchng scheme. In order to be elgble, n erton must be ether n rthmetc ertons, lod, or cst. The ertons must hve onl mus or constnts s nputs. Addtonll, lods must hve constnt predcte nput. Fgure shows these ptterns n Pegsus representton. Choosng n erton Once we hve lst of possble ertons to ppelne, we must choose the tml erton to move net. Snce our gol s to decrese dt dependences, we choose n erton bsed on ths nformton. For ech erton tht pred cst 3

4 cn be moved, we clculte the most epensve pth between the erton nd n et. Ths method reduces the length of the most epensve pth nd thus, s lkel to reduce the dependences of the lo bod. Movng n erton Movng n erton s generl process tht follows seres of steps. These steps re shown n Fgure 2. The frst step s to dd the erton to the lo preheder. Ths dded erton s responsble for feedng the frst terton of the lo. We crete new et n the preheder for the output of ths vlue. Ths et s mtched to new mu/et pr n the lo bod. These represent the temporr vrble ntroduced. Net, we lter the uses of the selected erton to tke ther vlue from the temporr vrble ntroduced n Step. Net, the output of the selected erton s modfed to feed the temporr vrble creted. Ths represents performng the erton tht wll be used n future terton. Fnll, we chnge the nputs of the selected erton to the vlue the would hve n the net terton. Ths s done b smpl connectng them drectl before the ets tht feed the orgnl nputs. Ths method descrbes how ertons wth 2 nputs nd one output re moved. It should be noted tht lods re ertons wth 3 nputs nd 2 outputs. These ertons re hndled dentcll, ecept the ntroduce 2 temporr vrbles: one for the output vlue nd one for the output token. How mn ertons to move Once n erton s moved, we need to decde whether to move nother erton or to termnte the softwre ppelnng process. There re mn heurstcs tht cn be ppled here. The mportnt concern s to blnce the beneft of softwre ppelnng wth ts cost. Movng ertons decreses the dependences between ertons n n gven terton of lo bod. Ths llows greter nstructon level prllelsm n the generted schedules. However, ths s not wthout cost. Movng ertons requres the ntroducton of temporr vrbles to crr vlues between los. These temporres wll ncrese regster pressure nd, t n etreme, could ntroduce regster spll. Ths cn eventull result n schedules tht re ctull worse. Therefore, we tr to choose n heurstc tht mmzes the potentl for prllelsm wthout ntroducng regster spll. Our currentl mplemented lgorthm uses two metrcs for ths clculton. Frst, we clculte the length of the most epensve pth through the current lo bod. The most epensve pth s defned s the longest dependenc chn through the lo, where ech lnk of the chn s weghted b the cost of the ertons t s ttched to. When ths most epensve chn flls below certn lmt, we st the ppelnng lgorthm. Second, we keep trck of how mn ertons we hve moved. The more ertons tht re moved, the more temporr vrbles wll be requred to keep trck of these vlues. Therefore, we lmt the mmum number of ertons we move n order to prevent ncresed regster spll. 4.2 Emple Ths emple demonstrtes concrete eecuton of our lgorthm. Consder the followng code: nt = 0; chr [00]; whle ( < 00) { [] = 2 * []; ; } Intutvel, we cn see n ths emple tht the fundmentl ertons re lod, store, multpl, nd 2 ddtons. In ddton, we cn see dependenc chn between n dd, lod, multpl, nd store. Ths mens tht ll these ertons wll be forced to eecute n seres. Ths s more esl seen n the Pegsus grph shown n Fgure 3(). When our lgorthm nlzes ths grph, t wll fnd two ertons tht re vlble to move (these ertons re shded n the grph). In order to choose whch erton to move, we emne the cost of pths the re on. We wll clculte tht the cost of the erton summng nd s 4, whle the cost of the other erton s. Therefore, we wll select the frst ddton to move. We then move ths erton usng the lgorthm descrbed bove. The resultng grph s shown n Fgure 3(b). The lgorthm wll now decde whether to contnue nd move nother erton or to termnte. After observng tht the most costl pth s stll qute long, nd tht onl one erton hs been moved thus fr, the lgorthm wll choose to move nother erton. Ths tme the choce s between the two shded ertons n Fgure 3(b). Clerl the lod s on the longest pth. At ths pont, the lod s moved. Fgure 3(c) shows the resultng grph. At ths pont we 4

5 () Orgnl grph (b) Step (c) Step 2 (d) Step 3 Fgure 2: Steps to move erton 5

6 2 lod lod * lod 2 2 _ 2 _ store * store lod 2 * store 2 _ () Orgnl grph (b) Iterton (c) Iterton 2 Fgure 3: A smple emple from Secton 4.2 to demonstrte the process of movng n rthmetc erton nd lod. cn see tht the lod nd store re no longer dependent on ech other nd cn therefore be scheduled n prllel. In relt, our lgorthm would contnue to ppelne n ths cse, but ths emple ends here. 5 Implementton We hve mplemented our softwre ppelnng lgorthm n the c2dl frmework. Currentl, the softwre ppelnng stge runs before other tmztons nd onl runs once. In other words, lthough other tmztons re terted n lternton, softwre ppelnng wll not be repeted once t completes the frst tme. Ths s not restrcton of our method, but t hs mde t eser to mesure nd nlze our results. We hve mplemented the softwre ppelnng functonlt entrel n the fles sst.cc, procedure.h, procedure.cc, nd c2dl.cc. Our lgorthm s mplemented n ppromtel 000 lnes of C code. To fcltte debuggng nd nspecton of the tmztons, we crete two dot fles. before sp shows the grph mmedtel before softwre ppelnng s performed. fter sp shows the grph mmedtel fter softwre ppelnng s performed. Addtonll, output s prnted to stndrd output reflectng whch ertons re vlble for ppelnng t ech step s well s the estmted pth cost for ech erton nd the erton chosen to move for tht terton. We found tht lthough t s rther dffcult to determne correctness b comprng the frst grph to the lst grph, t s qute smple to verf the correctness of grph b comprng t to grph tht onl dffers b one moved erton. In ths w, the correctness of seres of grphs cn be verfed n sort of pseudo-nductve method. We hve dded n ton to c2dl clled nosp whch wll dsble softwre ppelnng for the gven run. In ths cse, the softwre ppelnng functon s stll clled, but returns before n chnges re mde. 6 Evluton We evluted our softwre ppelnng lgorthm for Pegsus b complng few smll smple progrms to demonstrte the potentl beneft of our pproch. Progrms tht hve dependent lods nd stores re generll prme cnddtes for chevng performnce mprovements v softwre-ppelnng tech- 6

7 7 22 Lo Bod Schedule Cost 4 Lo preheder cost 2 3 Schedule Cost (ccles) 20 9 Cost (ccles) Number of SP Itertons Number of SP Itertons () Lo bod cost (b) Lo preheder cost 2.6 Averge ILP for Lo Bod 22 Mmum pth cost through Pegsus grph Rto of Instructons to Ccles Cost (estmted ccles) Number of SP Itertons Number of SP Itertons (c) Averge ILP (d) Pth cost Fgure 4: Evluton results for repeted softwre ppelnng tertons on movng verge functon Lo Cost Schedule Cost (ccles) Number of SP Itertons Fgure 5: Appromte functon costs for n = 99 tertons of the movng verge functon, clculted fter ech successve ppelnng stge. 7

8 nques. Therefore, we present one such prtculr emple n ths secton: method to clculte movng verge of set of dt ponts. vod movng_vg(nt *) { nt = ; whle ( < l00) { nt t = [-]; nt t2 = []; [] = (tt2)/2; ; } } Fgure 6: Smple code to compute movng verge of 00 element rr. The code for our movng verge functon s shown n Fgure 6. Ths functon verges ech element of n rr wth the prevous element, nd the result s wrtten bck n plce to updte the orgnl vlue wth the verged vlue. In ts unppelned form, the store t lne 7 hs true dt dependenc on the result of the two lods mmedtel before t. Addtonll, there s lo dependenc between ever vlue ecept the frst one n the rr ([]) nd the vlue wrtten just before t n the prevous terton ([-]). The gol of our softwre ppelnng pproch s to mke vlble the rght set of nstructons to schedule between dependences so tht the ctul lo bod cn perform more work n prllel. In order to evlute our pproch we nlze the Pegsus grph nd the fnl ssembl code produced fter ech ncrementl ppelne, where ertons re chosen for ppelnng ccordng to the heurstcs descrbed n Secton 7. Specfcll, we focus on four metrcs.. The cost of the lo bod, s mesured b the number of VLIW nstructons. 2. The cost of the lo pre-heder, s mesured b the number of VLIW nstructons. 3. The verge nstructon-level prllelsm (ILP), s mesured b the verge number of ertons n ever VLIW nstructon of the lo bod 4. The most epensve pth of the lo, dscovered b depth-frst serch strtng t ech mu n hperblock nd endng t the ets. We epect tht good fnl schedule wll hve smller lo bod cost snce the lo bod pttern wll be more effcent. Some of these costs wll be shfted nto the lo pre-heder, but snce the preheder s onl eecuted once, compred to the lo bod whch s eecuted possbl lrge number of tmes, we cn tolerte fr mount of pre-heder code epnson nd stll cheve better performnce. Fgure 4() nd Fgure 4(b) grph the lo bod nd pre-heder costs fter ech erton s ppelned. The dt ppers to hve good mount of vrblt but the smooth bezer trend lnes show pttern of generll ncresng pre-heder costs offset b decresng lo bod costs. Through nspecton we see tht ppelnng ether 3, 5, or ertons leds to reltvel better lo bod performnce thn other schedules. A feedbck pproch wth these metrcs would prefer to st ppelnng fter 3 tertons of our lgorthm, snce t bout the sme effcenc of the lo bod we prefer smller pre-heder costs nd less ppelnng stges to lmt the mount of regster pressure. The verge nstructon-level prllelsm demonstrtes how much work s ctull beng performed n prllel, so hgher levels of prllelsm generll correspond wth more effcent code. Perhps more mportntl, the verge ILP lso revels how much room there s for mprovement, snce there re lmted number of eecuton unts tht cn possbl be scheduled n prllel. It s the job of the scheduler to convert hgher ILP nto n ctul svngs on lo bod nstructons. Fgure 4(c) grphs the verge nstructon-level prllelsm of the lo bod, nd once gn dentfes tertons 3, 5, nd s good stpng ponts. As epected, the postve trend lne supports the noton tht softwre ppelnng tends to mprove the number of ertons scheduled n prllel. The most-epensve pth metrc s used s heurstc n our pproch becuse t cn revel mn glrng dependences between ertons, whch mkes the ertons on the most epensve pth better cnddtes for softwre ppelnng. Ths metrc cn lso be clculted locll durng the softwre ppelnng stge wthout requrng feedbck lo from other stges of the compler. Fgure 4(d) grphs the most epensve pths remnng n the lo hperblock fter ech terton of our ppelnng lgorthm. We cn see sted declne n the most epensve pth lengths whch level off t cost of 6, whch s equvlent to grph wth lod tht s the onl erton between n et nd mu. We clculte the ppromte runtme cost of 8

9 lo functon s follows: Cost(f nc) =Cost(P reheder)n Cost(LoBod) In ths equton, n s equl to the number of tertons of the lo, nd the cost of the pre-heder nd lo bod re the two metrcs mesured erler, correspondng to the number of VLIW nstructons n the fnl ssembl code. In the movng verge emple, the ntl functon cost s 286 VLIW nstructon, clculted for the vlue n = 99. Fgure 6 grphs the resultng cost of the functon fter ever terton of our softwre ppelnng lgorthm. As we dscovered erler through nspecton, 3 tertons eld the best performnce wth n ppromte cost of 796 VLIW nstructons. Ths represents n ppromte mprovement of 8% over the non-ppelned verson, nd demonstrtes the effectveness of feedbck lo between the results of the scheduler nd the ggressveness of the softwre ppelnng stge. The complete Pegsus grphs for the movng verge functons re vlble onlne, showng the stte of the grph before n softwre ppelnng nd fter 3 nd tertons of our lgorthm [8]. Softwre ppelnng cn mke the dt flow of these grphs much more comple to follow, s s pprent n the ctul Pegsus grph output. 7 Dscusson Whle desgnng our softwre ppelnng lgorthm, we hve dscovered severl res for mprovement. These mprovements center round heurstcs used t dfferent stges of the ppelnng process. In ths secton, we dscuss severl of these heurstcs s well s possble mprovements. Here we lso dscuss lmttons of our current mplementton. Optmzton Heurstcs There re two mn heurstcs used n our lgorthm. Snce we use n tertve pproch tht moves one erton per terton, t becomes necessr to prortze nstructons vlble for ppelnng nd determne when further ppelnng wll no longer be helpful. In our current mplementton, we choose whch erton to ppelne b the length of dt pths through the Pegsus crcut. Ths pproch hs worked well n our eperments. It s es to understnd nd smple to mplement. However, t s not wthout flw. It s prmr shortcomng s tht t doesn t tke dvntge of n etr nformton n the sstem. For emple, once we fnsh ppelnng nd strt regster llocton we wll hve spll nformton vlble. Therefore, n mproved pproch mght use ths nformton bout spll to reorder erton prort n future ppelnng ttempts. The second chllenge of our lgorthm s to decde when the tml mount of ppelnng hs been done. Our eperments show tht t certn pont ppelnng wll decrese performnce sgnfcntl. Therefore, our lgorthm needs to fnd the tml pont. The most obvous soluton whch we hve dscussed n Secton 6 s to terte ppelnng, movng more ertons ech tme to fnd trend nd choose the tml ppelne. However, ths pproch s hghl dependnt on the prevousl dscussed heurstcs for choosng erton prort. Snce ertons re currentl lws chosen determnstcll n the sme order, we m mss orderngs tht would mprove the schedule gretl. In both of these cses, s wth most compler tmztons, feedbck pproch s etremel useful. Softwre ppelnng should run nd then llow schedulng. The regster llocton nd schedulng ttempt should feed nformton bck to the ppelnng stge to more ntellgentl select ertons nd the number of tertons n the net ttempt. As schedulng ttempts progress, ths method mght converge bt closer to the tml schedule thn our current pproch. Softwre ppelnng wth no eplogue Trdtonl softwre ppelnng dds both prologue nd n eplogue to lo bodes. In these cses, the prologue s responsble for fllng the ppelne, the lo bod eecutes on full ppelne, nd the eplogue s responsble for emptng the ppelne. However, n our mplementton, we dd onl prologue to los. B cng ertons nto the prologue, we clculte vlues n tertons before the re used. Ths s convenent soluton, but there re two costs tht re worth mentonng. Frst, we cn onl ppelne sde-effect free ertons. Ths s becuse ertons tht re ppelned wll be eecuted for t lest one etr terton of the lo. Ordnrl the eplogue would hve verson of the lo bod tht ddn t contn these ertons n n effort to vod ths phenomenon. Ths lso mples tht ertons such s lods could ccess vlues n unntended memor loctons, when pre-lodng for the net terton durng the lst lo tertons. Therefore, ths erton re- 9

10 qures memor model tht doesn t cuse n ecepton when ths occurs. Second, softwre ppelnng wthout n eplogue s slghtl less effcent. In trdtonl softwre ppelnng, the eplogue would be c of the lo wth ll the ertons n the prologue removed. However, n our pproch, the lst tertons of the lo cn be thought of s repetng the ertons n the prologue. Therefore, compred to softwre ppelnng strteg wth n eplogue, we ncur n ddtonl cost for ech erton tht we dd to the preheder. In prctce, ths hs ver lttle mpct becuse the lo bod tself wll domnte eecuton. We feel tht ths cost s justfed n the smplfcton t llows n the code. Lmttons In our current mplementton, we hve used severl test cses to verf tht our lgorthm ertes correctl. In ech of these cses we hve nlzed the output grphs to see tht the ppelnng erton hs proceeded s we epect. In ll cses, we beleve the grphs to be correct. However, n some cses, the scheduler emts ASM tht doesn t correctl reflect the grph. In these cses we hve seen vrous errors, such s PC corrupton or nvld output. These errors hve prevented us from usng ddtonl dt ponts n Fgure 6, nd s specfcll responsble for the lck of ASM metrc dt ponts t tertons 2, 9, nd 0. In dscussons wth Tm nd Mhm, we hve concluded the problem s most lkel n the scheduler. Unfortuntel, under the tme constrnts of ths semester, we were unble to further nvestgte the scheduler. 8 Concluson We hve prosed nd mplemented softwre ppelng lgorthm to be used drectl on the Pegsus ntermedte representton. Our pproch to softwre ppelnng recognzes most regulr ptterns of ertons s ppelneble v our tertve pttern mtchng lgorthm. We hve lso tested ths lgorthm on vret of test cses nd presented the nlss of one prtculr movng verge emple n ths pper. In our nlss, we showed tht our lgorthm offers n ppromte 8% mprovement over the tmztons tht currentl est n c2dl. We conclude tht softwre ppelnng n Pegsus s vble nd worthwhle tmzton. Whle we hve dentfed severl portuntes for future mprovements n Secton 7, we beleve tht our lgorthm provdes sgnfcnt performnce mprovement wth our current heurstcs. B usng the metrcs evluted n Secton 6, etendng our lgorthm to mplement more etensve feedbck-bsed pproch hs the potentl for even better performnce. 9 Acknowledgements We would lke to thnk Seth Goldsten, Tm Cllhn, nd Mhm Mshr for ll of ther help n develng our tertve softwre ppelnng pproch nd lernng the ntrcces of Pegsus nd the c2dl frmework. References [] A. Aken nd A. Ncolu. Optml lo prllelzton. In Proceedngs of the ACM SIGPLAN88 Conference on Progrmmng Lnguges Desgn nd Implementton, pges , June 988. [2] A. Aken nd A. Ncolu. Perfect ppelnng: A new lo prllelzton technque. In Euren Smposum on Progrmmng, pges , 988. [3] V. H. Alln, R. B. Jones, R. M. Lee, nd S. J. Alln. Softwre ppelnng. ACM Computng Surves, 27(3): , 995. [4] M. Budu nd S. Goldsten. Optmzng memor ccesses for sptl computton, [5] M. Budu nd S. C. Goldsten. Pegsus: An effcent ntermedte representton. Techncl Report CMU-CS-02-07, Crnege Mellon Unverst, School of Computer Scence, Crnege Mellon Unverst, Pttburgh, PA USA, Aprl [6] K. Ebcoglu nd A. Ncolu. A globl resourceconstrned prllelzton technque. In ICS 89: Proceedngs of the 3rd nterntonl conference on Supercomputng, pges 54 63, New York, NY, USA, 989. ACM Press. [7] M. R. Gre nd D. S. Johnson. Computers nd Intrctblt; A Gude to the Theor of NP- Completeness. W. H. Freemn & Co., New York, NY, USA, 990. [8] C. Hrtwg nd E. Krevt. Pegsus grphs for ppelned movng verge emple. http: // 0

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