ACST1635-8FP. Overvoltage protected AC switch. Description. Features. Applications

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1 Overvoltage protected AC switch Description Datasheet production data Features OUT COM TO-220FPAB Enables equipment to meet IEC surge with overvoltage crowbar technology High noise immunity against static dv/dt and IEC burst High junction temperature: T j = 150 C Needs no external over-voltage protection V CL gives headroom before clamping then crowbar action Reduces component count ECOPACK 2 compliant component Complies with UL standards (File ref: E81734) Provides UL certified insulation rated at 2000 V rms G The belongs to the AC power switch range built with A.S.D. technology. This high performance device is designed for home appliances or industrial systems and drives loads up to 16 A. This switch embeds a Triac structure with a high voltage crowbar device to absorb the inductive turn-off energy and withstand line surges such as those described in the IEC (surge immunity test). Figure 1. Functional diagram G OUT COM Applications AC static switching in appliances and industrial control systems Drive of medium power AC loads such as: Coffee making appliances Universal drum motor of washing machine Compressor of fridge or air conditioner Heating and cooking appliances Vacuum cleaners Solid state relays A.S.D. is a registered trademark of STMicroelectronics March 2015 DocID Rev 2 1/13 This is information on a product in full production.

2 Characteristics 1 Characteristics Table 1. Absolute ratings (limiting values) Symbol Parameter Value Unit I T(RMS) On-state rms current (full sine wave) T c = 84 C 16 A I TSM Non repetitive surge peak on-state current T j initial = 25 C, (full cycle sine wave) F = 50 Hz, t p = 20 ms F = 60 Hz, t p = 16.7 ms I 2 t I 2 t for fuse selection t p = 10 ms 130 A 2 s V DRM /V RRM Repetitive peak off-stage voltage, gate open T j = 150 C 800 V di/dt Critical rate of rise on-state current I G = 2 x I GT, t r 100 ns F = 120 Hz 100 A/µs V PP (1) Non repetitive line peak pulse voltage T j = 25 C 2 kv P G(AV) Average gate power dissipation T j = 150 C 0.1 W P GM Peak gate power dissipation (t p = 20 µs) T j = 150 C 10 W I GM Peak gate current (t p = 20 µs) T j = 150 C 1 A T stg Storage temperature range -40 to +150 C T j Operating junction temperature range -40 to +150 C T L Lead temperature for soldering during 10 s 260 C V ins Insulation rms voltage (60 seconds) 2000 V 1. according to test described by standard IEC Table 2. Electrical characteristics Symbol Test conditions Quadrant T j Value Unit I GT V OUT = 12 V, R L = 33 I - II - III 25 C Max. 35 ma I GT V OUT = 12 V, R L = 33 I - II - III 25 C Min ma V GT V OUT = 12 V, R L = 33 I - II - III 25 C Max. 1.0 V V GD V OUT = V DRM, R L = 3.3 k I - II - III 150 C Min. 0.2 V (1) I H I OUT = 500 ma 25 C Max. 30 ma I L I G = 1.2 x I GT I - II - III 25 C Max. 40 ma dv/dt (1) V OUT = 67% V DRM, gate open 125 C Min V/µs dv/dt (1) V OUT = 67% V DRM, gate open 150 C Min. 300 V/µs (di/dt)c (1) (di/dt)c (1) (dv/dt)c 0.1 V/µs Without snubber C Min. 36 A/ms 150 C Min. 12 A/ms 125 C Min. 12 A/ms 150 C Min. 4 A/ms V CL I CL = 0.1 ma, t p = 1 ms 25 C Min. 850 V 1. For both polarities of OUT pin referenced to COM pin A 2/13 DocID Rev 2

3 Characteristics Table 3. Static characteristics Symbol Test conditions Value Unit V (1) TM I OUT = 22.6 A, t p = 500 µs T j = 25 C Max. 1.5 V (1) V T0 Threshold voltage T j = 150 C Max. 0.9 V (1) R d Dynamic resistance T j = 150 C Max. 30 m I DRM I RRM V OUT = V DRM / V RRM 1. For both polarities of OUT pin referenced to COM pin T j = 25 C Table 4. Thermal characteristics 1 µa T j = 125 C Max. 500 µa T j = 150 C 2 ma Symbol Parameter Value Unit R th(j-c) Junction to case (AC) 3.2 C/W R th(j-a) Junction to ambient 60 C/W Figure 2. Maximum power dissipation versus rms on-state current P(W) I T(RMS) (A) Figure 4. On-state rms current versus ambient temperature (free air convection) I T(RMS) (A) Figure 3. On-state rms current versus case temperature I T(RMS) (A) 18 2 T C( C) E+00 Figure 5. Relative variation of thermal impedance versus pulse duration K = [Z th / R th] Z th(j-c) E-01 Z th(j-a) T a( C) t p(s) 1.0E E E E E E E E E+04 DocID Rev 2 3/13 13

4 Characteristics Figure 6. On-state characteristics (maximum values) I TM(A) Tjmax: V to = 0.9 V R = 30 mω d T = 150 C j T j = 25 C V TM(V) Figure 8. Non repetitive surge peak on-state current for a sinusoidal I TSM( A ), I²t (A²s) Figure 7. Surge peak on-state current versus number of cycles I TSM (A) Repetitive T = 84 C c Non repetitive T initial = 25 C j t = 20 ms One cycle Number of cycles Figure 9. Relative variation of gate trigger current and gate trigger voltage versus junction temperature 3.0 I,V [T ]/I,V [T = 25 C] GT GT j GT GT j typical values 2.5 I GT Q3 I GT Q1-Q T initial = 25 C j dl /dt limitation: 100 A / µs I²t I TS M V GT Q1-Q2-Q3 0.5 pulse with width t p<10 ms, and corresponding v alue of I²t t p(ms ) Figure 10. Relative variation of holding current and latching current versus junction temperature I H, I L [T j] / I H, I L[T j = 25 C] T ( C) j typical values I H I L 0.0 T ( C) j Figure 11. Relative variation of critical rate of decrease of main current (di/dt)c versus reapplied (dv/dt)c (di/dt)c[(dv/dt) c]/specified(di/dt) c T j =125 C and 150 C typical values (dv/dt) (V/µs) c /13 DocID Rev 2

5 Characteristics Figure 12. Relative variation of critical rate of decrease of main current versus junction temperature (dl / dt) c [T j] / (dl / dt) c [T j = 150 C] T ( C) j typical values Figure 13. Relative variation of static dv/dt immunity versus junction temperature (typical values) dv / dt [T j] / dv / dt [T j = 150 C] 7 (dv/dt) > C 6 exceeding measurements capabilities V D = V R = 536 V T ( C) j Figure 14. Relative variation of the maximal clamping voltage versus junction temperature (minimum value) 1.15 V [ T /V [ T = 25 C ] CL j C L j Figure 15. Relative variation of Leakage current versus junction temperature Relative leakage current A/B* 1.0E+00 V DRM = V RRM = 800 V E-01 V DRM = V RRM = 600 V E E E-04 V DRM = V RRM = 400 V 0.90 T( C) j E-05 T ( C) j *A = Leakage current (I DRM = I RRM ) at indicated T J and V DRM =V RRM *B = Leakage current (I DRM = I RRM ) at T j = 150 C, V DRM =V RRM = 800 V DocID Rev 2 5/13 13

6 Application information 2 Application information 2.1 Typical application descriptions The device can be used to control medium power load, such as AC motors in home appliances. Thanks to its thermal and turn off commutation performances, the switch is able to drive an inductive load up to 16 A with no turn off additional snubber. It also provides high thermal performances in static and transient modes such as the compressor inrush current or high torque operating conditions of an AC motor. Figure 16. AC induction motor control - typical diagram AC induction motor AC Motor AC Mains C L Phase shift capacitor + protective air inductance ACST Rg ACST Rg Selection of the rotor direction Vcc MCU 6/13 DocID Rev 2

7 Application information Figure 17. Universal drum motor control typical diagram Universal motor Stator Rotor 12V AC Mains Motor direction setting MCU Speed motor regulation ACST Rg Vcc MCU The device is also very effective in controlling resistive loads. Figure 18. Resistive load control - typical diagram Lamp or resistance Variable resistor OUT AC mains Diac G Capacitor COM DocID Rev 2 7/13 13

8 Application information 2.2 AC line transient voltage ruggedness In comparison with standard Triacs, which needs additional protection components against surge voltage, the is self-protected against overvoltage, specified by the new parameter V CL. The switch can safely withstand AC line transient voltages either by clamping the low energy spikes, such as the inductive spikes at switch off, or by switching to the on state (for less than 10 ms) to dissipate higher energy shocks through the load. This safety feature works even with high turn-on current ramp-up. The test circuit of Figure 19 represents the application, and is used to stress the ACST switch according to the IEC standard conditions. With the additional effect of the load which is limiting the current, the ACST switch withstands the voltage spikes up to 2 kv on top of the peak line voltage. The protection is based on an overvoltage crowbar technology. The folds back safely to the on state as shown in Figure 20. The recovers its blocking voltage capability after the surge and the next zero crossing current. Such a non repetitive test can be done at least 10 times on each AC line voltage polarity. Figure 19. Overvoltage ruggedness test circuit for resistive and inductive loads for IEC standards R = 6 Ω, L = 2 µh, V sur ge = 2 kv R g = 62 Ω Surge generator 2kV surge Rgene Filtering unit Model of the load R L AC mains ACST Rg 8/13 DocID Rev 2

9 Application information Figure 20. Typical voltage and current waveforms across the during IEC standard test V peak = V CL 1.2/50 µs voltage surge V 0 Ipeak = 290 A I 8/20 µs current surge di/dt = 150 A/µs 0 DocID Rev 2 9/13 13

10 Package information 3 Package information Epoxy meets UL94, V0 Recommended torque: 0.4 to 0.6 N m In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 3.1 TO-220FPAB package information Figure 21. TO-220FPAB package outline H A B Dia L6 L2 L7 L3 L5 F1 D L4 F2 G1 F E G 10/13 DocID Rev 2

11 Package information Table 5. TO-220FPAB package mechanical data Dimensions Ref. Millimeters Inches (1) Typ. Min. Max. Typ. Min. Max. A B D E F F F G G H L L L L L L Dia Values in inches are converted from mm and rounded to 4 decimal digits. DocID Rev 2 11/13 13

12 Ordering information 4 Ordering information Figure 22. Ordering information scheme ACST FP AC switch Triac topology On-state rms current 16 = 16 A Triggering gate current 35 = 35 ma Voltage 8 = 800 V Package FP = TO-220FPAB Table 6. Ordering information Order code Marking Package Weight Base qty. Packing mode TO-220FPAB 2.0 g 50 Tube 5 Revision history Table 7. Document revision history Date Revision Changes 12-Sep First issue. 26-Mar Update of cover page and Table 1. Format updated to current standard. 12/13 DocID Rev 2

13 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved DocID Rev 2 13/13 13

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ACST310-8B. Overvoltage protected AC switch. Description. Features. Applications. Benefits

ACST310-8B. Overvoltage protected AC switch. Description. Features. Applications. Benefits Overvoltage protected AC switch Datasheet production data Features AC switch with self over voltage protection Microcontroller direct driven (low gate current max. 10 ma) Three quadrants (Q1, Q2 and Q3)