TSEK38 Radio Frequency Transceiver Design: Project work B

Transcription

1 TSEK38 Project Work: Task specification A 1(15) TSEK38 Radio Frequency Transceiver Design: Project work B Course home page: Course responsible: Ted Johansson (ted.johansson@liu.se) LINKÖPING UNIVERSITY

2 2(15) Contents 1 Introduction and transceiver specification Selected architecture and design details Receiver calculations Calculation of the reference noise figure (NF) Linearity requirement on IIP Blocking and linearity requirement on IIP Selectivity requirement Receiver gain, automatic gain control (AGC), and ADC Architecture specification and system line-up analysis Transmitter calculations Estimation of the modulation accuracy by EVM Adjacent and Alternate channel power and linearity Transmitter gain, AGC, and DACs Architecture specification and line-up analysis Receiver performance verification in ADS Transmitter performance verification in ADS Supervision and reporting... 15

3 3(15) 1 Introduction and transceiver specification In this project you will design an RF transceiver (TRx) at the system level of abstraction. The familiarity with RF integrated circuits and especially understanding their specs and physical limitations is indispensable to successfully complete this design. The TRx should operate as 8-PSK system in half duplex mode (TDD). In this case the receiver (Rx) performance is not affected by the companion transmitter (TX). Moreover, different bands are assigned to TX and Rx so that a receiver does not suffer from adjacent/alternate power leakage due to other mobile transmitters in the system. As this TRx is supposed to implement Low-IF/Superheterodyne architecture, you should begin with a good frequency plan. Based on the minimum performance specs defined in Table 1, you will be able to derive the fundamental Rx and TX metrics like gain, noise figure, linearity, selectivity, local oscillator phase noise, adjacent channel rejection, etc. Next, you will distribute these metrics among the Rx and TX stages by using line-up analysis. In some cases you will be able to assign some of them to the TRx blocks directly, like noise figure of a passive filter or LO phase noise. Your design should match mature and low-cost CMOS technology that would typically be used in an industrial project. The detailed block specs should reflect the performances of the Rx/TX blocks reported in references given in Section 4 in the Transmitter Testbench document. Once all the TRx blocks are specified your design should be verified by simulation. For this purpose you should develop adequate models of the Rx and TX and simulate them using ADS software. Should some TRx specs go beyond limits, corrections in your design will be necessary.

4 4(15) Table 1. Transceiver specifications TRx type Modulation Channel BW /Spacing Data rate Transceiver, project B Half duplex (TDD) 8-PSK 1 MHz 600 kb/sec Receiver Transmitter Rx architecture Low-IF Tx architecture Superheterodyne Rx band MHz Tx band MHz Sensitivity -100 dbm, BER 10-3 Max output power 30 dbm Max input signal -20 dbm Min output power 5 dbm Intermodulation IIP dbm Output power switch 5 db 3 &6 MHz offset step Adjacent channel selectivity (*) 18 dbc ACPR Adj -38 dbc, 100 khz Alternate channel selectivity (*) 42 dbc ACPR Alt -48 dbc, 100 khz Blocking (*) MHz EVM (modulation accuracy) Blocking (*) 67 >10 MHz Residual AM 5 % (*) S in = -97 dbm, BER %

5 5(15) 2 Selected architecture and design details When writing the report, since you have probably already decided on the main features of the transceiver architecture, please start the report with an overview + diagram of the transceiver architecture. Also discuss the details of your chosen architecture, IF frequency selection, and other design considerations. The calculations will be easier to follow after the architecture overview.

6 6(15) 3 Receiver calculations In this section, the Rx parameters will be calculated by hand. The Rx calculations (and the corresponding TX calculations in section 4), are to be documented in a report and handed in to the examiner. When the report is OK from the examiner, then continue verifying the calculations using ADS simulations, as described in section 5. The design procedure of the Rx part can be performed as follows. 3.1 Calculation of the reference noise figure (NF) A small reserve should be taken. 3.2 Linearity requirement on IIP 3 Here, the effect of the Rx noise floor and local oscillator (LO) phase noise (PN) should be included. A reasonable PN value of LO should be assumed. Begin the calculation with the SNR budget (how much noise + distortion can be tolerated). 3.3 Blocking and linearity requirement on IIP 2 To estimate this spec the IQ down-conversion mixer should be addressed as it is the main contributor of IM2 distortions in Zero-IF receiver. For this purpose the gain of the Rx stages preceding the down-converter should be specified (at least roughly at this step). The strongest in-band blocker should be considered in terms of PN and LO spurious emission (reciprocal mixing effect). Also a leakage from RF to LO port should be taken into account in this case. A realistic isolation between the RF and LO port of the mixer should be assumed. The blocker can be modeled as a two-tone signal. Observe that the required IIP2 can largely surpass the achievable figures in chip design (< 40 dbm) so IP2 calibration technique should be put in perspective.

7 7(15) 3.4 Selectivity requirement Here, the adjacent/alternate channel effect on the wanted signal (wanted channel) must be verified in terms of the PN and LO spurious emission. Recall that the mechanism is again the reciprocal mixing. 3.5 Receiver gain, automatic gain control (AGC), and ADC Observe that AGC introduced at BB (in I and Q branches) tends to increase the IQ mismatch in the Rx, so a combination of AGC implemented at RF and at BB is an option. For practical reasons it would be a stepwise AGC which provides several levels of gain. Observe that for reduced gain the amplifier linearity improves. Besides, the channel filter rejection helps to limit the ADC dynamic range. Use, however, a low-order filter to simplify the analog front-end design. The ADC dynamic range and the respective ENOB should be chosen according to the channel filter rejection and the blocking profile. Derive the necessary ENOB with some reserve taking into account among others incomplete DC offset cancelation. 3.6 Architecture specification and system line-up analysis After the Rx architecture is specified, including passives between TRx and antenna, the DC offset cancellation mechanism and ADCs, then the Rx gain, NF and IIP3/IIP2 can be distributed among the Rx blocks. Consider IP3/IP2 of the blocks following channel filters with respect to their limited rejection. The DC offset cancellation and IP2 calibration can be embedded into the downconversion mixer resulting in approximately 1 db degradation of its NF and IIP3. Recall that passive mixers have been usually preferred for their low 1/f noise and better IIP3. The line-up analysis can be supported by Exel or Matlab programs to facilitate calculations performed in an iterative way. For simplicity assume the Rx blocks are impedance matched or their individual specs can be measured under the actual loading conditions in the Rx chain. Observe that no unique solution exists in this case. You should avoid extreme performance figures when exploring the design space as they might be difficult to achieve in practice, power-hungry, and also costly. Rather, try to use typical values for gain, NF, IIP3 of the Rx blocks in a given technology. Also the phase noise of the frequency synthesizer (LO) should not be extremely low.

8 8(15) In this project basically we stick to the CMOS technology. Going more into details you should compare with the reported designs what the typical and extreme specs of the building blocks are. Your design should match the performances of the Rx/Tx blocks reported in references given in Section 4 in the Transmitter Testbench document. As a result, minimum performance values of all the Rx blocks should be derived.

9 9(15) 4 Transmitter calculations In this section, the Tx parameters will be calculated by hand. The Tx calculations (and the corresponding Rx calculations in section 3), are to be documented in a report and handed in to the examiner. When the report is OK from the examiner, then continue verifying the calculations using ADS simulations, as described in section 6. The design procedure of the Tx part can be performed as follows. 4.1 Estimation of the modulation accuracy by EVM The contribution of the LO phase noise and IQ imbalance can be calculated directly. Contributions by other factors such as ISI, carrier leakage, nonlinearities, etc. would be limited by the target EVM value. 4.2 Adjacent and Alternate channel power and linearity The transmitter OIP3 and OIP5 will be estimated to meet the ACPR requirements. The minimum compression P1dB can be estimated directly from PTx maximum value, but OIP3 is likely to impose more stringent condition on P1dB, as demonstrated in the lecture notes. 4.3 Transmitter gain, AGC, and DACs The Tx output stages, especially the PA, can be supplied using a higher voltage (to keep current low) and it is more practical to discuss Tx gain in terms of power rather than voltage. To save power of a mobile Tx or to cope with the near-far problem, the base station would command the Tx to reduce its power gain whenever possible. Stepwise gain control can be introduced at RF in the PA and in PA driver rather than at analog BB. In this way a possible extra IQ imbalance degrading the Tx signal can be avoided. Some gain control at BB is an option. The DAC dynamic range (ENOB) and operation frequency should be chosen with respect to the pulse shaping and also the possible gain control). Up-sampling (actually interpolation) is recommended in order to relax the requirements for the reconstruction filter. Discuss how those problems can be solved in your design.

10 10(15) 4.4 Architecture specification and line-up analysis Take advantage of the well-known figures such as passive filter loss or maximum signal levels. Then distribute the gain and IP3 over the Tx blocks.

11 11(15) 5 Receiver performance verification in ADS When the Rx line-up analysis is completed, the Rx performance should be verified. For this purpose you should develop an ADS high-level model of your Rx where performances of all the Rx blocks including LO are well defined. Some blocks can be simplified, specifically the AGC can be replaced by a fixed gain amplifier. A/D conversion can be omitted in this model, too. Next, the Rx model would be exposed to all the tests (for sensitivity, linearity, interference, phase noise effect, etc.) discussed above in Intermodulation and blocking effects should be verified under LO phase noise. As it is cumbersome to model the LO spurious content, instead the PN level can be raised accordingly (typically by 3 db). While IP3 can be verified by two-tone tests, for IP2 the strongest blocker should be used and modeled by closely spaced two-tones. Recall that the available mixer model in ADS needs to be modified to mimic IM2 effects at baseband. Adjacent and Alternate channel selectivity should be verified like blockers (including PN and IM2 distortion). IQ imbalance should also be addressed and its effect on various tests should be measured. That is, the tests should be rerun for typical IQ mismatch values (such as 2-3 deg and db). Note that in practice, the IQ mismatch can be reduced by correction techniques but not completely eliminated. For each test the ADS simulation modes (HB/ENV) and conditions should be chosen appropriately. Observe that in most cases the measurement of the output SNR or SNDR would be sufficient to verify the Rx correctness (recommended). Alternatively, the BER measurement can be used but it is more CPU intensive (Ptolemy simulation is necessary) and the test setup requires compensation of delay between the Rx baseband and the reference test pattern. Should SNR (SNDR) go beyond the limit in some tests, corrections in your design will be necessary until all the tests are passed. The available ADS test benchmarks should facilitate your work. Once the transmitter (Tx) model in Ptolemy is also available, the receiver can be tested with the modulated RF signal using a power attenuator block. While keeping the Tx ideal (so called golden transmitter ), the effect of different Rx imperfections on the received constellation can be observed and measured also by EVM.

12 12(15) To summarize the Rx ADS simulations, what (at least) is required are the following simulations: a. Gain, SNR, NF. b. IIP3 and IIP2 (simulate and calculate). c. Adjacent and alternate channel selectivity (include LO PN, RF-LO mixer isolation). Include errors from Tx leakage for FDD receivers, PN. d. blocking. Finally, connect an ideal Tx output to the Rx input through an attenuator (representing an ideal link) and run baseband to baseband.

13 TSEK38 Project Work: Task specification B (15)

14 TSEK38 Project Work: Task specification A (15) 6 Transmitter performance verification in ADS Once an ADS model is set up, the tests for EVM and ACPR should be run. Some blocks like AGC can be simplified, i.e. replaced by fixed-gain amplifiers. DAC can be excluded from the simulation model. All Tx basic specs, esp. nonlinearities, PN, IQ imbalance should be accounted for. Also the carrier leakage should be verified by simulation and its effect on the constellation should be shown. Under all specified conditions the EVM and ACPR requirements should be met. In ACPR test (with Ptolemy), the power leakage should be integrated over the predefined bandwidth. Recall that no filter after PA can reduce this leakage so it is the power level and PA linearity that decides ACPR. The residual AM can be verified with respect to the PAs PM-AM conversion, as well as due to carrier feedthrough. The effect of IQ imbalance on EVM should also be verified (how much imbalance can be tolerated). Should your Tx fail some tests, appropriate revisions in the analytical model will be necessary and the respective simulations repeated. As it also happens in practical testing the Tx can be connected through an attenuator block to a golden receiver which can be the receiver that you have designed, but ideally with removed imperfections. In this case you can observe and measure the Tx performance at baseband, i.e. at the Rx output. To summarize the Tx ADS simulations, what (at least) is required are the following simulations: a. Gain, output power. b. ACPR, EVM. Include and verify errors from IQ imbalance, LO PN, carrier leakage from RF to LO in the mixer. LINKÖPING UNIVERSITY

15 (15) 7 Supervision and reporting The project is supervised by the technical assistant. Three seminar occasions are available in the course schedule to support your design work. This work should run in two stages: 1. In the first stage, the Rx/Tx system analysis including the line-up analysis should be completed and the detailed results summarized in Report 1 (following Section 3 for the Rx, and Section 4 for the Tx). Please name the report as: TSEK38_2018_Project_B_Report1_nnnnn_Vx.pdf where Vx is your version number (just to be sure of which version it is, if needed to be updated after feedback from the examiner) and where nnnnn is your student-id (unique part of your student address). Reports should present good technical quality, with the used equations and calculations, and submitted in PDF format. Poor-quality reports (e.g. handwritten) will not be accepted. Mail "Report 1" to the examiner at ted.johansson@liu.se. 2. When the first report is approved, you should develop the Rx and Tx model in ADS to verify your TRx design by simulation as indicated in Section 5 for the Rx, and Section 6 for the Tx according to the design specs defined in Table 1. When all the tests are successfully completed the final report (Report 2) should be prepared and mailed to the examiner. To easily follow the calculations and simulations, extend Report 1 with the simulations results and comparison between calculated and simulated data into Report 2. Please name the report as: TSEK38_2018_Project_B_Report2_nnnnn_Vx.pdf