Features. I-PAK FQU Series
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1 250V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for high efficiency switching DC/DC converters. Features -3.1A, -250V, R DS(on) = = -10 V Low gate charge ( typical 10 nc) Low Crss ( typical 10.3 pf) Fast switching 100% avalanche tested Improved dv/dt capability December 2000 QFET TM D S! G! G S D-PAK FQD Series G D S I-PAK FQU Series! D Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter Units S Drain-Source Voltage -250 V I D Drain Current - Continuous (T C = 25 C) -3.1 A - Continuous (T C = 100 C) A I DM Drain Current - Pulsed (Note 1) A S Gate-Source Voltage ± 30 V E AS Single Pulsed Avalanche Energy (Note 2) 280 mj I AR Avalanche Current (Note 1) -3.1 A E AR Repetitive Avalanche Energy (Note 1) 4.5 mj dv/dt Peak Diode Recovery dv/dt (Note 3) -5.5 V/ns P D Power Dissipation (T A = 25 C) * 2.5 W Power Dissipation (T C = 25 C) 45 W - Derate above 25 C 0.36 W/ C T J, T STG Operating and Storage Temperature Range -55 to +150 C T L Maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case C/W R θja Thermal Resistance, Junction-to-Ambient * C/W R θja Thermal Resistance, Junction-to-Ambient C/W * When mounted on the minimum pad size recommended (PCB Mount)
2 Electrical Characteristics T C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = -250 µa V BS Breakdown Voltage Temperature / T J Coefficient I D = -250 µa, Referenced to 25 C V/ C I DSS = -250 V, = 0 V µa Zero Gate Voltage Drain Current = -200 V, T C = 125 C µa I GSSF Gate-Body Leakage Current, Forward = -30 V, = 0 V na I GSSR Gate-Body Leakage Current, Reverse = 30 V, = 0 V na On Characteristics (th) Gate Threshold Voltage =, I D = -250 µa V R DS(on) Static Drain-Source On-Resistance = -10 V, I D = A Ω g FS Forward Transconductance = -40 V, I D = A (Note 4) S Dynamic Characteristics C iss Input Capacitance = -25 V, = 0 V, pf C oss Output Capacitance f = 1.0 MHz pf C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Delay Time ns = -125 V, I D = -4.0 A, t r Turn-On Rise Time R G = 25 Ω ns t d(off) Turn-Off Delay Time ns t f Q g Turn-Off Fall Time Total Gate Charge (Note 4, 5) = -200 V, I D = -4.0 A, ns nc Q gs Gate-Source Charge = -10 V nc Q gd Gate-Drain Charge (Note 4, 5) nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current A I SM Maximum Pulsed Drain-Source Diode Forward Current A V SD Drain-Source Diode Forward Voltage = 0 V, I S = -3.1 A V t rr Reverse Recovery Time = 0 V, I S = -4.0 A, ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) µc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 46.6mH, I AS = -3.1A, = -50V, R G = 25 Ω, Starting T J = 25 C 3. I SD -4.0A, di/dt 300A/µs, BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
3 Typical Characteristics -I D, Drain Current [A] 10 1 Top : V V -8.0 V -7.0 V -6.5 V -6.0 V 10 0 Bottom : -5.5 V μs Pulse Test 2. T C = 25 -I D, Drain Current [A] = -50V μs Pulse Test , Drain-Source Voltage [V] , Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics R DS(on) [Ω], Drain-Source On-Resistance = - 10V = - 20V Note : T J = I D, Drain Current [A] -I DR, Reverse Drain Current [A] = 0V μs Pulse Test V SD, Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd = -50V = -125V Capacitance [pf] C iss C oss C rss 1. = 0 V 2. f = 1 MHz -, Gate-Source Voltage [V] = -200V Note : I D = -4.0 A , Drain-Source Voltage [V] Q G, Total Gate Charge [nc] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
4 Typical Characteristics (Continued) -BS, (Normalized) Drain-Source Breakdown Voltage Note : 1. = 0 V 2. I D = -250 μa R DS(ON), (Normalized) Drain-Source On-Resistance = -10 V 2. I D = -2.0 A T J, Junction Temperature [ o C] T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.5 -I D, Drain Current [A] Operation in This Area is Limited by R DS(on) 1. T C = 25 o C 2. T J = 150 o C 3. Single Pulse DC 10 ms 1 ms , Drain-Source Voltage [V] 100 µs -I D, Drain Current [A] T C, Case Temperature [ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z θ JC (t), Thermal Response 10 0 N otes : Z θ JC (t) = 2.78 /W M ax. 2. D uty F actor, D =t 1 /t T JM - T C = P DM * Z θ JC (t) D= single pulse P DM t 1 t t 1, S quare W ave P ulse D uration [sec] Figure 11. Transient Thermal Response Curve
5 12V 200nF 50KΩ 300nF Gate Charge Test Circuit & Waveform Same Type as DUT -10V Q gs Q g Q gd -3mA DUT Charge Resistive Switching Test Circuit & Waveforms R L t on t off t d(on) t r t d(off) tf R G 10% -10V DUT 90% Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = ---- LI 2 2 AS BS BS - I D t p Time R G I D (t) (t) -10V DUT I AS t p BS
6 Peak Diode Recovery dv/dt Test Circuit & Waveforms + DUT _ I SD L Driver R G Compliment of DUT (N-Channel) dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = Gate Pulse Period 10V I SD ( DUT ) ( DUT ) Body Diode Reverse Current V SD I RM di/dt I FM, Body Diode Forward Current Body Diode Forward Voltage Drop Body Diode Recovery dv/dt
7 Package Dimensions 6.60 ± ±0.30 (0.50) (4.34) (0.50) DPAK 0.70 ± ± ± ± ±0.20 MAX TYP [2.30±0.20] 2.70 ± ± ± ± TYP [2.30±0.20] 6.10 ± ± ± ± ± ±0.20 (5.34) (5.04) (1.50) (2XR0.25) (0.70) MIN ± ± ±0.20 (0.10) (3.05) (0.90) (1.00) 0.76 ±0.10
8 Package Dimensions (Continued) 6.60 ±0.20 IPAK 2.30 ± ±0.20 (0.50) (4.34) (0.50) 0.50 ± ± ± ± ±0.20 MAX ± ± ± ± TYP [2.30±0.20] 2.30TYP [2.30±0.20] 0.50 ±0.10
9 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Bottomless CoolFET CROSSVOLT E 2 CMOS FACT FACT Quiet Series FAST FASTr GTO HiSeC ISOPLANAR MICROWIRE POP PowerTrench QFET QS Quiet Series SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic UHC VCX DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. A, January 2000
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FDP2N50 / FDPF2N50 N-Channel MOSFET 500V,.5A, 0.65Ω Features R DS(on) = 0.55Ω (Typ.)@ V GS = 0V, I D = 6A Low gate charge ( Typ. 22nC) Low Crss ( Typ. pf) Fast switching 00% avalanche tested Improved dv/dt
More informationFeatures GATE SOURCE. Symbol Parameter Ratings Units V DSS Drain to Source Voltage 400 V V GS Gate to Source Voltage ±30 V Drain Current
A, 4V,.55 Ohm, N-Channel SMPS Power MOSFET Applications Switch Mode Power Supplies (SMPS) Uninterruptable Power Supply High Speed Power Switching Features Low Gate Charge Q g results in Simple Drive Requirement
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FDP047N N-Channel PowerTrench MOSFET 0V, 164A, 4.7mΩ Description R DS(on) = 3.9mΩ ( Typ.) @ V GS = V, I D = 75A Fast switching speed Low gate charge High performance trench technology for extremely low
More informationFeatures. TA=25 o C unless otherwise noted. Symbol Parameter Ratings Units. Pulsed 10 Power Dissipation for Single Operation (Note 1a) 2
V N-Channel PowerTrench MOSFET General Description These N Channel Logic Level MOSFET have been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional
More informationFeatures. TA=25 o C unless otherwise noted. (Note 1b) 0.9. (Note 1c) 0.7
April V Integrated P-Channel PowerTrench MOSFET and Schottky Diode General Description The combines the exceptional performance of Fairchild's PowerTrench MOSFET technology with a very low forward voltage
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More informationFeatures. TA=25 o C unless otherwise noted
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More informationFeatures S 1. TA=25 o C unless otherwise noted
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More informationFeatures S 1. T A=25 o C unless otherwise noted. Symbol Parameter Ratings Units. Pulsed 6 Power Dissipation for Single Operation (Note 1a) 0.
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More informationFeatures. Symbol Parameter Q2 Q1 Units
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More informationT C =25 unless otherwise specified
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More informationDescription. - Derate above 25 C 0.39 W/ C T J, T STG Operating and Storage Temperature Range -55 to +150 C
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More informationCharacteristic Value Units
dvanced Power MOSFET SSW/IN60 FETURES valanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating rea Lower Leakage Current : 25 µ (Max.)
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More informationDescription TO-220F. Symbol Parameter FCP11N60F FCPF11N60F Units
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More informationI2-PAK G D S. T C = 25 C unless otherwise noted. Drain-Source Voltage 260 V. Symbol Parameter SLB40N26C/SLI40N26C Units R θjc
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