= 25 o C unless other wise noted Symbol Parameter NDS9945 Units V DSS. Drain-Source Voltage 60 V V GSS. Gate-Source Voltage ±20 V I D
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1 May 998 N9945 Dual N-Channel Enhancement Mode Field Effect Transistor General Description SO-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to provide superior switching performance and minimize on-state resistance. These devices are particularly suited for low voltage applications such as disk drive motor control, battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features 3.5 A, 6 V. R (ON) =. V GS = V, R (ON) =. V GS = 4.5 V. High density cell design for extremely low R (ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. SOT-3 SuperSOT TM -6 SuperSOT TM -8 SO-8 SOT-3 SOIC-6 D D D SO-8 D N 9945 G S G S 8 pin Absolute Maximum Ratings T A = 5 o C unless other wise noted Symbol Parameter N9945 Units V S Drain-Source Voltage 6 V V GSS Gate-Source Voltage ± V I D Drain Current - Continuous (Note a) 3.5 A - Pulsed P D Power Dissipation for Dual Operation W Power Dissipation for Single Operation (Note a).6 (Note b) (Note c).9,t STG Operating and Storage Temperature Range -55 to 5 C THERMAL CHARACTERISTICS R θja Thermal Resistance, Junction-to-Ambient (Note a) 78 C/W R θjc Thermal Resistance, Junction-to-Case (Note ) 4 C/W 998 Fairchild Semiconductor Corporation
2 Electrical Characteristics (T A = 5 O C unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BV S Drain-Source Breakdown Voltage V GS = V, I D = 5 µa 6 V BV S / Breakdown Voltage Temp. Coefficient I D = 5 µa, Referenced to 5 o C 6 mv/ o C I S Zero Gate Voltage Drain Current V = 48 V, V GS = V µa I GSSF Gate - Body Leakage, Forward V GS = V, V = V na I GSSR Gate - Body Leakage, Reverse V GS = - V, V = V - na ON CHARACTERISTICS (Note ) V GS(th) Gate Threshold Voltage V = V GS, I D = 5 µa.7 3 V =5 C.7. R (ON) Static Drain-Source On-Resistance V GS = V, I D = 3.5 A.76. Ω =5 C.4.8 V GS = 4.5 V, I D =.5 A.3. =5 C.66.3 I D(ON) On-State Drain Current V GS = V, V = V A g FS Forward Transconductance V = V, I D = 3.5 A 5.3 S DYNAMIC CH ARACTERISTICS C iss Input Capacitance V = 5 V, V GS = V, 345 pf C oss Output Capacitance f =. MHz pf C rss Reverse Transfer Capacitance 5 pf SWITCHING CHARACTERISTICS (Note ) t D(on) Turn - On Delay Time V = 3 V, I D = A 5 5 ns t r Turn - On Rise Time V GS = V, R GEN = 6 Ω t D(off) Turn - Off Delay Time 5 t f Turn - Off Fall Time 7 4 Q g Total Gate Charge V = 3 V, I D = 3.5 A,.9 3 nc Q gs Gate-Source Charge V GS = V.7 Q gd Gate-Drain Charge 3. DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS I S Maximum Continuous Drain-Source Diode Forward Current.3 A V SD Drain-Source Diode Forward Voltage V GS = V, I S =.3 A (Note ).8. V t rr Reverse Recovery Time V GS = V, I F =.3 A, 4 ns I rr Reverse Recovery Current di F /dt = A/µs.5 A Notes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. a. 78 O C/W on a.5 in pad of oz copper. b. 5 O C/W on a. in pad of oz copper. c. 35 O C/W on a.3 in pad of oz copper. Scale : on letter size paper. Pulse Test: Pulse Width < 3µs, Duty Cycle <.%.
3 S D Typical Electrical Characteristics I, DRAIN-SOURCE CURRENT (A) D 5 5 V GS = V 6.V 5.V 4.5V 4.V 3.5V 3.V R (ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V = 3.V GS 3.5 V 4. V 4.5 V 5.V 6.V V V, DRAIN-SOURCE VOLTAGE (V) I D, DRAIN CURRENT (A) Figure. On-Region Characteristics. Figure. On-Resistance Variation with Drain Current and Gate Voltage. R (ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D= 3.5A V GS = V T, JUNCTION TEMPERATURE ( C) J R (ON), ON-RESISTANCE (OHM) T =5 C A T =5 C A V, GATE TO SOURCE VOLTAGE (V) GS I = A D Figure 3. On-Resistance Variation With Temperature. Figure 4. On Resistance Variation with Gate-to-Source Voltage. I, DRAIN CURRENT (A) V = 5V T = -55 C J 5 C 5 C V GS, GATE TO SOURCE VOLTAGE (V) I, REVERSE DRAIN CURRENT (A) V GS= V T = 5 C J 5 C -55 C V, BODY DIODE FORWARD VOLTAGE (V) SD Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
4 Typical Electrical Characteristics (continued) V GS, GATE-SOURCE VOLTAGE (V) I = 3.5A D V = V Q g, GATE CHARGE (nc) 4V 3V CAPACITANCE (pf) 4 5 f = MHz V GS = V C iss C oss C rss V, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. I, DRAIN CURRENT (A) D R(ON) LIMIT V GS =V SINGLE PULSE R θja = 35 C/W A T A = 5 C s s DC ms ms V, DRAIN-SOURCE VOLTAGE (V) ms us POWER (W) SINGLE PULSE TIME (SEC) SINGLE PULSE R θja=35 C/W T A = 5 C Figure 9. Maximum Safe Operating Area. Figure. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = Single Pulse t, TIME (sec) P(pk) R θja (t) = r(t) * R R =35 C/W θja θja t t - T = P * R (t) A θja Duty Cycle, D = t /t Figure. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note c. Transient thermal response will change depending on the circuit board design.
5 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. DISCLAIMER ACEx Bottomless CoolFET CROSSVOLT E CMOS TM FACT FACT Quiet Series FAST FASTr GTO HiSeC ISOPLANAR MICROWIRE POP PowerTrench QFET QS Quiet Series SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic UHC VCX FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. E
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500V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar, DMOS technology. This advanced technology has
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