SEMATECH Defect Printability Studies

Transcription

1 Accelerating the next technology revolution SEMATECH Defect Printability Studies Il Yong Jang 1, Jenah Harris-Jones 1, Ranganath Teki 1, Vibhu Jindal 1, Frank Goodwin 1 Masaki Satake 2, Ying Li 2, Danping Peng 2 Sungmin Huh 3, Seong-Sue Kim 3 1 SEMATECH 2 Luminescent Technologies 3 Samsung Electrinics Copyright 2012 SEMATECH, Inc. SEMATECH, and the SEMATECH logo are registered servicemarks of SEMATECH, Inc. International SEMATECH Manufacturing Initiative, ISMI, Advanced Materials Research Center and AMRC are servicemarks of SEMATECH, Inc. All other servicemarks and trademarks are the property of their respective owners.

2 Outline Introduction Experimental procedure and conditions Experimental results Multilayer Geometry CD error comparison Summary 2

3 Major show stopper Ref.) International EUVL Symposium Program Steering Committee Since last 5 years, mask yield and defect inspection infra. has been the major show stopper. Defect levels of EUV mask blanks require further improvement 3

4 Recent report 22nm HP node is likely to be the real gateway for EUVL. Defects of 23nm SEVD start to be printed at the 22nm HP node, however it is not easy to predict the real printability just with SEVD. It is very important to know the printability of native defects having various dimension to understand phase defect printability. Simulation work is very important for studying the defect printability. SEMATECH had begun to study the printability of native defect using simulation and actinic exposure. 4

5 Experimental procedure 1 Substrate Insp.& marking 2 AFM analysis *Images courtesy of ML deposition 4 AFM analysis 5 Absorber deposition 6Absorber patterning 7 Wafer Exposure 8 Analysis 5

6 Absorber deposition at SEMATECH Absorber deposition with SEMATECH s IBD chamber Optical properties (n=0.9472, k=0.0304, measured@ CXRO, LBNL) Thickness : 59nm (3nm ARC + 56nm TaN) Roughness, stress, chemical durability and defectivity of the absorber film need to be verified as well. n&k value@13.5nm TEM image 6

7 Absorber patterning Absorber patterning at Samsung mask Shop Patterning with high-end EBW tool and EUV mask etcher Modified etch chemistry due to 1.5 times slower ER than commercial absorber Acquired excellent pattern quality and critical dimension SEM AFM 88degs 2.8nm LWR MTT:1.9nm 88nm 108nm 128nm 7

8 Simulation Exposure Absorber ML geometry Simulation CD Analysis Smoothed D P S Conventional Ill. NA:0.25, σ:0.8 Position: X=0 Conformal R C W A (CD 1 CD 2 )x100 CD error = CD 1 Reconstructed Defect : 24/30/36/42/48nm on substrate Absorber pattern : 27nm with 88degs of SWA 8

9 ML Geometry ML growth is dependent on the process and configuration of H/W of ML deposition. Defect shape changes the ML geometry No universal ML growth model could give versatility in defect printability simulation It is very important to select the optimum ML geometry to increase simulation accuracy Used the AFM data measured from substrate and surface of ML to make a new ML geometry. 9

10 Smoothed Geometry (for 35nm defect) Smoothed ML Geometry 35nm ML pairs Defect dimension Good for any type of defect? 10

11 Conformal Geometry Conformal ML Geometry 75nm Which model should we use for simulation? Need to find out the optimum ML geometry for each defect 11

12 Normalized Dimension Surface β Substrate α Normalized dimension : Surf. dimension β / Sub. dimension α Measured and got the all normalized dimension from 24nm, 30nm, 36nm, 42nm and 48nm defects 12

13 Fitting ML geometry 13

14 Reconstructed ML geometry Defined each defect s dimension based on the fitting curve. Created Reconstructed ML geometry Compared the CD error simulated by three types of ML geometry. (Conformal vs Smoothed vs Reconstructed ML) 14

15 CD error with defect dimension EUV Mask Geometry Cutline Bump Through Center of Defect Position : X= X Mask Distance (nm) Illumination Defocus NA=0.25, sigma=0.8 Focus = 0nm Simul. image Wafer image 15

16 CD error with defect dimension Pit EUV Mask Geometry Cutline Through Center of Defect Position : X= X Mask Distance (nm) Illumination Defocus NA=0.25, sigma=0.8 Focus = 0nm Simul. image Wafer image 16

17 CD error with defocus EUV Mask Geometry Cutline Bump Through Center of Defect Position : X= X Mask Distance (nm) Illumination Defect dim. NA=0.25, sigma=0.8 24nm Simul. image Wafer image

18 CD error with defocus Pit EUV Mask Geometry Cutline Through Center of Defect Position : X= X Mask Distance (nm) Illumination Defect dim. NA=0.25, sigma=0.8 24nm Simul. image Wafer image

19 DPS performance CD error from DPS, RCWA and wafer are within 2% range DPS S/W developed by Luminescent Technologies shows good simulation accuracy while taking less calculation time than that of RCWA simulation.

20 Summary Analyzed defect dimensions measured on the substrate and the ML surface and found correlation between defect dimension and ML geometry The reconstructed ML geometry predicts the CD error better than conventional conformal ML geometry. 24nm bump and pit defects on substrate occurs 7.6% and 17% of wafer CD error showing that the Teron can detect the most of defects which could be printed on wafer for 27nmHP node L&S pattern. DPS shows good accuracy and faster calculation time than RCWA simulator.

21 Acknowledgements. Dr. Tsukasa Abe and Naoya Hayashi, DNP for discussing mask manufacturing. Dr. Eric Gullikson from LBNL for providing metrology to measure the optical properties of SEMATECH s absorber. Gregg Inderhees from KLA-Tencor for providing blank inspection. Dr. Tae-Geun Kim and Dr. Sang-Hyun Kim from Samsung for supporting the defect analysis for this study.