MOSA. 16-Bits Stereo Audio DAC Low Power Consumption Low Voltage, Excellent PSRR. MS Bits Stereo Audio DAC FEATURES APPLICATIONS DESCRIPTION

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1 Low Power Consumption Low Voltage, Excellent PSRR FEATURES Operation range:.v~.v Excellent Power Supply Rejection Ratio(PSRR) Low operating current Low power consumption mw at V DD =.V (Full scale output ) Low distortion No zero crossing distortion Wide dynamic range(-bit resolution) Voltage Output Fast setting time permits *, *, and * oversampling (serial input) or double speed operation at * oversampling Compatible with most of the Japanese input formats; time multiplexed, two's complement, CMOS and TTL input level, AS for CMOS level, T for TTL level Output voltage swing is proportional to supply voltage (V OPP =V DD /) Cost efficient Space saving package SOP, MSOP APPLICATIONS Multimedia system MP, PDA, Portable Digital Audio. DESCRIPTION The is a -bit voltage-output Digital-to-Analog Converter(DAC). It gives the excellent Power Supply Rejection Ratio(PSRR). It features extremely low power dissipation, small package size and easy application. The accuracy of the weight current sources, combined with the unique symmetrical decoding method, preclude zerocrossing distortion and ensures high quality audio reproduction. These unique features, combined with its exceptional performance, make the ideally suited for use in portable audio equipment. is pin and function compatible with MS. PIN CONFIGURATION Symbol Pin Description Bit clock input Word select input V OR DATA Data input GND Ground V DD Positive supply voltage DATA Cap V OL V OL Left channel output Cap Cap GND V DD V OR Right channel output Pin : Capacitor = F (ripple rejection) REV /

2 BLOCK DIAGRAM I BL R F V OUT LEFT OUTPUT LATCH RIGHT OUTPUT LATCH V REF OP LEFT I BR R F LEFT BIT SWITCHS RIGHT BIT SWITCHS V OUT OP RIGHT V REF -BIT WEIGHT CURRENT DIVIDER -BIT WEIGHT CURRENT DIVIDER I REF I REF I BL REFERENCE CURRENT SOURCE REFERENCE CURRENT SOURCE I BR CAP DATA CONTROL & TIMING LEFT INPUT LATCH RIGHT INPUT LATCH REFERENCE SOURCE V REF uf 0uF GND 0.uF V DD Fig. Block diagram. ORDERING INFORMATION CMOS input level Package Part number Marking Transport Media -Pin SOP (lead free) ASGTR ASG.k Units Tape and Reel -Pin SOP (lead free) ASGU ASG 00 Units Tube -Pin MSOP (lead free) ASMGTR G.k Units Tape and Reel -Pin MSOP (lead free) ASMGU G 0 Units Tube TTL input level Package Part number Marking Transport Media -Pin SOP (lead free) TGTR TG.k Units Tape and Reel -Pin SOP (lead free) TGU TG 00 Units Tube -Pin MSOP (lead free) TMGTR TG.k Units Tape and Reel -Pin MSOP (lead free) TMGU TG 0 Units Tube RoHS Compliance REV /

3 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating Unit VDD Positive Supply Voltage. V V ESD Electrostatic Handling -000 to 000 V T STG Storage Temperature Range - to 0 T A Operating Ambient Temperature Range -0 to T J Maximum Junction Temperature 0 T S Soldering Temperature, 0 seconds 0 R THJA Thermal Resistance from Junction to Ambient in Free Air SOP MSOP 0 /W OPERATING RATINGS Symbol Parameter Min Typ Max Unit V DD Supply Voltage. -. V V ELECTRICAL CHARACTERISTICS (Ta=, V DD =V, f=khz, Cap=uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics V CAP Voltage at Cap... V V DC Output DC level... V V FS Full scale output voltage V FS =0.V DD... Vpp I Q Quiescent current At code 0000H -. - ma I FS Maximum operation current V FS =0.V DD -. - ma PSRR Power supply rejection ratio Cap=uF, f=00hz 9 - db Cap=0uF, f=00hz 0 - db CS Channel separation - db AC Characteristics Res Resolution - - bits THDN Total harmonic distortion plus db noise S/N Signal-to-noise ratio db REV /

4 .V ELECTRICAL CHARACTERISTICS (Ta=, V DD =.V, f=khz, Cap=uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics V CAP Voltage at CAP... V V DC Output DC level... V V FS Full scale output voltage V FS =0.V DD... Vpp I Q Quiescent current At code 0000H -. - ma I FS Maximum operation current V FS =0.V DD -. - ma PSRR Power supply rejection ratio Cap=uF, f=00hz 0 - db Cap=0uF, f=00hz - db CS Channel separation - db AC Characteristics THDN Total harmonic distortion plus db noise S/N Signal-to-noise ratio 9 - db.v ELECTRICAL CHARACTERISTICS (Ta=, V DD =.V, f=khz, Cap=uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics V CAP Voltage at CAP... V V DC Output DC level... V V FS Full scale output voltage V FS =0.V DD... Vpp I Q Quiescent current At code 0000H ma I FS Maximum operation current V FS =0.V DD -. - ma PSRR Power supply rejection ratio Cap=uF, f=00hz 9 - db Cap=0uF, f=00hz 9 - db CS Channel separation - db AC Characteristics THDN Total harmonic distortion plus db noise S/N Signal-to-noise ratio 9 - db REV /

5 TYPICAL PERFORMANCE CHARACTERISTICS (Ta=, f=khz, Cap=uF, sampling rate=fs; unless otherwise specified, ) VDD=.V THDN (%) VDD=.V THDN (%) THDN (%) VDD=V SUPPLY VOLTAGE (V) THDN vs. frequency THDN vs. frequency THDN vs. supply voltage CAP=uF CAP=0uF CAP=uF CAP=0uF CAP=0uF PSRR (db) PSRR (db) CAP=uF CAP=uF CAP=uF PSRR (db) VDD=.V VRR=-0dBV VDD=.V VRR=-0dBV VDD=.V VRR=-0dBV PSRR vs. frequency PSRR vs. frequency PSRR vs. frequency PSRR (db) CAP=0uF VDD=V VRR=-0dBV CAP=uF QUIESCENT CURRENT (ma) CHANNEL SEPARATION (db) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) PSRR vs. frequency Quiescent current vs. supply voltage Channel separation vs. supply voltage REV /

6 TIMING AND DATA FORMAT The accepts input serial data formats of -bit word length. Left and right data words are time multiplexed. The MSB must always be first. The format of data input is shown in Figs. and. With a HIGH level on the word select input (), data is placed in the left input register and with LOW level on the input, data is placed in the right register (Fig. ). The data in the input registers are simultaneously latched in the output registers which control the bit switches. Internal bias currents I BL and I BR are each added to the full scale output current I FS in order to achieve the maximum dynamic range at the outputs of OP and OP(Fig. ). In this way the maximum dynamic range is achieved over the entire power supply range. RIGHT LEFT t r t HB t f t LB t HW t SW t cr t SD t HD DATA LSB MSB Fig. Timing and input signals. LEFT RIGHT DATA MSB LSB MSB LSB Fig. Format of input signals. REV /

7 Data format (,, DATA) Symbol Parameter Conditions Min Typ Max Unit VIL VIH Input LOW CMOS level AS VDD V Input LOW TTL level T V Input HIGH COMS level AS 0.VDD - - V Input HIGH TTL level T - - V l I IL l Input Leakage Current LOW A l I IH l Input Leakage Current HIGH A f Input Clock Frequency - -. MHz BR Bit Rate Data Input - -. Mbits/s f Word Select Input - - khz t r Rise Time - - ns t f Fall Time - - ns t Cr Bit Clock Cycle Time - - ns t HB Bit Clock High Time - - ns t LB Bit Clock Low Time - - ns t SD Data Set-up Time - - ns t HD Data Hold Time to Bit Clock - - ns t HW Word Select Hold Time - - ns t SW Word Select Set-up Time - - ns REV /

8 APPLICATION INFORMATION MP digital to analog converting solution 9k DATA VoR CAP VoL uf uf k k k pf 00uF GND V DD.nF nf MS0 Headphone (Ω) Supply 0Ω 00k V REF 0uF 0.uF 00k uf f -db =.khz DC gain =.0 V DAC out p-p =.V V out p-p =.V For V DD =.V Fig. A third order lowpass filter ( Smoothing filter ) for DAC output. DAC Headphone Driver 0pF Supply 0Ω DATA GND VoR CAP VoL V DD uf.v AV DD 0.uF.V 0.uF 0k PP uf.v PP 0k V RE uf F 0k 0.uF 0uF 0k 0k MS0 k 0pF uf PHONE JACK Headphone (Ω) Fig. A first order lowpass filter for DAC output. REV /

9 EXTERNAL DIMENSIONS H E D Symbol Dimension in mm Dimension in inch Min Max Min Max A A B C D H E e. BSC 0.00 BSC L L A A e B C SOP H E Symbol Dimension in mm Dimension in inch Min Max Min Max A A A B C D H E e L D A A A e B L C MSOP REV 9/

10 TAPE AND REEL (Unit : mm) /-0.0 DIA R MAX MIN 0. Radius Typical.0. SOP / R MAX MIN Typical... MSOP REV 0/

11 Demo board Function description Label : Supply Input Supply voltage range is.v to.v. Label : Headphone Jack Used.mm diameter of headphone with ohm. Label : Digital Signal Input Connected to digital audio format. Label : output output test ports. Circuit R 0K J AVDD AVDD C 0.u C 0u R 0K C 0u C 0p R 0K J INPUT R R R9 K K K U VoR Cap DATA VoL GND VDD MS/ U VoR Cap DATA VoL GND VDD MS/ C u C 0.u C 0.u J Vo R R 0K 0K U OUTA VDD -INA OUTB INA -INB Vss INB MS0 R C0 0K 0p C C9 u u R0 R K K J OUTPUT REV /