TARGET SPECIFICATIONS CGY2191UH/C GHz Low Noise Amplifier FEATURES DESCRIPTION APPLICATIONS

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1 TARGET SPECIFICATIONS GHz Low Noise Amplifier DESCRIPTION The is a high performance GaAs Low Noise Amplifier MMIC designed to operate between 100 and 160 GHz. The has a low noise figure of 4.5 db and 20 db of gain at 140 GHz. The onchip matching provides 7 db of Input Return Loss and 7 db of Output Return Loss. It can be used in Imaging Systems, Telecommunications and Instrumentation applications. The die is manufactured using s Advanced 70 nm gate length very high Indium content MHEMT Technology. The MMIC uses gold bonding pads, backside metallization and is fully protected with Silicon Nitride passivation to obtain the highest level of reliability. The 70 nm MHEMT technology is currently under pre-evaluation for use in Space Flight Equipment. FEATURES Operating Range 100 to 160 GHz Noise Figure : 4.5 db Gain : 20 db Output P1dB : +3 dbm Input Return Loss : > 7 db Output Return Loss : > 7 db Power supply : 42 Vd = 1.4 V Chip size = 1.81 x 1.34 x 0.5 mm Co-planar design Device Available APPLICATIONS Imaging Systems Telecommunications Instrumentation D1 D2 D3 D4 RF In RF Out G1 G2 G3 G4 Block diagram Revision : 10/01/ information@ommic.com

2 MAXIMUM VALUES T amb = + 25 C, at Die backside; unless otherwise speci fied. 2 / 7 Symbol Parameter Conditions MIN. MAX. UNIT VG1, VG2, VG3, VG4 Gate voltage V VD1, VD2, VD3, VD4 Drain voltage V ID1, ID2, ID3 ID4 Drain current 50 ma IG1, IG2, IG3, IG4 Gate Current ma P IN RF Input power + 3 dbm Tamb Ambient temperature C Tj Junction temperature C Tstg Storage temperature C Operation of this device outside the parameter ranges given above may cause permanent damage THERMAL CHARACTERISTICS Symbol Parameter Value UNIT Rth (j - amb) Thermal resistance from junction to ambient (DC power at Tamb max) TBD C/W ELECTRICAL CHARACTERISTICS T amb = + 25 C, V D1, V D2, V D3, V D4 = 1,4V, I D1, I D2, I D3, I D4 = 10.5 ma, unless otherwise specified. Symbol Parameter Conditions MIN. TYP. MAX. UNIT RFin Input frequency GHz Performances on Reference Board at f i = 120 GHz V D1,2,3,4 Drain Supply voltage V I D1,2,3,4 Total supply current V D1,2,3,4 = 1.4 V 42 ma G Gain 20 db NF Noise Figure 4.5 db P1dB 1dB compression point 3 dbm OIP3 Output third order intercept point 12 dbm ISO rev Reverse Isolation RFOUT/RFIN -50 db S 11 Input reflection coefficient 50 Ohms -6 db S 22 Output reflection coefficient 50 Ohms -6 db (*) Measurement reference planes are the INPUT and OUTPUT plans of the MMIC. Caution : This device is a high performance RF component and can be damaged by inappropriate handling. Standard ESD precautions should be followed. document OM- CI-MV/ 001/ PG contains more information on the precautions to take.

3 NOISE FIGURE AND S parameters 3 / 7 Measured noise figure at 25 C, VDD = 1.4V, ID = 55m A APPLICATION SCHEMATIC To prevent instability of the customer design it is highly recommended to place high frequency chip capacitors as near as possible to the die and to connect them with bonding as short as possible. Additionally, a 10nF capacitor can be added on a drain connection to insure low frequency decoupling, the power supply decoupling could be complemented with 1 uf capacitors. Vd1 Vd2 Vd3 Vd4 Chip limits Drain 1 Drain 2 Drain 3 Drain 4 RF In RF Out Gate 1 Gate 2 Gate 3 Gate 4 Vg1 Vg2 Vg3 Vg4 Application schematics Component NAME Value Type Comment 47pF capacitor 47pF Chip PRESIDIO COMPONENTS P/N SA151BX470M2HX5#013B 10nF capacitor 10nF Chip MURATA GM260X7R103M16M100PM520 Tableau 1 Components reference

4 If customer application show acceptable stability margin, resistor and even 10nF capacitor can be omitted. 4 / 7 Note : The design of the device is purely coplanar, the RF and DC ground, should be connected to the top side ground but should be left electrically far from the bottom side of the die. RF PAD DETAIL 50 x 75 um Ground pad 75 um width dicing street 50 x 25 um Signal pad 50 x 75 um Ground pad DIE LAYOUT AND PIN CONFIGURATION

5 5 / 7 PINOUT Symbol Pad Description RFOUT OUT RF output RFIN IN RF input D1 VD1 First stage Drain pin D2 VD2 Second stage Drain pin D3 VD3 Third stage Drain pin D4 VD4 Fourth stage Drain pin G1 VG1 First stage Gate pin G2 VG2 Second stage Gate pin G3 VG3 Third stage Gate pin G4 VG4 Fourth stage Gate pin

6 PACKAGE 6 / 7 Type Description Terminals Pitch (mm) Package size (mm) DIE 100% RF and DC on-wafer tested x 1.34 x 0.5 ORDERING INFORMATION Generic type Package type Version Sort Type Description CGY2191 UH C1 - On-Wafer measured Die SOLDERING To avoid permanent damages or impact on reliability during soldering process, die temperature should never exceed 300 C. Temperature in excess of 300 C should not be applie d to the die longer than 1mn Toxic fumes will be generated at temperatures higher than 400 C.

7 DEFINITIONS 7 / 7 Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. s customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify for any damages resulting from such application. Right to make changes reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.