Lee Kyung-Kuk

Transcription

1 Lee Kyung-Kuk Slide

2 Proposal ZigBee proposes that IEEE 82.5 SG4a address the following application requirements: Robustness against interference improved PHY ranging (possible for upper layers to improve) of:.5 meters accuracy e.g. Residential Automation, Meter Reading, Asset tracking.5 meters accuracy e.g. Building Automation, High value asset tracking Mobility 35-4 mph e.g. Meter Reading, Drop Box UPS, FEDEX, Container tracking 8 mph e.g. Toll Booths Greater range / link margin meters or more outdoor line of sight Latency Less than 7 msec each with 8 users Higher data rate 5 Kbps Mbps Slide 2

3 TG4a Technical Requirements Topology The alt-phy shall support all types of topologies Relaying messages, Coordinating Cells or Aggregated Cells Bit Rate Link bit rate: at least kbps at PHY-SAP. Aggregated bit rate (data collector only): at least Mbps at PHY-SAP Range The maximum distance between communicating nodes is generally to 3 m The range has to be extended to several hundreds of meters Coexistence and Interference Resistance The devices must be able to operate in high noise and high multipath environment. Power Consumption a battery life of months or years without intervention. Quality of service The critical factor is the reliability of the transmission. Form Factor Sensor and RF tag applications. Slide 3

4 TG4a Technical Requirements Complexity Complexity (gate count, die size) and BOM shall be minimized The components are to be considered as throwaway after use Location awareness It can be related to precise (tens of centimeters) localization in some cases limited to about one meter Mobility This is a mandatory feature related to intra-cell mobility, not to roaming or handover. Nodes shall be capable of reliable communication when in the move, at least for tracking. Compliance and or Supplements to functionality It is envisioned that the alt-phy project will allow supplements to Regulatory matters The alt-phy standard will comply with necessary geopolitical or regional regulations. Slide 4

5 Impulse radio: Mitsubishi / MIT / Princeton / Georgia Transceiver architecture Rake Receiver Finger Delay BPSK symbol mapper BPSK symbol mapper Multi plexer Pulse Gen. TH Seq Rake Receiver Finger 2 Rake Receiver Finger Np Summer Central Timing Control < > T d Bandwidth determined by pulse shape Transmitted Reference First pulse serves as template for estimating channel distortions Second pulse carries information Drawback: Waste of 3dB energy on reference pulses Slide 5

6 Impulse Radio: Freescale / decawave Transceiver architecture LNA Receiver S/H To ADC Ant 3n RF Cycles per Chip Encoded TxData Ternary Code { +,, -} Filter Sense x 3n This is as simple as anything else LPF D Q Ck Symbol Rate d r Code Gen Code Clock Chip Clock L code Idealized Chip Rate Clock n = for.5 GHz BW (5.3a) n n = 3 for 5 MHz BW (5.4a) Inverted, Non -Inverted and Zero Filtered (LPF + RF) -Amplitude Wavelets.352 GHz (4 * 3 MHz ) Agile Clock Locks to Chip Rate Spreading code Length Symbol Rate FEC Rate PHY Bit Rate MHz.5.7 Mbps khz kbps khz.5 37 kbps MHz Mbps Slide 6

7 Impulse Radio: STM / CEA-LETI / CWC / AEtherwire Receiver architecture LNA Band Matched BPF r(t) x 2 Controlled Integrator RAZ BPPM Demodulation branch Dump Latch ADC ADC Dump Latch TR Demodulation branch Controlled Integrator Delay BPPM Synch Trigger TR RAZ Synchro Tracking Thresholds setting Integrator DUMP Comparator THRESHOL D Trigger Time base Ranging branch ADC Recyle this branch for Enhanced Mode 2 D Basic Mode Enhanced Mode Enhanced Mode 2 ½PRP Slide 7 ½PRP

8 Impulse Radio: General Atomics Transceiver architecture Transmitter Receiver Analog Shaped UWB pulses ~4 ns long and ~5 MHz BW Scalable data rates from -4 kbps ON/OFF Keying (OOK) modulation Pulse (chip) rate is 2 MHz Digital Slide 8

9 Impulse radio: Hitachi / YRP Transceiver architecture Transmitter PA Pulse Generator Modulation & Spreading Data Antenna BPF ANT. Switch Analog RF Digital PHY MAC I LPF ADC Digital Block LNA Receiver Q /9 PLL 4.GHz LPF Xtal 4ppm ADC 32MHz, 4bits Matched Filter Signal Acquisition Tracking Ranging etc. <kgates Data Slide 9

10 Impulse radio: Staccato Transceiver architecture Transmitter ~ Baseband Processor MAC Integrator ADC SRAM Gain Acquisition Freq Offset Timing X LPF ADC Diff Detection Multipath Combing DS De-Spread LNA/VGA LO Symbol Combining Viterbi Decoding Data X LPF ADC Frequency Correction Non- Coherent Detection Multipath Combining (Across one DS codeword) Spreading codes Slide

11 Impulse radio: Wisair Transmitter architecture Scrambler Convolution Encoder (,/2,/3) Interleaving Differential Encoder Repetition (,,2) Multiply by 3Mcps PN Multiply by 528Mcps hierarchical sequence (6x8+48) Up converter Symbol is based on shaped hierarchical sequences: The coded data (after differential encoding and repetition) is modulated using BPSK BAND_ID Lower frequency Center frequency Upper frequency 368 MHz 3432 MHz 3696 MHz MHz 396 MHz 4224 MHz MHz 4488 MHz 4752 MHz MHz 56 MHz 528 MHz MHz 5544 MHz 588 MHz Band Plan MHz 6336 MHz 672 MHz 66 MHz 6336 MHz 6864 MHz MHz 728 MHz 7392 MHz MHz 7656 MHz 792 MHz 792 MHz 884 MHz 8448 MHz 8448 MHz 872 MHz 8976 MHz MHz 924 MHz 954 MHz MHz 9768 MHz 32 MHz 4 32 MHz 296 MHz 56 MHz Slide

12 Impulse radio: Harris Transceiver architecture f Spectral Shaping within a frequency channel f delay and add notch formation delay may be either a delay line or second impulse generator t t Slide 2

13 Impulse radio: Thales / Cellonics Transceiver architecture TRANSMITTER PG Spreading & Modulation DATA Digital PHY MAC BPF Digital Block RECEIVER LNA Noncoherent detector BB amp -bit ADC Matched Filter Signal Acquisition Tracking Ranging Etc. DATA <kgates Specifications RF Frequency Modulation Spreading Despreading PRF 335±25MHz (db BW) OOK Coded Sequence Kasami (5, 63) and Gold Digital (7) Matched Filter 25MHz, 2.5MHz Slide 3

14 Impulse Radio: Create-Net / BUPT(Beijing) / CUF / CAS Transceiver architecture Impulsive direct-sequence UWB Slide 4

15 Impulse Radio: Tennessee Tech. Univ. Transceiver architecture Transmitter Receiver Raw bit rate: Mbps Spreading code length: 6 chips Pulse repetition frequency (PRF): 6 MHz (pulse repetition interval = 62.5ns) Slide 5

16 Impulse Radio: France Telecom R&D Transceiver architecture PSDU Data Clock F < MHz Control Logic Transmitter BaseBand signal RF Signal Pulse Generator PA (option) Pulse shaper Receiver Bandpass filter x 2 Lowpass filter Threshold pulse-spacing = Tc ± TH Pulse width = ns Slide 6

17 Impulse Radio: Wideband Access Transceiver architecture Information Bits BPSK Mod & Channel Coding Short Code Spreading Differential Encoder Transmitter 4 Mcps BPF A Recovered Bits Integrator (Short Code Despreader) Channel Decoding & Data Detection * T b Differential Detector Receiver ADC Integrator (Long Code Despreader) Modulated Long Code Generator 4 GHz (5 ppm) Radio Channel LNA Modulated Long Code 4 GHz Generator (5 ppm) BPF BW:. GHz ( GHz) Chip Rate: Gcps ADC operation at low rate (rather than chip rate) and Small Size ADC (- 2 bit) Slide 7

18 Impulse Radio: SandLinks Transceiver architecture Transmitter To Antenna Power Amplifier BPF Pulse Generator Barker Sequence generator Channel Select Timing and control Tx data ns Ranging Receiver From Antenna BPF LNA Down Conversion + Baseband I Q Correlator Demodulation + Acquisition LO Decoding Packet handling Hardware May be implemented in Software Slide 8

19 Impulse Radio: California State University Transceiver architecture Transmitter ROM, group ROM, group 2 ROM, group 3 ROM, group 4 Receiver S/P converter DAC DA DA DA C C C Synch Information retriever data manipulator encoding interleaving encryption waveform transformer waveform transformer waveform transformer Waveform transformer input data Pulse generator location amplitude Frequency( GHz.) antenna LNA demodulator detector Data De-manipulator Data out t (ns) 4 Slide 9

20 Impulse Radio: Simon Fraser Univ. / Inha Univ. (ITRC) Transceiver architecture Transmitter M-ary Code Shift Keying/Binary PPM (MCSK/BPPM) Based Impulse Radio Receiver Slide 2

21 Impulse Radio: KERI / UWB Forum / SSU / KWU Transceiver architecture UWB Transmitter Input Bit Sequence Data Repetition OOK Modulation Pulse Generator Calibration Mode Threshold Control Timing Mode Coarse Pulse Position Estimation Operation Mode Receiving Data Gathering Decision Stage Noise Measuring Multipath Combining Output Bit Sequence E nergy Detection ModeSwitch ( Calibration / Timing / Operation ) UWB Receiver Slide 2

22 Impulse Radio: IIR (Singapore) Transceiver architecture Transmitter Binary data From PPDU Bit-to- Symbol Symbolto-Chip Chip Repetition On-Off control Pulse Generator Receiver BPF ( ) 2 LPF / integrator ADC Soft Despread Sample Rate /T c Chip rate # Pulse / Chip Period Pulse Rep. Freq. # Chip / symbol (Code length) Symbol Rate info. bit / sym (Mandatory Mode) Modulation 22 Mcps ** 22 MHz 32 22/32 MHz = khz 4 bit / symbol {+,-} bipolar pulse train OR {,} bipolar pulse train + pulse jittering OR Periodic On-Off Chaotic signaling Slide 22

23 Impulse radio: TimeDomain Transmit Signal Multiple chips make a symbol: Non-inverted pulses are blue, Nulled pulses are orange, Inverted pulses are green. Symbol (6 ns)... Quiet time ( 3ns) Impulse radio Single band nominally from 3 to 5 Ghz. 4 ns chip times 4 chips per symbol 3 ns quiet time between symbols Max symbol integration = 64 (data) Max symbol integration = 256 (acquisition) Slide 23

24 Impulse radio: NICT / Fujitsu / OKI Transceiver architecture Slide 24

25 DBO-CSK: Orthotron / Han-Yang Univ. Transceiver architecture Tx/Rx Sw. RF Analog D/A D/A A/D A/D DBO-CSK MOD Ranging DBO-CSK DEMOD MAC Baseband Digital Data CSK Waveform Binary Data Modulator Scrambler FEC Encoding r=, /2(option) S/P Symbol Mapper Symbol Repetition PRBS GEN. Chirp-Shift-Keying (CSK) Generator z Seed P/S 8-ary DBO-CSK Chirp-Shift-Keying Demodulator (Differential Detection) Baseband Signal A/D Differential Detector (Sub-Chirp) De- Orthogonal Time De- Spread Select Largest De- Map P/S FEC Decoding De- Scrambler Recovered Data Slide 25

26 Chirp Spread-Spectrum: Nanotron Transceiver architecture Digital Digital Block Block LP LP I/Q Modulator I LP LP Q LO f T = f ± MHz Transmitter f = 2.42, or GHz f R = f LO ± MHz I/Q Demodulator LO Receiver I Q f LO = 2.42, or GHz LP LP LP LP ADC ADC ADC ADC Chirp pulse DDDL DDDL 2 Correlation pulse 3 Trigger signal with adaptive threshold 2 Up Down RSSI 3 Digital Block Digital Block 2 ary transmission system duration of µs Slide 26

27 Chaos DCSK: Samsung DM R&D Transceiver architecture Direct Chaos Generator TX Delay T/2 - Diplexer Threshold decision T ( ) dt /2 Integrator RX Delay T/2 User User2 Multi_path Channel User3 Slide 27

28 Chaotic Signal: ETRI / KAIST / HGU Transceiver architecture Data Transmitter Data Encoder Orthogonal Multi-code [ c c c ], 2,, L d = C b Data Modulator Bi-phase PPM Pulse Generator Channel rt () rt () Receiver Pulse Generator Data DeModulator Bi-phase PPM Location Detector Data Decoder Orthogonal Multi-code [ c c c ], 2,, L T b = C d Data [ ] T b = bb 2 b L - Data block ( L bits ) Ex. L= Orthogonal code set ( Code Length : Ns ) Ex. Ns=4 = = = = Multi-coded symbol ( Code rate : L/Ns ) Ex. Code rate = 3/4-3 Modulation PPM : -3 Slide 28

29 Chaotic Signal: SAIT / IRE / SEM Transceiver architecture Modulation: OOK Bandwidth:.5GHz & 2GHz Pulse bin width, Tm: 4ns Pulse emission time, Ts: ns Slide 29

30 FM UWB: CSEM Transceiver architecture Transmitter Receiver FM-UWB uses a high modulation index FM signal Modulated by a low-frequency triangular signal (f SUB ) An analog spread spectrum system Bandwidth: B RF = 2(Df + f SUB ) Slide 3

31 Differentially Bi-Orthogonal Chirp-Shift Shift-Keying (DBO( DBO-CSK) Kyung-Kuk Lee Orthotron Co., Ltd. Slide 3

32 CONTENTS. INTRODUCTION 2. M-ary DBO-CSK TECHNOLOGY 3. GENERAL SOLUTION CRITERIA 3.. Unit Manufacturing Cost/Complexity (UMC) 3.2. General Definitions 3.3. Signal Robustness 3.4. Technical Feasibility 3.5. Scalability 4. MAC PROTOCOL SUPPLEMENT 4.. MAC Enhancements and Modifications 5. PHY LAYER CRITERIA 5.. Channel models and payload data 5.2. Size and Form Factor 5.3. PHY-SAP Payload Bit Rate and Data Throughput 5.4. Simultaneously Operating Piconets 5.5. Signal Acquisition 5.6. System Performance 5.7. Ranging 5.8. Link Budget 5.9. Sensitivity 5.. Power Management Modes 5.. Power Consumption 5.2. Antenna Practicality 6. Conclusion Slide 32

33 . INTRODUCTION Low Power Consumption: - Digital Tx.9mW / 5Kbps Data-rate Signal Robustness: - Orthogonal / Quasi-Orthogonal Signal Set are deployed - Robustness: Applicable in Heavy Multi-path, SOP - Low Correlation of Signal with Existing Air-Interfaces Feasibility: 2.4GHz, 5.2/5.7GHz Band - Many existing commercial RF Solutions Ranging: Based on Chirp Signal (TOA/TDOA) - Precision: less then Eb/No=24dB Size & Form Factor: Smaller than SD-Memory size Low Cost / Low Complexity: Tx +Rx Baseband Digital (58K gates) Advanced Sleep/Wake-up Capability Slide 33

34 2. M-ary DBO-CSK TECHNOLOGY Chirp Signal s () chirp t Linear Chirp: Rectangular Window ω BW schirp ( t) = Re exp[( ωs + tt ) + θ] [ ut ( ) ut ( Tchirp )] 2Tchirp ω t Linear Chirp: Raised-Cosine Window ω BW ω S t ω BW schirp ( t) = Re exp[( ωs + t) t+ θ] prc ( t Tchirp ) 2Tchirp.8 Correlation Property of Chirp Signal Amplitude Slide 34

35 2. M-ary DBO-CSK TECHNOLOGY Chirp vs Impulse Chirp Signal Chirp t Correlation t Impulse Radio Time-Hopping t Correlation t Slide 35

36 2. M-ary DBO-CSK TECHNOLOGY Chirp vs Impulse Similarities Spread-Spectrum: BW >> R b (De-spreading Gain) High Correlation Peak, Narrow Impulse/Cross-correlation width (Pulse-width of Impulse) = (Pulse-width of Cross-Correlation of Same BW Great Resolvability of Multi-path Differences Cross-correlation Property: - Chirp: Inherently very low side-lobe of cross-correlation - Impulse: Need very long code-sequence to realize low side-lobe of cross-correlation Signal Voltage for Signal Power: ex. TX.mW ( P = V 2 /2R, R = 5 ohm ) - Chirp: low peak voltage V (Sinusoid) - Half-Sinusoid Impulse: higher peak voltage ---.V (duty-cycle :) PAPR: - Chirp: PAPR = 3dB (Theoretical Minimum value) easily achievable Eb - Impulse: PAPR = 3dB (ex. Same condition as above) very high PAPR need high-voltage / long pulse sequence for Eb Slide 36

37 2. M-ary DBO-CSK TECHNOLOGY Bi-Orthogonal Modulation Bi-Orthogonal Symbol Mapping Table (M = 8) Decimal (m) Binary (b,b,b2) bits/symbol Bi-Orthogonal Code (,2,3,4) Slide 37

38 3. GENERAL SOLUTION CRITERIA 3.. Unit Manufacturing Cost/Complexity (UMC) Tx Rx BaseBand Digital Scrambler FEC Encoder (r=/2) Symbol Mapper Differential Encoder Chirp-pulse Modulator Framer & Others Differential Detector Symbol Demapper Max Selector FEC Decoder (r=/2) Descrambler Deframer & Others Common Transceiver Estimated Complexity 5Kbps / 25Kbps [gates] K 39k 2 95K 54 K 5K.5K /.6K 49.4K / 45K Data-Rate 25 Kbps 5 Kbps O O O X O O O O O O O O O O O O O O O X O O O O O O 52K 56K Slide 38

39 3. GENERAL SOLUTION CRITERIA 3.2. General Definitions Payload bit rate and throughput - 5Kbps throughput: 293Kbps - 25Kbps throughput: 73.7Kbps Error rate: see sub-section 5.6 Receiver sensitivity: see sub-section 5. Antenna gain: dbi Band in use: - 2.4GHz ISM Band (MHz Overlapping) - 5.2/5.7GHz Band (Non-overlapping) - 2MHz Bandwidth: Consists of 4 sub-chirp signals per Carrier Slide 39

40 3. GENERAL SOLUTION CRITERIA 3.3. Signal Robustness Co-existence / Interference Mitigation Technique - Orthogonal / Quasi-Orthogonal Signal Set - High Spectral Processing Gain: Chirp - Near-Far Problem: FDM Channels Interference Susceptibility - Low Cross-Correlation property with Existing Signal Robustness: - Heavy Multi-path Environment -SOP Low Sensitivity for Component Tolerance - Crystal : ± 4ppm Mobility - Wide-band Chirp: Insensitive for Fading & Doppler Shift - Easily Maintaining Timing Sync. of Received Signal Slide 4

41 3. GENERAL SOLUTION CRITERIA 3.3. Signal Robustness Ingress - High Processing Gain (log(2/.5)=6db) - Addition Processing Gain by DS-Spreading (Optional) - Low Cross-Correlation with Existing Air-Interfaces Egress - Same Spectrum Mask with 2.4GHz, 5.2GHz, 5.7GHz - Tx power control: mw / mw /.mw (use Link Margin to reduce Interference) Slide 4

42 3. GENERAL SOLUTION CRITERIA 3.4. Technical Feasibility Block-diagram of DBO-CSK Transceiver D/A D/A DBO-CSK MOD Tx/Rx Sw. Ranging MAC Data A/D A/D DBO-CSK DEMOD RF Analog A/D, D/A : 3~4 bits Baseband Digital Slide 42

43 3. GENERAL SOLUTION CRITERIA 3.4. Technical Feasibility Manufacturability - Baseband Digital Chip area:.75 /.64 mm 2 (No FEC / FEC) (.8um Technology) Time-to-Market Proto-type DEMO (FPGA) Digital ASIC Regulatory Impact - Availability of Spectrum: 2.4GHz, 5.2/5.7GHz Band Globally Allowed to use (Unlicensed) - Spectrum Availability: 7 FDM CH. (2.4GHz), 8 FDM CH. (5.2GHz), 6 FDM CH. (5.7GHz) - Tx Power:.mW /.mw / mw optional class - Some Sensitive Frequency Band: Skip Tx Power for that Band (some SNR loss) Slide 43

44 3. GENERAL SOLUTION CRITERIA 3.4. Technical Feasibility CSK Signals: 2.4GHz Band (2MHz BW) Waveform Spectrum Fbw = 7. MHz rolloff =.25; Fdiff = 6.3 MHz; Tc = 4.8usec -2 - fc 2 (MHz) Same Spectrum with IEEE82.b fc = 2.42GHz, 2.422GHz, 2.432GHz, 2.442GHz, 2.452GHz, 2.462GHz, 2.472GHz Slide 44

45 3. GENERAL SOLUTION CRITERIA 3.4. Technical Feasibility 8-ary DBO-CSK Modulator Binary Data Modulator FEC Encoding Scrambler r=, /2(option) S/P Symbol Mapper Symbol Repetition PRBS GEN. Seed Differentially Bi-Orthogonal Symbol z P/S Chirp-Shift-Keying (CSK) Generator 8-ary DBO-CSK Chirp-Shift-Keying Slide 45

46 3. GENERAL SOLUTION CRITERIA 3.4. Technical Feasibility 8-ary DBO-CSK Demodulator Demodulator (Differential Detection) Baseband Signal A/D Differential Detector (Sub-Chirp) De- Orthogonal Time De- Spread Select Largest De- Map P/S FEC Decoding De- Scrambler Recovered Data Demodulator (Coherent Detection) Baseband Signal A/D Rake Receiver (Sub-Chirp) De- Orthogonal Time De- Spread Select Largest De- Map Diff. Decode P/S FEC Decoding De- Scrambler Recovered Data Slide 46

47 3. GENERAL SOLUTION CRITERIA 3.5. Scalability Data-Rate: - 2 rates: 5Kbps / 25Kbps RF Tx Power: - 3 classes:.mw /.mw / mw Mobility Value: - Data: Link Margin >= 2.4GHz Band - Chirp is insensitive for Doppler Shift: very small Ranging error and BER degrade Chirp Index: µ = f BW chirp Doppler Shift: f = f v c= µ T f T d c f Ranging Error: d = T c= f v µ = f v T f c f c chirp BW Ex) = 4, = 4.8µ sec, = 2.4 = fbw MHz Tchirp fc GHz d v -4 3 v = 5 Km / h : d = =. 4 [ cm] Slide 47

48 4. MAC PROTOCOL SUPPLEMENT 4.. MAC Enhancements and Modifications Supplement for Scalability - The proposed PHY has scalability for channelization - Scalability which is included in PHY may be added to MAC for 5.4a PHY layer (Data-rate / Tx Power / Ranging) Wake-up Mode for Power Consumption Consideration - Power consumption is of significant concern - Needing supplement to 5.4 MAC to support wake-up mode for low-power consumption Slide 48

49 5. PHY LAYER CRITERIA 5.. Channel models and payload data Channel models and payload data - See sub-section 5.4 in this Document - Payload Data: 32bytes per Packet - Data-rate: 5Kbps / 25Kbps Slide 49

50 5. PHY LAYER CRITERIA 5.2. Size and Form Factor SD Memory (32mm X 24 mm) SD Memory (32mm X 24 mm) Pattern Antenna (24mm X 4mm) 2.4 GHz RF Base band Button Cell Battery Pattern Antenna (2mm X 9mm) RF Base band 5./5.7 GHz Button Cell Battery Ex) Battery Capacity: 3V x 3mAh (324Joule) Dimension: x 2.5 (Dia. x Ht. mm) Slide 5

51 5. PHY LAYER CRITERIA 5.3. PHY-SAP Payload Bit Rate and Data Throughput Payload Bit-rate: Data-rate: 5Kbps / 25Kbps per piconet Aggregated Data-rate: Max. 2Mbps (4 X 5Kbps) per FDM Channel FDM Channels: 7 CH. (2.4GHz), 8 CH. (5.2GHz), 6 CH. (5.7GHz) Data Throughput: Payload bit-rate 5Kbps : Throughput 293 Kbps Payload bit-rate 25Kbps : Throughput 73.7 Kbps Payload: 32byte 5byte DATA Frame ACK Frame DATA Frame T ACK 588 / 4usec 56 / 24usec T LIFT 874 / 474 usec T ACK + T LIFT = 3usec Slide 5

52 5. PHY LAYER CRITERIA 5.3. PHY-SAP Payload Bit Rate and Data Throughput Data Frame: Payload bit-rate : 5Kbps (No FEC) / 25Kbps (FEC r=/2) 5Chirp Chirp 6Chirp Preamble Delimiter 86chirp (5Kbps) or 72chirp(25Kbps) Length + MPDU Rate (8 + )bit (32X8 +2) bit 588 usec (Mbps) or 4 usec (25Kbps) ACK Frame: Payload bit-rate : 5Kbps (No FEC) / 25Kbps (FEC r=/2) 5Chirp Chirp 6Chirp 4chirp (5Kbps) or 28chirp(25Kbps) Preamble Delimiter Length + MPDU Rate (8 + )bit (5X8 +2) bit 56 usec (5Kbps) or 24 usec (25Kbps) Slide 52

53 5. PHY LAYER CRITERIA 5.4. Simultaneously Operating Piconets Multiple piconet ω Freq. - Time Waveform I ω t II ω t III ω t IV t Slide 53

54 5. PHY LAYER CRITERIA 5.4. Simultaneously Operating Piconets Multiple piconet ω.8 Correlation Power (For Preamble Detection) I II ω t ω III ω IV CSK Signal : Quasi-Orthogonal Property Each of CSK Signal consists of 4 sub-chirp signals. Correlation Property between the piconet Does not need Synchronization inter-piconet Slide 54

55 5. PHY LAYER CRITERIA 5.4. Simultaneously Operating Piconets Multiple piconet ω Complex Amplitude (for Data Demod) I ω II ω III ω IV CSK Signal : Quasi-Orthogonal Property Each of CSK Signal consists of 4 sub-chirp signals. Correlation Property between piconet Slide 55

56 5. PHY LAYER CRITERIA 5.4. Simultaneously Operating Piconets Multiple piconet ω Duration of 2 Symbols (2 usec) I ω.3usec 2.usec d d2 t II ω.6usec.8usec d2 d22 t III ω.9usec.5usec d3 d32 t IV 4.8 usec.2usec.2usec d4 d42 t SOP: Assigning Different Time-Gap between the Chirp-Shift-Keying Signal Minimize ISI for CM8 NLOS: Assign the Time-Gap between symbol more then 2nsec Slide 56

57 5. PHY LAYER CRITERIA 5.4. Simultaneously Operating Piconets - System Performance in interf. piconet AWGN CM8 CM CM5 - System performance with two interf. piconet AWGN CM8 CM CM5 PER -2 PER Dint/Dref Dint/Dref PER - -2 System performance with 3 interf. piconet AWGN CM8 CM CM5 Available SOPs 2.4GHz: 4[piconets/FDM Ch.] x 7[FDM Ch.] = 28 SOPs 5.2GHz: 4[piconets/FDM Ch.] x 8[FDM Ch.] = 32 SOPs 5.7GHz: 4[piconets/FDM Ch.] x 6[FDM Ch.] = 24 SOPs Dint/Dref Slide 57

58 5. PHY LAYER CRITERIA 5.5. Signal Acquisition Signal Acquisition A/D Differential Detector (T) Select Largest Symbol De-Mapper Data Differential Detector (T2) Slide 58

59 5. PHY LAYER CRITERIA 5.5. Signal Acquisition Miss Detection Probability In AWGN, at FA=3.2x -5, TxPower=mW - 2 Chirp Symbols 3 Chirp Symbols 4 Chirp Symbols -2 Pm -3 Preamble Detection Distance : meter Slide 59

60 5. PHY LAYER CRITERIA 5.6. System Performance - Data Rate : 5kbps System Performance AWGN CM8 CM CM5 PER Eb/No Slide 6

61 5. PHY LAYER CRITERIA 5.7. Ranging Timing Detection Coarse Timing Detection - Peak of Differential Detection (Averaging over 4 or more Symbols) Fine Timing Detection - Cross-Correlation of Sampled Input Signal - Fine Timing by Interpolation (Fraction of Sampling-Clock Resolution < nsec) - Averaging over 4 or more Symbols - Less than m Ranging Eb/No >= 24dB Arbitrary Sampling Instant Detected Timing Peak Edge Slide 6

62 5. PHY LAYER CRITERIA 5.7. Ranging TDA / TDOA Based Ranging with Chirp Signal Estimation Precision: < Eb/No greater than 24dB 2 Timing-error Variance (Chirp BW: 2MHz) time error deviation (nsec) Eb/No (db) Slide 62

63 5. PHY LAYER CRITERIA 5.8. Link Budget Parameter ISM(2.4GHz) UNII(5.2GHz) UNII(5.7GHz) peak payload bit rate(rb) kbps Average Tx Power(Pt) mw Average Tx Power(Pt) dbm Tx antenna gain(gt) dbi fc' = sqrt(fminfmax) -db GHz Path loss at meter(l=2log(4pifc'/c)) db distance m path loss at d m(l2=2log(d)) db Rx antenna gain(gr) dbi Rx power(pr = Pt+Gt+Gr-L-L2(dB)) dbm Average noise power per bit dbm Rx Noise Figure(Nf) db Average noise power per bit(pn=n+nf) dbm Minimum Eb/No(S) db Implementation Loss(I) db Link Margin 3m db Proposed Min. Rx Sensitivity Level dbm Slide 63

64 5. PHY LAYER CRITERIA 5.9. Sensitivity Bandwidth: 2MHz (2.4GHz Band) Rx Sensitivity level (5kbps) AWGN -94.5dBm CM8-85.5dBm CM CM5-87dBm -86.5dBm Slide 64

65 5. PHY LAYER CRITERIA 5.. Power Management Modes Low-power Mode with Advanced Wake-up The proposed PHY has differentially bi-orthogonal detection and correlatively independent chirp-pulse waveform for multiple piconet => Low-power is achieved by advanced wake-up that the only desired group of nodes are called and the other nodes can estimate wake-up time from sleep state => Reducing Duty-Cycle and Extending Battery-life This is compliant to power consumption considerations of standard, and the mode of operation for advanced wake-up may be added to this standard Slide 65

66 5. PHY LAYER CRITERIA 5.. Power Consumption RF: 4mW for Tx RF Power), 35mW for Rx Baseband (BB) Digital:.9mW for Tx,.3mW for Rx RF part consume lot more power than Baseband Digital - Power Reduction of RF ASIC is Essential (C-MOS) Idea for Operating Power Saving: - Use Max. Data-rate mode: shorter time for Tx Data - Sleeping: Longer Time - Save Power: by reducing active time of RF Further Reduction of Power Consumption - Apply.3um /.9um Technology for ASIC (RF / Baseband) Slide 66

67 5. PHY LAYER CRITERIA 5.. Power Consumption 5Kbps (No FEC) 25Kbps (FEC: r=/2) Logic Die Area Power Logic Die Area Power Tx Power: mw Tx + D/A Rx + A/D Common mm 2.6 mm 2.3 mm 2 3 mw 25 mw mw mm 2.6 mm 2.3 mm 2 3 mw 25 mw mw Sampling-rate: 4MHz Tx Rx Common.5K 49.4K 5K.4 mm 2.63 mm 2.8 mm 2.48 mw.7 mw.42 mw.6k 45K 5K.6 mm 2.5 mm 2.8 mm 2.52 mw 2.8 mw.42 mw Total Tx Rx 56K 4.35 mm 2 4 mw 36. mw 52K 5.24 mm 2 4 mw 37.5 mw Deep Sleep 5 uw 5 uw Target Library :.8 um Technology Power Consumption for Average Throughput Kbps (w/o FEC) - P TX : 4[mW] / 293 = 48 [uw] - P RX : 36.[mW] /293 = 23 [uw] Battery: 324[Joule] for Button Cell (mm D. X 2.5mm H) / 2,[Joules] for AA Alkaline Cell -(P TX + 5 X P RX )/5 = 3[uW] (Assume T TX : T RX = :5 duty-cycle for sensor node) - Battery Life T B = 324/3e-6/36/24 = 28.8 days Continuously (Button Cell) - Battery Life TB = 2/3e-6/36/24/365 = 2.93 years Continuously (AA Alkaline Cell) Slide 67

68 5. PHY LAYER CRITERIA 5.2. Antenna Practicality Antenna Size - less than SD-Memory size: 24mm X 2mm X Frequency / Impulse Response - Almost Flat Freq. Response: Narrow-band Radiation Characteristics - Isotropic: dbi Slide 68

69 6. Conclusion Low Power Consumption: Digital Baseband Tx.9mW, Rx.3mW - Power Consumption is heavily depend on RF-chip. Signal Robustness: - Orthogonal / Quasi-Orthogonal Signal Set - Robustness: Tolerance for Heavy Multi-path / SOP, - Low Correlation with Existing Air-Interfaces Feasibility: 2.4GHz ISM Band - Existing commercial RF Solutions - 2.4GHz / 5GHz band is allowed for unlicensed operation - Low Voltage Operation: Low PAPR Ranging: Based on Chirp Signal (TDA / TDOA) - Precision: less then m (Standard = 24dB Size & Form Factor: Less than SD-Memory size Low Cost / Low Complexity: Tx +Rx Baseband Digital (56K gates) Support Advanced Sleep / Wake-up Capability Orthotron will pursue opportunities for future collaborations and d merging Slide 69