Successful DC Measurements

Transcription

1 Page 1 Successful DC Measurements (C) Franz Sischka, June Outline DC Analyzer Measurement Principle DC Measurement Challenges - Contact Resistance - Device Self-Heating - Device Self-Oscillation Types of DC Measurements 2 1

2 Page 2 DC Analyzers Measurement Framework with Configurable Measurement Plug-Ins (SMUs) Measurement ranges: fa ka, µv... kv, depending on the installed measurement plug-ins (SMU Source Monitor Unit) Force-Sense (Kelvin) measurement capability 3 Typical 4-Quadrant SMU Measurement Ranges Current [A] For Comparison: a Standard Power Supply Current [A] Voltage [V] Voltage [V] 4 2

3 Page 3 Measurement Timing SMU output time 5 The Force-Sense (Kelvin) Measurement Principle: - Cancelling Ohmic Losses - SMU Cables + Current Meter Ohmic Losses Contact Resistance OpAmp 1 - A Force = Requested voltage 10kΩ Sense Device Measurement Instrument slide: 6 3

4 Page 4 The Guarding (Triax Cable) Principle: - Faster Measurement Speed - SMU x 1 OpAmp 2 (Guard) Cables + Current Meter cable capacitance to be charged OpAmp 1 - A Force = Requested voltage 10kΩ Dielectric Losses Sense Device Measurement Instrument slide: Important Note: It is mandatory that the Triax middle shielding (Guard) is always floating (not connected at all to any current sink!!) 7 Triax-BNC(Coax) Adapters Wrong Part!!! DC Analyzer Network Analyzer Guard connected Wrong Part!!! Triax BNC Guard connected Correct Part!!! Guard unconnected 8 4

5 Page 5 DC Measurement Resolution Bad shielding catches power line distortions, which show up in the measurement as a regular shape, much larger than the DC Analyzer's resolution. Due to a good shielding, the resolution specification of the DC Analyzer is achieved. The shape is random. 9 Outline DC Analyzer Measurement Principle DC Measurement Challenges - Contact Resistance - Device Self-Heating - Device Self-Oscillation Types of DC Measurements 10 5

6 Page 6 Evaluating the Contact Resistance 1mA 10mA i1 v Rcable1 Rcable2 = 0V R [mω] Rtotal_meas Rextracted If you cannot apply Force-Sense Needles, you need to measure the overall cable/connector/contact losses. Then, add a subcircuit around your model and define there the total parasitic measurement resistances. This ensures that the simulated DC biasings correspond to the measured ones. 11 Not to forget: always measure accurately the contact resistances of your cables and probes. and document their values with the measurement data, for later use during device modeling! Example of an id-vd measurement data file (.mdm data format): 12 6

7 Page 7 Device Self-Heating Example: on-wafer LDMOS with neg. temp. drift Ifast Plateau OK for pulsed DC Steady State OK for non-pulsed DC Measurement: By courtesy of F.Korndörfer, IHP, Frankfurt/Oder, Germany Slide composed from: G.Riley, 'Accounting for Dynamic Behavior in FET Device Models', Microwave Journal July Device Self-Heating (cont'd) Devices with positive temperature drift DMOS 2N7000 id vds = 10V vgs = 2.9V t=0: 600mW id [LOG] Bipolar NPN 2N3904 ic vce = 5V vbe = 0.73V t=0: 60mW ic [LOG] Note: the same TO92 package for both transistors 14 7

8 Page 8 DC CW Pre-Measurement Recommendation when you are not sure about self-heating, apply the max. DC bias of the standard id-vd measurement continuously, and watch the trace of the Drain/Collector current over time. id-vd measurement with default instrument settings: Delay Time: 0 Hold Time: 0 Integration Time: Short vgs=4.5v vds=10v t=0: 860mW vgs=4.4v vds=10v t=0: 660mW 15 DC Bias Self-Heating and Pulsed Measurements Device Temperature time this pulsing does not prevent from device self-heating time short enough pulse width, but keep also an eye on setting the pulse repetition rate slow enough!! time Notes: apply use the pulsed DC measurements for modeling avalanche and breakdown effect use the CW DC measurements for modeling the self-heating effect (thermal resistance RTH) time 16 8

9 Page 9 Device Self-Oscillation - why it happens- G D G D S S Voltage Sources typically exhibit an inductive output impedance. Together with the bias-dependent capacitances of transistors, conditions for self-oscillation can exist. 17 Examples of Self-Oscillation during DC Output Measurement 18 9

10 Page 10 What to Do Against Self-Oscillation Oscillation may be a problem when using unshielded DC probe needles. Modern, shielded DC probes are less affected. Also, using shorter bias cables may help (avoid using 3m Triax cables). In most cases, oscillations can be avoided when measuring DC curves with high frequency GSG (ground-signal-ground) probes. 19 Outline DC Analyzer Measurement Principle DC Measurement Challenges - Contact Resistance - Device Self-Heating - Device Self-Oscillation Types of DC Measurements 20 10

11 Page 11 Types of Bias Sweeps V Conventinal Sweep V Pulsed Sweeps time time Up-Down Double Sweep V V time time 21 Example of Self-Heating during DC Output Measurement Thermal stead-state Integ: Long Hold: 6sec Delay: 0sec Integ: Long Hold: 0sec Delay: 0sec Integ: Short Hold: 6sec Delay: 0sec id [E-3] Integ: Medium Hold: 6sec Delay: 6sec Shown above are different measurement results for *the same* MOS transistor 2N > depending on the selected measurement speed, we get different results!!! vd 22 11

12 Page 12 Double Sweeps: a smart, quick check if self-heating occurs if self-heating occurs, a hysteresis shows up 23 Applying Pulsed DC Measurements DMOS 2N7000 Mind the different measured current levels, depending on the selected quiescent bias!!! 24 12

13 Page 13 Which Quiescent Bias to Select For Pulsed Measurements? Analog application: transistor large signal excitation around an operating point id [E-3] Rload = 50Ω Cload = 1pF operating point vd [E+0] 25 Which Quiescent Bias to Select For Pulsed Measurements? (cont'd) Switching Transistor Trajectory Rload = 1kΩ trajectory spin vs. time id [E-3] Rload = 1kΩ Lload = 50uH vd [E+0] Note: additionally, to satisfy switch and mixer applications, the measurement should also include negative vd values! 26 13

14 Page 14 Most Important DC Biasings for Transistor Modeling Prof. I.Angelov, Chalmers University, Göteborg: "For good modeling, focus on Low Ids, High Vds - Cover the load line!!!" 27 contact@sisconsult.de

15 Page 15 DC Measurements Challenges Due To Device Self-Heating id-vd of the same transistor, for different Integration Time, Delay and Hold Time (C) Franz Sischka, June Outline Introduction Case 1: Continuous Biasing Case 2: Pulsed Biasing Conclusions

16 Page 16 Introduction Why This Slide Set? - Self-heating is one of the major challenges when making transistor or diode DC characterizations. - It typically happens when more than ~50mW of power is applied (on-wafer measurements). For packaged devices, it can be even less, or also more, depending on the applied heat sink. Why Using A Packaged Device As An Example? Sooner or later, the transistor model (conventionally related to on-wafer measurements), will be used in a packaged chip, with completely different heat sink conditions than on the wafer prober chuck. -3- The Standard id-vd DC Measurement The standard setup for a MOS id-vds curve tracer measurement: A quick, simple DC measurement is only simple and easy if the applied power at your device is below the max. power dissipation of the package or of the chip on the thermo chuck This curve looks OK, but it could be wrong due to self-heating!!! 4 2

17 Page 17 Outline Introduction Case 1: Continuous Biasing Case 2: Pulsed Biasing Conclusions -5- Case 1: Continuous Biasing Conventinal Sweep vg vd time 6 3

18 Page 18 Different Integration Time DC Analyzer Integration Time: Long Medium Short Integ.Time: L-M-S Hold Time: 0 Delay Time: 0 7 Different Number of Sampling Points 201 vd points 41 vd points 11 vd points Integ.Time: S Hold Time: 0 Delay Time: 0 8 4

19 Page 19 cooling down from previous 20V!!! Different vd-max vdmax: 20V 10V Integ.Time: L Hold Time: 0 Delay Time: 0 9 Piece-Wise Combined id-vd Measurement 1: 0V < vd < 3V Measurement 2: 3V < vd < 7V Measurement 3: 7V < vd < 10V Integ.Time: S Hold Time: 0 Delay Time:

20 Page 20 Different Sweep Ramping Directions Both, vds and vgs ramping up and ramping down 10V 20V Integ.Time: S Hold Time: 0 Delay Time: 0 11 Steady-State CW Measurement Custom Instrument Driver ensuring steady-state over-temperature reached at each bias point, before measuring Conventional standard measurement Integ.Time: S Hold Time: 0 Delay Time:

21 Page 21 Outline Introduction Case 1: Continuous Biasing Case 2: Pulsed Biasing Conclusions -13- Case 2: Pulsed Biasing V time 14 7

22 Page 22 Pulsed Biasing Conventional standard CW measurement Integ.Time: S Hold Time: 0 Delay Time: 0 Pulsed measurement Integ.Time: S Hold Time: 0 Delay Time: 0 Pulsed SMU: Drain Pulsed Base: 0V Pulse Width: 1ms Pulse Waiting: 100ms 15 Pulsed Biasings (cont'd) Pulsed measurement Integ.Time: S Hold Time: 0 Delay Time: 0 Pulsed SMU: Drain Pulsed Base: 5V Pulse Width: 1ms Pulse Waiting: 100ms Conventional standard CW measurement Integ.Time: S Hold Time: 0 Delay Time:

23 Page 23 Pulsed Biasings (cont'd) Gate and Drain pulsed from idmax Pulsed measurement Integ.Time: S Hold Time: 0 Delay Time: 0 Pulsed SMUs: Gate & Drain Conventional standard CW measurement Integ.Time: S Hold Time: 0 Delay Time: 0 17 Last not least, the worst case: Thermal Runaway due to a weak heatsink Packaged Transistor: BLF 2073F <0.6 Watt slide: 18 9

24 Page 24 Conclusions after all these horror pictures, what should we do DC Pre-Measurement Recommendation when you are not sure about self-heating, apply continuously the max. DC bias, apply the max. DC bias of the standard id-vd measurement continuously, and watch the trace of the Drain/Collector current over time. id-vd measurement with default instrument settings: Delay Time: 0 Hold Time: 0 Integration Time: Short thermal runaway after ~20sec vgs=4.5v vds=10v vgs=4.4v vds=10v thermal runaway after ~35sec 20 10

25 Page 25 The Quick Self-Heating Check: DoubleSweeps vg vd time Most DC analyzers offer also double sweeps. This is a quick, elegant way to check for inconsistent self-heating without much data handling, or programming. simply apply the double sweep, and check the plot! in a nut shell: DC Measurements Make sure the sampling of the current happens *after* the device has reached its final temperature at this bias point. -> Adjust the instrument s Delay and Hold Time accordingly! Referring to the later model application (e.g. a transistor as a switch, or as an analog amplifier), make sure to measure the device most accurately for those biasings where the model has to be most accurate! 22 11

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27 Page 27 A New DC Measurement Principle To Fully Cover Device Self-Heating id [ma] vds [V] (C) Franz Sischka, June Evaluating the Self-Heating Effect of a Packaged MOS Transistor Measurement of MAX(vDS) vs. time for different vgs values vgs 2.5 V, 2.7V, 2.8V, 2.9V SMU1 -+ 2N7000 SMU2 id(time) vds=10v id [ma] id current drifts due to self-heating, when vgs and MAX(vDS) are applied infinitely vds=10v 2 1

28 Page 28 Self-Heating over Fixed Bias vgs = 2.9V vgs = 2.8V vgs = 2.9V vgs = 2.8V vgs = 2.7V vgs = 2.7V vgs = 2.5V vgs = 2.5V Measurement Setup The self-heating, i.e. the increase of id, can take hundreds of seconds! -3- Difference between a 'quick' measurement and the real, steady-state self-heated measurement DC Output Characteristics id [ma] conventional thermal drift vgs = 2.9V vgs = 2.8V vgs = 2.7V correct vgs = 2.5V vds [V] time [LOG] [sec] vds [V] Standard measurement: Integr.Time: S Hold Time: 0 sec Delay Time: 0 sec Waiting at every bias point until the final self-heating is reached The *real*, steady-state self-heated measurement result 4 2

29 Page 29 The Basic Idea of the New High-Power Device Measurement Procedure: The Power-Dissipation-Related Measurement Stepping blue: equal power dissipation traces The new measurement principle begins with a conventional id-vds pre-measurement. In a second step, the power dissipation at every bias point is calculated, and the results are ordered with increasing power. Finally, the final measurement is performed by stepping down the ordered power dissipation index sequence (see the arrows) This avoids the many up and down heatings during conventional sweep stepping. 5 The new Measurement Principle Step-by-Step

30 Page 30 Proposing a New, Consistent Self-Heating-Covering Measurement Principle: perform a conventional Pre-Measurement with Power-Consumption-Dependent Hold Times i.e. 1st sweep is a vd up-ramping, and the 2nd sweep is a vg up-ramping at the max. Power Biasing, keep the biasing ON, and wait until the measured current has stabilized perform the Power-Consumption-Based Down-Ramping (see the next slides) id_premeasured.m id.m 7 Proposing a New Full Self-heating Measurement Principle (cont'd): performing the power-consumption-based down-ramping... id_premeasured.m id.m 8 4

31 Page 31 Proposing a New Full Self-heating Measurement Principle (cont'd): performing the power-consumption-based down-ramping... id_premeasured.m id.m 9 Proposing a New Full Self-heating Measurement Principle (cont'd): The Final Measurement Result id_premeasured.m id.m 10 5

32 Page 32 Visualization of The Implemented Measurement Stepping measured accurate, fully self-heated current id [ma] vds [V] measurement result visualized stepping sequence of measured points, beginning with the highest power dissipation, down to lowest. Visualized Measurement Steps (cont'd) The same in LOG/LOG Scale... Dissipation Power [LOG] [Watt] vds [LOG] [V]

33 Page 33 Demo available for IC-CAP Users For users of IC-CAP, a Model File is available applying an HP4142 DC Analyzer. The demo can easily be converted for HP/Agilent/Keysight 415x, E527x and B1500 Infos: contact@sisconsult.de contact@sisconsult.de

34 Page 34 DC Measurement Data Consistency Checks As a general rule: apply device modeling only to verified measurements (C) Franz Sischka, June Apply caution if measurement data, to be applied to modeling, do not include information about the DC contact resistance. Example of an id-vd measurement data file: 2 1

35 Page 35 Overlaying DC Output and Transfer Curves [LIN] What to do: convert the measured transfer curve id-vg into a pseudo id-vd output curve, and overlay it with the measured id-vd. Don't forget to inspect both, the y-axis in LIN and in LOG scale! --- id-vd output characteristic --- id-vg transfer characteristics inverted to pseudo-id.vd 3 Overlaying DC Output and S-Parameter Bias Currents [LIN] --- id-vd DC output characteristic --- S-parameter id bias currents Reasons for differences : at high current: self-heating at low current: too big RF signal power different contact resistances min. DC bias resolution of NWA or external bias TEE 4 2

36 Page 36 Visualize the DC Bias Ranges The plots show the vgs-vds bias points of the DC output plot id-vds vgs custom biasing vgs conventional, rectangular biasing vds vds 5 Verifying the DC Bias Consistency of all Measurements vg Example: MOS Transistor DC transfer (id-vg) X DC output (id-vd) + S-parameter Biasing The bias voltages are defined smartly, because they match. This permits to check the identity of currents in the different measurement setups (self-heating, contact resistors etc.) vd 6 3

37 Page 37 Verifying the DC Bias Consistency of all Measurements a Bad DC-Biasing Example... vg Example: MOS Transistor DC transfer (id-vg) X DC output (id-vd) + S-parameter Biasing Due to the different bias conditions in the different measurement setups, a comparison of the currents is not as easy as with the previous slide. vd 7 contact@sisconsult.de -8-4

38 Page 38 Successful CV Measurements (C) Franz Sischka, June Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 2 1

39 Page 39 The CV Measurement Principle. all: complex numbers V 2 = I 2 R 2 Lcur Lpot Hpot Hcur I 1 = I 2 V 1 Z = = = I 1 I 2 V 1 V 1 R 2 V 2 DUT Virtual Ground DUT V 2 slide: Hcur I 1 Hpot Lpot Lcur V 1 I 2 = - + R 2 Auto Balancing Bridge Method 3 When applying the Auto-Balancing Bridge, capacitances from High and Low Terminal to Ground (coax cable shielding) are automatically excluded from the measurement result!!! HIGH DUT Zx LOW V 2 Zx = V 1 V 1 = R 2 I 2 V 2 C cable1 C cable2 R 2 Rs = Hcur Hpot Lcur Lpot V slide: 4 2

40 Page 40 Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 5 CV Measurement Calibration CV Meter and Switching Matrix CV Meter stand-alone 1. OPEN Dummy OPEN Dummy DUT DUT 1. Calibration with OPEN Dummy connected 2. Measurement of the DUT alone 1. Calibration with contacts in the air 2. Measurement of the OPEN Dummy structure 3. Measurement of the DUT incl. OPEN Calculation: DUT = DUT incl.open - OPEN 6 3

41 Page 41 Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 7 On-Wafer CV Measurement: where to connect the Hi and Lo of the CV meter Lpot Lcur Hpot Hcur Gate Electrode Gate Dielectrics Substrate Wafer Chuck p-sub p+ Due to the Balanced Bridge measurement principle of CV meters, the LOW connection is sensitive to measurement perturbations. Therefore, connect the CV High Connections to substrate 8 4

42 Page 42 Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 9 How To Handle Devices With More Than 2 Pins Lcur Lpot Hpot Hcur Lcur Lpot Hpot Hcur B C B C E E Connecting only 2 pins of a multi-pin device means that the capacitance between these 2 pins plus any other combination of capacitances between the 2 pins (the requested C BC, plus C BE and C CE ) will be measured! Connecting the unused pins to ground (cable shielding) excludes the parasitic capacitances from being measurement. -> Only C BC is measured. slide: 10 5

43 Page 43 Example: Correct Connections for Measuring CBC of a Bipolar Transistor CAL with OPEN DUMMY DUT Measurement S B C cross C pad C pad p_isolation R SUB C E B S C cross C E C pad C pad C pad C pad E C BE p_isolation p_isolation B p_isolation R C C SUB R SUB BC R SUB C CS p_substrate p_substrate S B C cross C pad C pad C E C pad S B C pad C cross C E C pad B E C pad C shorted calibrated out capacitance to ground: excluded by meas. principle After: J.Berkner, Kompaktmodelle für Bipolartransistoren, Expert-Verlag Renningen (Germany), ISBN , February Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 12 6

44 Page 44 Applicable AC Signal Level A typically 1MHz sinusoidal signal generator stimulates the device. The CV-Meter (LCRZ-Meter) calculates the measurement impedance from the magnitude and phase of voltage and current vectors. These vectors can also be the resulting vector of fundamental and harmonics (see the next slide) A Quick Study About the Influence of the Applied AC Power Level Experiment: Applying a 1MHz AC Signal with 100mV peak (small signal) and 1V peak (large signal). How do the time-signals at the DUT pins look like? Example: MOS Transistor CV Overlap Capacitance G_DSB Case 1 vg vs. time small AC signal: DC bias: +0.5V AC signal: 0.1V peak ig vs. time linear CV calculated from time domain ig vs. vg linear theoretical CV curve vg vs. time ig vs. time ig vs. vg non-linear non-linear Case 2 large AC signal: CV calculated from time domain theoretical CV curve ig CG _DSB vg t DC bias: +0.5V AC signal: 1V peak 14 7

45 Page 45 Non-linear curve traces mean: fundamental frequency plus harmonics!!! Question: How are these harmonics measured by the impedance analyzer?? 15 Applicable AC Signal Level - in practice- 1.) CV Measurement Signal Level typical settings: ~20mV rms C_g_sd Measurement with Different AC Signal Levels but... you should verify this value!!! Increase the signal level until the CV measurement begins to change! When this happens, reduce the signal level and measure. Note: too low levels will reduce the signal/noise ratio. AC Signal Levels 2.) CV simulation signal level the CV simulation is based on an AC simulation, which corresponds to a 'linearization in the operating point'. no dependence on the AC signal level. 16 8

46 Page 46 Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 17 CV Measurement and DC Bias CV CJO Recommandation: max. applicable DC bias for diode CV measurements ~ 4*CJO Avoid DC saturation of the CV meter! when measuring a CV curve into the diode ON-state, don't apply a DC bias bigger than what corresponds to a capacitance ~3 times bigger than the 0V capacitance CJ0. DC Z DUT Z 2 Hcur Lpot Lcur slide: vout vin Z 2 Z DUT -18-9

47 Page 47 Outline CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations 19 Impedance Measurement Recommendations The problem with CV measurements of especially silicon devices is the fact that the silicon may exhibit considerable losses, which are not represented by the CV meter's user-selectable, simple underlaying schematic: Schematic Impedance Plot Schematic Impedance Plot Z DUT Rs Z DUT Rp Cs Rs 1 j Cs freq or Rp Cp 1 j Cp freq A typical silicon capacitance impedance often looks more like this: IMAG Z DUT Real Measure the 'Real-World Impedance', identify the corresponding equivalent schematic, and convert to CV by yourself freq

48 Page 48 Wrap-Up What had been covered: CV Measurement Principle Calibration Susceptibility to Measurement Noise What to do with Unused Pins During CV Measurements Applicable AC Signal Level CV Measurement and DC Bias Impedance Measurement Recommendations

49 Page 49 Impedance Measurements the Smart Enhancement For CV Measurements (C) Franz Sischka, June Conventional CV Measurements for Modeling Typically, an LCRZ Meter Measures an Impedance at 1MHz, with swept DC Bias. As requested by the user, this impedance is then converted into either Resistor + Capacitor or Resistor // Capacitor... and, usually, only the capacitance of the Resistor//Capacitor interpretation is applied to modeling Therefore, a LCRZ Meter is also called CV Meter

50 Page 50 The real world, however, is the measured, complex Impedance, while a CV measurement curve is just its projection to the y-axis Diode Impedance 1MHz CV 1MHz v AC = 0.9V v AC = 0.8V v AC = 0.7V v AC = 0.5V v AC = 0V v AC = -0.5V v AC = -1V E.g.: Diode Impedance Measurement: *all* physical capacitors also exhibit a loss, the tangens-delta. This shows up like a resistor in series to the capacitor. when modeling *just the capacitor*, i.e. the projection of the reality to the y-axis, you will certainly get a fit, but the capacitor parameter values may not be the correct, physical ones. Very often, in this case, the capacitance parameters look like being frequency-dependent!!! Measurement Suggestion: Substitute Conventional CV Measurements by Impedance Measurements vs. Bias Advantage: same measurement effort, same measurement time and speed get a clear picture of the *real* device behavior *decide yourself*, *how* to do the modeling

51 Page 51 An Example: Bias and Frequency Swept Diode Impedance Diode Impedance Measurement skin effect DC-only modeling freq vac vac=1v vac=-1v vac=0v vac=0.5v vac=0.8v vac=0.9v 500kHz... 2MHz, step 50 khz tangens-delta loss CV-only modeling NOTE: If just a standard CV measurement had been performed, no skin effect and no tangens-delta effect would have been identified and modeled... For the conventional CV Modeling (fixed frequency, DC Bias)... How to Read Capacitance and Parallel Resistor out of an Impedance Measurement: Y REAL j IMAG Y Y 1 RP 1 REAL Z 1 IMAG Z CP j CP j IMAG Y 1 RP j CP Applying these two simple data conversion formulas brings you back to conventional device modeling!

52 Page 52 And... How to Read Capacitance and Series Resistor (Tangens Delta) out of an Impedance Measurement: < Z > o--- --o-- ---o RS CS Z REAL Z RS REAL 1 j IMAG Z RS j CS Z 1 j j IMAG Z j CS CS 1 CS IMAG Z Applying these two simple data conversion formulas brings you back to conventional device modeling! Conclusions Measuring impedances instead of the simplifying CV curves gives an improved insight into the device without much measurement overhead and provides better models

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54 Page 54 Tutorial about Interpreting Impedance Measurements Impedance Plot Notes: This tutorial is about 2-pin impedances, 2-pin impedances with an additional leakage to ground are covered by another tutorial. (C) Franz Sischka, June Impedance Plots can be obtained from LCRZ or S-Parameter Measurements Besides standard capacitance measurements, a LCRZ meter can also measure the complex impedance. Advantage: this is the real device performance, giving a clear picture of the underlaying device schematic. Calculating 1-Port S-Parameter from 2-Port: Viewed from Port1, with Port2 shorted: S12 S21 S _1Port S11 1 S22 Impedance 1 S _1Port Z0 1 S _1Port

55 Page 55 Modeling Two-Port Component S-Parameter Measurements by a PI Schematic S11 S matrix S21 Y11 Y matrix Y21 S12 S22 Y12 Y22 Assuming an underlaying PI schematic for the component, convert the de-embedded S-parameters to Y-parameters, and model the impedances of the PI schematic branches 1 Z10 1 Z12 1 Z12 1 Z Z20 Z12 Z10 Z12 Z20 1 Y11 Y12 1 Y12 1 Y22 Y21 Z10 Z12 Z20 all parameters are represented by complex numbers -3- TERMS AND DEFINITIONS FOR SERIES AND PARALLEL CIRCUITS Series Circuit Parallel Circuit _ Impedance Z = R + j*x Admittance Y = G + j*b Resistance R Conductance G = 1/R Reactance X Susceptance B = 1/X Immittance: A general term for both impedance and admittance, used when the distinction is not relevant. -4-2

56 Page 56 Introduction to the Complex Impedance Plane j*x inductive region Displayed are frequency-depending impedance locus curves Measured by LCRZ meters, or from 1-port S-Parameters freq R With increasing frequency, all impedance trajectories turn clock-wise Impedance Trajectory capacitive region Only the right half-plane is used (otherwise: R < 0W!!) Impedance Curve Tutorials

57 Page 57 A Resistor j*x R=10Ω R Impedance Plot Explanations: depending on the value of the resistor, the impedance is represented by a single point on the x-axis of the impedance plot Resistor and Capacitor j*x Rs j*x Rp R R freq freq

58 Page 58 Resistors and Capacitors j*x R j*x Rp Rs Rs+Rp R freq freq Resistor and Inductor j*x j*x freq freq Rs R Rp R

59 Page 59 Resistors and Inductors j*x j*x freq freq Rp Rs Rs+Rp R R Resonance Circuits j*x j*x freq freq Rs R R Rp

60 Page 60 Final Remark for users of Keysight IC-CAP, a tutorial ModelFile is available from SisConsult. contact@sisconsult.de -13-7

61 Page 61 Tutorial About Applying Impedance Curve Modeling Example: Modeling a LED Franz Sischka, June First of all, and for completeness, the DC Modeling Result measured simulated RS HI diode IS & N LO diode IS & N

62 Page 62 Outline - Conventional CV Modeling - Conventional CV Modeling at Different Frequencies - Improving the Modeling by Impedance Curve Modeling - Comparison CV vs. Impedance Modeling Quality - Conclusions 3 The Conventional CV Modeling 1MHz M measured simulated VJ, FC CJO -4-2

63 Page 63 Outline - Conventional CV Modeling - Conventional CV Modeling at Different Frequencies - Improving the Modeling by Impedance Curve Modeling - Comparison CV vs. Impedance Modeling Quality - Conclusions 5 Conventional CV Measurements at Different Frequencies 500kHz to 2MHz, step 50 khz measured simulated 1MHz CV Modeling freq Problem: the measured CV-curve at different frequencies is frequency dependent!!! -6-3

64 Page 64 Adding a Series Inductor Improves CV(freq) Modeling 500kHz to 2MHz, step 50 khz measured simulated 1MHz CV Modeling freq Although the added series inductor improves the fit, the frequency-dependent measurements are still not fitted well, especially for the lower frequencies. -7- Outline - Conventional CV Modeling - Conventional CV Modeling at Different Frequencies - Improving the Modeling by Impedance Curve Modeling - Comparison CV vs. Impedance Modeling Quality - Conclusions 8 4

65 Page 65 A better approach: Instead of CV Measurements, We Now Apply Impedance Curve Measurements to Improve the Modeling Fit Inspection of the Impedance Curves freq vac vac=0.9v vac=1v measured simulated, based on DC and conventional CV (only) modeling 500kHz to 2MHz, step 50 khz vac=-1v..0.8v As depicted above, the imaginary parts of the impedances are modeled OK (CV but not the real parts. the DC series resistor RS, fitting well the DC measurements, is not big enough to shift the simulated (blue) curves to the right, covering the measured (red) ones. Note: The shifted real parts correspond to the loss of the capacitance (also called the 'tan-delta' of the capacitor), i.e. a resistor in series with the capacitor

66 Page 66 Impedance Curve Interpretation in Details freq 500kHz to 2MHz, step 50 khz skin effect tangens-delta loss RS RS + RTD // RSCTD RS + RTD RS + RS1 + RTD // RSCTD Final Fitting of the Impedance Plot 500kHz to 2MHz, step 50 khz measured simulated

67 Page 67 Fitting of the Diode Impedance Measurements Interpreted by a Capacitance CS in Series with Resistor RS vac = -1V.. 1V RS measured simulated vac = -1V.. 1V CS 500kHz to 2MHz, step 50 khz 500kHz to 2MHz, step 50 khz Final Fitting of the CV(freq) Modeling 500kHz to 2MHz, step 50 khz measured simulated 1MHz CV Modeling

68 Page 68 Fitting in the 1-Port S-Parameter Equivalent Z - Z0 S_1Port = Z + Z0 S_1Port measured simulated 500kHz to 2MHz, step 50 khz -15- Outline - Conventional CV Modeling - Conventional CV Modeling at Different Frequencies - Improving the Modeling by Impedance Curve Modeling - Comparison CV vs. Impedance Modeling Quality - Conclusions 16 8

69 Page 69 Comparison - Conventional CV Modeling - LC-Modeling - Impedance Modeling 13MHz Sxx 13MHz Sxy 13MHz 13MHz 13MHz 13MHz freq: 1MHz to 1GHz [LOG] -17- Outline - Conventional CV Modeling - Conventional CV Modeling at Different Frequencies - Improving the Modeling by Impedance Curve Modeling - Comparison CV vs. Impedance Modeling Quality - Conclusions 18 9

70 Page 70 Conclusions The impedance of a packaged LED has been modeled in comparison to a conventional CV modeling. It was shown that the model performance is dramatically improved when applying impedance modeling, especially for frequencies above the modeling range, while the measurement effort, applying an LCRZ meter, is identical

71 Page 71 Impedance Modeling Examples (C) Franz Sischka, June Contents Packaged Diode 1N5402 Packaged Capacitor 10nF Electrolyte Capacitor 20uF Electrolyte Capacitor 10uF 2 1

72 Page 72 Impedance Curve Modeling of Diode 1N5402 Franz Sischka, May Diode DC Forward Modeling Result RS A C o--- --o---- > ----o-- > ---o RS 111 DSAT 12 DMAIN measured simulated DSAT diode IS & N DMAIN diode IS & N

73 Page 73 Diode DC Reverse Modeling Result A C o---o-- --o---- > ----o-- > --o---o RS 111 DSAT 12 DMAIN < --o DREV RSREV RSREV measured simulated DREV diode IS & N Conventional CV Measurements for Diode Modeling An LCRZ Meter measures an impedance at 1MHz, with swept DC Bias. As requested by the user, this impedance is then converted into either Resistor + Capacitor or Resistor // Capacitor usually, only the capacitance of the Resistor//Capacitor interpretation is applied to modeling

74 Page 74 The Conventional Diode CV Modeling 1MHz measured simulated VJ, FC M CJO Instead of Diode CV-Only Modeling, We Now Perform an Impedance Modeling and Develop a Better Spice Model

75 Page 75 Diode Impedance Modeling A RS Z vac vac CP A C RtanD C RP freq The Diode Impedance Z is measured and modeled, and intepreted as Resistor + Capacitor (Diode on-state) RS CS and Resistor // Capacitor (Diode off-state) RP CP Impedance Fit with CV Modeling only CP RP Z Impedance Measurement: freq: 10Hz.. 2MHz vac = -4.8, -3.8, -2.8, -1.8, -0.8, 2V Model: CS RS

76 Page 76 Modeling Result with Improved Spice Model CP RP Impedance Measurement: freq: 10Hz.. 2MHz vac = -4.8, -3.8, -2.8, -1.8, -0.8, 2V CS RS The Spice Model in Details CAC 112 RSCAC o DCV o- > --o RTAND 121 A C o---o-- --o---- > ----o-- > --o------o RS 111 DSAT 12 DMAIN < --o o DREV RSREV CPRSREV DC Part AC Part

77 Page 77 Contents Packaged Diode 1N5402 Packaged Capacitor 10nF Electrolyte Capacitor 20uF Electrolyte Capacitor 10uF 13 10nF Capacitor -14-7

78 Page 78 Impedance Plot 10nF Capacitor freq: 100kHz... 2MHz, stepping: 10kHz? Modeling Result 10nF CS RS CP RP

79 Page 79 Modeling Result 10nF o---/\/\---o o o---o L1 CMAIN RMAIN o-- -- C1 RSC1 subckt WIMA_10nF (1 2 ) L1 (1 11 ) inductor L = 1.087E-007 Spectre Syntax CMAIN (11 12 ) capacitor C = 1.03E-008 RMAIN (12 2 ) resistor R = C1 (12 21 ) capacitor C = 7.887E-007 RSC1 (21 2 ) resistor R = ends -17- Contents Packaged Diode 1N5402 Packaged Capacitor 10nF Electrolyte Capacitor 20uF Electrolyte Capacitor 10uF 18 9

80 Page 80 Electrolyte Capacitor 20uF Impedance Plot 20uF Electrolyte Capacitor freq: 1kHz kHz, stepping: 5kHz

81 Page 81 Modeling Result 20uF CP RP CS RS Modeling Result 20uF ; CPRMAIN LPRS2 ; /\/\- ; ; A o---o- -o-- --o- -o- -o-/\/\---o C ; RMAIN CMAIN RS1 RS2 LS define Impedance_PackagedCap_Wima20uF (A C ) R:RMAIN A A1 R= C:CPRMAIN A A1 C= C:CMAIN A1 AC C=2.372E-005 ADS Syntax R:RS1 AC C2 R= R:RS2 C2 C1 R= L:LPRS2 C2 C1 L=1.46E-008 L:LS C1 C L=1.384E-007 end Impedance_PackagedCap_Wima20uF

82 Page 82 Contents Packaged Diode 1N5402 Packaged Capacitor 10nF Electrolyte Capacitor 20uF Electrolyte Capacitor 10uF 23 Electrolyte Capacitor 10uF

83 Page 83 Impedance Plot 10uF Capacitor freq: 1kHz kHz, stepping: 5kHz Modeling Result 10uF

84 Page 84 Modeling Result 10uF define Impedance_PackagedCap_10uF (A C ) ; A3 ; - -o- - ; C2 R2 ; - -o o C1 ; C1 A2 R1 ; A o o o--/\/\---o C ; CMAIN A1 RMAIN LS C:CMAIN R:RMAIN C:C1 R:R1 C:C2 R:R2 L:LS A A1 C=1.037E-005 A1 C1 R=2.315 A1 A2 C=1.836E-005 A2 C1 R=2.264 A2 A3 C=2.298E-007 A3 C1 R=7.981 C1 C L=9.318E-008 ADS Syntax end Impedance_PackagedCap_10uF -27- Wrap-Up Impedance modeling, based on impedance measurements, is an elegant method to develop accurate, reliable device models

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