Analog and Telecommunication Electronics

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1 Politecnico di Torino - ICT School Analog and Telecommunication Electronics F3 - Actuator driving» Driving BJT switches» Driving MOS-FET» SOA and protection» Smart switches 29/06/ ATLCE - F DDC

2 Lesson F3: Switch/actuator driving Using BJT switches Command ON/OFF state parameters Speed analysis Using MOS-FET switches Command ON/OFF state parameters Speed analysis Special applications 29/06/ ATLCE - F DDC

3 Switch interfaces Goal: drive Power Switches from logic circuits Logic circuit parameters Load parameters» Type: R, L, C, I, V» Required V and I» Transition time (overvoltage/current, EMC)» Special requirements (Galvanic insulation, ) Power device parameters» V, I, P max; SOA» Configuration; High/Low side, floating» Active device parameters (current gain, Vt, )» Dynamic behavior 29/06/ ATLCE - F DDC

4 Low/High/floating switches Low side SW Load to Vs (positive), SW to GND Unidirectional current flow in the SW SW pins near GND, easy driving from standard logic devices High side SW Load to GND, SW to Vs (positive) Unidirectional current flow in the SW SW pins near Vs, needs voltage shift driving circuits Floating SW All SW pins at undefined voltage, undefined current flow Mostly used for low level analog (multiplexer, S/H, ) Special driving circuits 29/06/ ATLCE - F DDC

5 BJT Power switch parameters 29/06/ ATLCE - F DDC

6 Driving BJT to ON state ON: low CE voltage drop (Vcesat) Base current higher than Ic/β Take margins (forced β) High Ib low Vcesat 29/06/ ATLCE - F DDC

7 Driving BJT to OFF state OFF: Collector current Ic = 0 Keep Ib = 0» Steer Icbo away from Base Subthreshold or reverse bias of BE junction» Warning: reverse Vbe breakdown ( 5 V) 29/06/ ATLCE - F DDC

8 Switching transient in BJT Same problems as pn junctions Turn ON: can be fast Turn OFF: stored charge removal Look at base driving network 29/06/ ATLCE - F DDC

9 BJT SOA Check for ON state Switching mus be fast to get high power dissipation only for short time Check for OFF state 29/06/ ATLCE - F DDC

10 Power dissipation Full ON or full OFF power close to 0 Intemediate state (active area) V and I 0 Power dissipation Reduce duration of transients Fast switching 29/06/ ATLCE - F DDC

11 BJT low-side drive circuit With NPN BJT ON Emitter to GND, load on Collector Command to Base (close to GND) Ic = Vs/Rl Provide enough base current (Ib > Ic/β) If current gain too low» Darlington, additional external CC, parallel outputs OFF Bring base current to 0: sub-threshold or reverse bias Avoid BE reverse breakdown (typ 5 V) Avoid thermal runaway for Icbo multiplication 29/06/ ATLCE - F DDC

12 BJT high-side drive circuit With NPN BJT Collector to Vs, Emitter to load: a CC configuration Command to Base» Close to Vs, requires level shift and supply > Vs Difficult to saturate the BJT (Vb > Vc) With PNP BJT Emitter to Vs, load on Collector, command to Base Command from a low-side switch (NPN to GND) + pullup; same levels as for low-side ON: enough base current, forced beta,. OFF: base current to 0: sub-threshold or reverse bias 29/06/ ATLCE - F DDC

13 Driving BJT from CMOS logic circuits ON: If Vdd = 5, 3,3, 2.5 V Vh > 0,6V OK Provide enough base current» Increase base drive current: logic outputs in parallel» Increase current gain: darlington configuration Lower Vdd (1,8,.. 0,8V) may require additional devices OFF Vl< 0,6V» Provide a path for Icbo (resistor to GND) Drive other logic circuits? Verify logic compatibility of Vo Isolate with independent buffer 29/06/ ATLCE - F DDC

14 BJT drive: numeric example Driver: CMOS with Vdd = 5 V Load: 2 A, 12 V Switch: TIP30 29/06/ ATLCE - F DDC

15 Lesson F3: Switch/actuator driving Using BJT switches Command ON/OFF state parameters Speed analysis Using MOS-FET switches Command ON/OFF state parameters Speed analysis Special applications Protection, isolation Smart switches & Automotive Fail-safe switches 29/06/ ATLCE - F DDC

16 MOS Power switch parameters 29/06/ ATLCE - F DDC

17 MOS Power switch parameters 29/06/ ATLCE - F DDC

18 MOS-FET Power switches Not the same device! 29/06/ ATLCE - F DDC

19 Driving MOS-FET to ON state Left: linear I,V axis Rigth: log I, V 29/06/ ATLCE - F DDC

20 Driving MOS-FET to OFF state Vgs < Vt (OFF) Id=0 (cutoff) Vgs > Vt (ON) Id=Vds/Rd (triode region) Rd depends on Vgs, Vds Temperature 29/06/ ATLCE - F DDC

21 Switching transient in MOS-FET Voltage-dependent Cgs Input: current step Constant charge flow into Cgs 1: below threshold, Id = 0 2: weak conduction 3: active region Voltage gain Miller effect Verify with lab experiment 29/06/ ATLCE - F DDC

22 Gate ringing in MOS-FET Gate drive wire makes a LC resonator Low losses (no R) Step in control voltage may cause Gate overvoltage Add damping to Gate drive circuit Series resistor No static power loss 29/06/ ATLCE - F DDC

23 SOA in MOS-FET No secondary breakdown Id limited by Rds 29/06/ ATLCE - F DDC

24 MOS low-side drive circuit Load to Vs, SW to GND With n-mos device Source to GND, load on Drain Command to Gate (close to GND) ON: Vgs > Vt OFF: Vgs < Vt With p-mos device, control referred to Vs May require non-standard logic levels Add n-mos level translator 29/06/ ATLCE - F DDC

25 MOS high-side drive circuit Load connected to GND, SW to Vs With n-mos device Source to load, Drain to Vs, CD configuration Command to Gate (close to Vs, requires level shift) With p-mos device, Source to Vs, load on Drain May require non-standard logic levels, Level translator with n-mos low side 29/06/ ATLCE - F DDC

26 MOS switch drive from logic circuit Vt < Vh Direct drive Power devices have high Gate capacitance Fast transition to limit power dissipation High current drive (dynamic) for the Gate Special driving circuits Parasitic inductance of Gate wire combined with the capacitor makes a LC with high Q, and can cause high overvoltage on Gate Damping resistor close to gate 29/06/ ATLCE - F DDC

27 MOS complementary high/low-side SW Low side SW to GND, high side SW to Vs, with complementary commands Similar to complementary final stage of power amp., but uses CE configuration (saturated amplifier) Similar to CMOS outputs (complementary CS stages) Protection from both-on Protection from direct current paths during transients Load to intermediate voltage Bidirectional current Load to GND/Vs Faster switching 29/06/ ATLCE - F DDC

28 Floating load H bridge Floating load, with complementary drive on each side: H bridge Voltage and current reverse in the load 2x voltage, 4x power Two commands Active/OFF Direction Zero power consumption when load OFF Used also for amplifiers: steady state has no DC 29/06/ ATLCE - F DDC

29 MOS floating switch drive A floating switch has both nodes at any voltage Used in S/H circuits, mux (analog), or pass gates (digital). Needs floating Vgs source: achieved controlling the current flowing in a G-S resistor 29/06/ ATLCE - F DDC

30 Lesson F3: Switch/actuator driving Using BJT switches Command ON/OFF state parameters Speed analysis Using MOS-FET switches Command ON/OFF state parameters Speed analysis Special applications Protection, isolation Smart switches & Automotive Fail-safe switches 29/06/ ATLCE - F DDC

31 Overvoltage protection Inductive loads create a significant overvoltage at turn OFF, due to current flowing in the inductance. Provide a path for current when the switch is OFF Limit the voltage on Collector/Drain Catch diode low impedance path to dissipate the energy stored in the inductor» SW closed: diode reverse-biased, no current flow» SW opens: the current in L continue to flow through the diode With MOS, internal diode can dissipate a limited energy 29/06/ ATLCE - F DDC

32 Galvanic isolation Power section isolated from control section Transformer Optocoupler Benefits for Safety EMC 29/06/ ATLCE - F DDC

33 Smart switches ICs which include Interface (usually to standard logic) Protection (I, V, temperature, faults, ) Example: HITFET BTS 142D 29/06/ ATLCE - F DDC

34 Automotive Smart Switch Automotive loads connected to GND high side SW ICs which include Interface (to some standard communication structure) Protection (I, V, temperature) Fault detection and signalling (open, short, ) Example: 29/06/ ATLCE - F DDC

35 Fail-safe switch Guaranteed state in case of failure Safe-ON» Guarantee ON (e.g. satellite power)» Parallel of several SW Safe-OFF» Guarantee OFF (e.g. safety isolation)» Series of several SW 29/06/ ATLCE - F DDC

36 Fault tolerant switch Guaranteed operation (ON/OFF), even in case of (limited) failure Single SW Single SW routine Single SW routine routine CPU pin CPU pin CPU pin SUPPLY A B ACTUATOR M C Fault-tolerant Power Switch Actuator 29/06/ ATLCE - F DDC

37 Fault tolerant switch circuit 29/06/ ATLCE - F DDC

38 Switch driver circuit 29/06/ ATLCE - F DDC

39 BJT drive: lab experiment BJT switch Effects of forced beta (base overdrive) Measure Vcesat Switching speed for diodes and BJT Measure recovery time Compare various driving circuits MOS switch Gate charge analysis Drive a medium power load with BJT 5W lamp Compare PWM with linear power control 29/06/ ATLCE - F DDC

40 Lesson F3: final test Summarize the electrical parameters of logic circuits. How can we guarantee that a BJT switch goes fully in ON state? How to bring a BJT switch in OFF state (and keep it safe)? Draw a circuit to drive a low-side BJT switch from a CMOS logic circuit. List relevant parameters for MOS transistors used as switches. Describe switching transients in MOS devices. Which are the boundaries of SOA for MOS power devices? Draw a circuit to drive a high-side MOS switch from a CMOS logic device Draw the circuit to drive a floating switch from a logic signal. 29/06/ ATLCE - F DDC

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