340KHz, 2A, Asynchronous Step-Down Regulator

Transcription

1 40KHz, A, Asynchronous Step-Down Regulator FP65 General Description The FP65 is a buck switching regulator for wide operating voltage application fields. The FP65 includes a high current P-MOSFET, a high precision reference (0.8V) for comparing output voltage with a feedback amplifier, an internal soft start timer and dead-time controller. The oscillator is for controlling the maximum duty cycle and PWM frequency. Features Precision Feedback Reference Voltage: 0.8V (%) Wide Supply Voltage Operating Range:.6 to V Output Adjustable From 0.8V to 6V Low Current Consumption: ma Internal Fixed Oscillator Frequency: 40KHz (Typ.) Internal Soft-Start Function (SS) Built-In P-MOSFET for A Output Loading Over Current Protection Package: SOP-8L Typical Application Circuit V IN 4 5 V CC LX VOUT EN LX 6 FP65 OCSET FB GND GND 7 8 /4

2 Function Block Diagram Pin Descriptions SOP-8L Name No. I / O Description FB TOP View 8 GND FB I Error Amplifier Inverting Input EN I Enable Control OCSET I Set Switch Output Over Current EN OCSET V CC 4 FP65 9Fa-86L GND LX LX V CC 4 P IC Power Supply (PMOS Source) LX 5 O PMOS High Current Output LX 6 O PMOS High Current Output GND 7 P IC Ground GND 8 P IC Ground /4

3 Marking Information FP65 9Fa-86L Halogen Free Lot Number Internal ID Per-Half Month Year Halogen Free: Halogen free product indicator Lot Number: Wafer lot number s last two digits For Example: 86TB 86 Internal ID: Internal Identification Code Per-Half Month: Production period indicated in half month time unit For Example: January A (Front Half Month), B (Last Half Month) February C (Front Half Month), D (Last Half Month) Year: Production year s last digit /4

4 Ordering Information Part Number Operating Temperature Package MOQ Description FP65DR-G -5 C ~ +85 C SOP-8L 500 EA Tape & Reel Absolute Maximum Ratings Parameter Symbol Conditions Min. Typ. Max. Unit Power Supply Voltage V CC V Output Source Current.5 A Error Amplifier Inverting Input -0.. V Allowable Power Dissipation P D SOP-8L T A +5 C 650 mw Thermal Resistance θ JA +0 C / W SOP-8L θ JC +55 C / W Operating Temperature C ESD Susceptibility HBM (Human Body Mode) KV MM (Machine Mode) 00 V Junction Temperature T J +50 C Storage Temperature T S SOP-8L C SOP-8L Lead Temperature (soldering, 0 sec) +60 C IR Re-flow Soldering Curve 4/4

5 Recommended Operating Conditions FP65 Parameter Symbol Conditions Min. Typ. Max. Unit Supply Voltage V CC.6 V Operating Temperature C DC Electrical Characteristics (V CC =6V,T A = 5 C, unless otherwise noted) Reference Parameter Symbol Conditions Min. Typ. Max. Unit Feedback Voltage V REF V Line Regulation V REF / V CC=.6V to V % Load Regulation Feedback Voltage Change with Temperature Oscillator Section V REF V REF / V REF V REF / V REF I OUT=0A to A % T A=- -5 C to +85 C % Oscillation Frequency f Measured from LX pin waveform 40 KHz Short Circuit or Over Current Measured from LX pin f Oscillation Frequency SC waveform 50 KHz Frequency Change with Voltage Δf / ΔV V CC=.6V to V 5 % Frequency Change with Temperature Δf / ΔT T A = -5 C to +85 C 5 % Idle Period Adjustment Section Maximum Duty Cycle T DUTY V FB =0.V 80 % Output Section PMOS Switch Current I LX - A PMOS On Resistance R DS (ON) Thermal Shutdown Section VCC=4.5V mω V CC=0V mω Thermal Shutdown Temperature +50 C Over Current Protection Section OCSET Bias Current I OCSET 40 µa Total Device Section EN Pin Input Current I EN V EN=.5V 0 µa EN Pin On Threshold V UPPER EN pin upper. V EN Pin Off Threshold V LOW EN pin low 0.85 V EN Pin Hysteresis V HYS mv Supply Shutdown Current I SD V EN=0V 0 µa Supply Average current I AVE 6 ma 5/4

6 Supply Current (ma) Supply Current (ma) Current Limit (A) Current Limit (A) Current Limit (A) Oscillator Frequency(kHz) Typical Operating Characteristics VOUT (V) Load Regulation V IN =V I OUT (A) Oscillator Frequency vs. V IN V OUT =.V I OUT =00mA V IN (V) VOUT (V) Line Regulation I OUT =00mA V IN (V) Current Limit vs. Temperature 4.8 Rset=k Temperature ( ).5.45 Supply Current vs. V IN Rset=k Current Limit vs. V IN V IN (V) V IN (V) Supply Current vs. Temperature Ocset resistance vs. Current Limit Temperature ( ) Ocset Resistance (kω) 6/4

7 Efficiency (%) Efficiency (%) FP65 Efficiency Efficiecncy (V IN =V,L=uH) 00 Efficiency Efficiecncy (V IN =5V,L=uH) VOUT=.V VOUT=5V VOUT=.V VOUT=.5V I OUT (A) I OUT (A) Output Ripple (V IN=V,V OUT=.V,I OUT= A) Transient Response (V IN=V,V OUT=.V,I OUT=0.A to A) Ch LX Ch V OUT EN on Test (V IN=V,V OUT=.V,Iout=A) Ch V OUT Ch4 I LX Power on Test (V IN=V,V OUT=.V,I OUT=A) Ch EN Ch LX Ch V OUT Ch4 I LX Ch V IN Ch LX Ch V OUT Ch4 I LX 7/4

8 Function Description Voltage Reference A.5V reference regulator supplies FP65 internal circuits and uses a resistive divider to provide 0.8V precision reference voltage on the non-inverting terminal of error amplifier. Error Amplifier The error amplifier compares a sample of the DC-DC converter output voltage to the 0.8V (V REF ) reference and generates an error signal for the PWM comparator. Output voltage of the DC-DC converter is setting by the resistor divider with following expression (see Fig. ) V OUT R R V REF V OUT R Error Amplifier 6K R 0.8V FP65 Figure. Error Amplifier with Feedback Resistance Divider The recommended resistor value is summarized below: V OUT (V) R (kω) R (kω).8.4k k.5.k 6.8k..5k 4.7k 5 k 0.5k 8/4

9 Oscillator The fixed frequency is generated by an internal RC oscillator. Its typical values is 40KHz in normal operation and 50KHz in short circuit condition. Thermal Protection When a heavy loading draws current from the regulator, the chip temperature will rise. Once the junction temperature exceeds 50, FP65 thermal protection function will be triggered and the LX output will be turned off. When junction temperature is lower, FP65 starts again and enable LX pin output. Over Current Protection The FP65 uses cycle-by-cycle current limit to protect the internal power switch. During each switching cycle, a current limit comparator detects if the power switch current exceeds the external setting current or not. Once over current occurs, chip will decrease the oscillator frequency to prevent from thermal issue. The current limit threshold is setting by external resistor (R ) which is connecting from V CC to OCSET pin. An internal 40µA current sink which draws current from the resistor sets the voltage at pin OCSET. Please refer to the following formula for setting the current limit value: I OCP I OCSET R 5m Here, 5mΩ is internal sense resistance. Example: I OCP 40A.49k 5m.85A 9/4

10 Application Information Input Capacitor Selection The input capacitor must be connected to the V CC pin and GND pin of the FP65 to maintain steady input voltage and filter out the pulsing input current. The voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. In switch mode, the input current is discontinuous in a buck converter. The source current of the high-side MOSFET is a square wave. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The RMS value of input capacitor current can be calculated by: I RMS V V V O O IO MAX VIN IN It can be seen that when V O is half of V IN, C IN is under the worst current stress. The worst current stress on C IN is I O_MAX /. Inductor Selection The value of the inductor is selected based on the desired ripple current. Large inductance gives low inductor ripple current and small inductance result in high ripple current. However, the larger value inductor usually has a larger physical size, higher series resistance, and lower saturation current. On the experience, the value is to allow the peak-to-peak ripple current in the inductor to be 0%~0% maximum load current. The inductance value can be calculated by: (VIN V L f I L O ) V V O IN f (V IN V O V O (0% ~ 0%)I O VIN ) The inductor ripple current can be calculated by: I L VO V f L V O IN Choose an inductor that does not saturate under the worst-case load conditions, which is the load current plus half the peak-to-peak inductor ripple current, even at the highest operating temperature. The peak inductor current is: I L _PEAK I O I L 0/4

11 The inductors in different shape and style are available from manufacturers. Shielded inductors are small and radiate less EMI issue. But they cost more than unshielded inductors. The choice depends on EMI requirement, price and size. Inductor Value (µh) Dimensions(mm) Component Supplier Model FENG-JUI TPRH0D40-0R Sumida CDRH04R FENG-JUI TPRH0D40-5R Output Capacitor Selection The output capacitor is required to maintain the DC output voltage. Low ESR capacitors are preferred to keep the output voltage ripple low. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. The output ripple is determined by: V O I L ESR C OUT 8 f C OUT Where f = operating frequency, C OUT = output capacitance and ΔI L = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔI L increases with input voltage. Using Ceramic Input and Output Capacitors Care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, V IN. In best condition, this ringing can couple to the output and be mistaken as loop instability. In worst condition, a sudden inrush of current through the long wires can potentially generate a voltage spike at V IN, which may large enough to damage the part. When choosing the input and output ceramic capacitors, choose the one with X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. /4

12 PC Board Layout Checklist. The power traces, consisting of the GND trace, the LX trace and the V IN trace should be kept short, direct and wide.. Place C IN near V CC pin as closely as possible to maintain input voltage steady and filter out the pulsing input current.. The resistive divider R and R must be connected to FB pin directly as closely as possible. 4. FB is a sensitive node. Please keep it away from switching node, LX. A good approach is to route the feedback trace on another layer and to have a ground plane between the top layer and the layer on which the feedback trace is routed. This reduces EMI radiation on to the DC-DC converter s own voltage feedback trace. 5. Keep the GND plates of C IN and C OUT as close as possible. Then connect this to the ground plane (if one is used) with several vias. This reduces ground plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the FP65 GND pin by giving it a low impedance ground connection. via to V OUT GROUND PLAN C R GND R 8 GND R FP D L C4 C5 4 5 V IN V OUT Suggested Layout /4

13 Typical Application V IN L µh 4 5 V CC LX VOUT R.49K EN FP65 LX 6 D SM40 C 470pF R 0.5K C 0µF C 0.µF OCSET FB GND GND 7 8 R K C5 0µF C4 0.µF FP65 Basic DC-DC Regulator Circuits For example: The V IN power supply is V and the V OUT is designed for 5.0V / A solution. The output voltage formula is: V OUT R R V REF 0.5K K 0.8V 5.0V Notice:. Tapping reel aluminum foil bags after unpacking must be stored at 0% RH environment.. Tapping reel aluminum foil bags after unpacking must sure surface-mount is completed within 68 hours. /4

14 Package Outline SOP-8L UNIT: mm Symbols Min. (mm) Max. (mm) A A A.498 D E H L θ 0 8 Note:. Package dimensions are in compliance with JEDEC Outline: MS-0 AA.. Dimension D does not include molding flash, protrusions gate burrs.. Dimension E does not include inter-lead flash, or protrusions. 4/4