Current Mode PWM Controller

Transcription

1 SG186/SG286/SG86 Description he SG186 family of control ICs provides the required features to implement Fixed Frequency, Current mode control schemes while maintaining a minimum external parts count. he advanced performance of this technique can be measured in improved line regulation, enhanced load response characteristics, and a simpler, easiertodesign control loop. opological advantages include, inherent pulsebypulse current limiting capability, automatic symmetry correction for pushpull converters, and the ability to parallel power modules while maintaining equal current sharing. Protection circuitry includes builtin undervoltage lockout and programmable current limit in addition to soft start capability. A shutdown function is also available which can initiate either a complete shutdown with automatic restart, or latch the supply off. Other features include fully latched operation, doublepulse suppression, deadtime adjust capability, and a ±1% trimmed bandgap reference. Block Diagram Features Automatic Feedforward Compensation Programmable Pulse by Pulse Current Limiting Automatic Symmetry Correction in Pushpull Configuration Enhanced Load Response Characteristics Parallel Operation Capability for Modular Power Systems Differential Current Sense Amplifier with Wide Commonmode Range Double Pulse Suppression 200mA otempole Outputs ± 1% Bandgap Reference Undervoltage Lockout Softstart and Shutdown Capability 500kHz Operation High Reliability Features Available o MILSD88 88, Available to DSCC Standard Microcircuit Drawing (SMD) SGR186 Radolerant Version Available V IN SYNC 5.1 V REFERENCE REGULAOR R C OSC U.V.LOCKOU V C Q A OU CURREN SENSE X CURREN SENSE S R S Q Q SG186 Output Stoge B OU GND 0.5 V 0.5 ma CURREN LIMIADJUS N.I. INV. E.A. 50 mv 6K SHUDOWN Figure 1 Block Diagram November 201 Rev Microsemi Corporation Analog Mixed Signal Group

2 Connection Diagrams and Ordering Information Ambient emperature ype Package Part Number Packaging ype Connection Diagram 55 C to 125 C J PIN CERAMIC DUAL INLINE PACKAGE SG186J88B SG186JDESC SG186J 25 C to 85 C PIN SG286N N PLASIC DIP 0 C to 70 C PACKAGE SG86N CERDIP PDIP C.L./SOFSAR VREF () C.S. () C.S. () ERROR AMP () ERROR AMP ENSAION C SHUDOWN VIN OUPU B GROUND OUPU A SYNC N Package: RoHS Complaint / Pbfree ransition DC: 050 N Package: RoHS / Pbfree 100% Matte in Lead Finish VC R 25 C to 85 C 0 C to 70 C DW PIN WIDEBODY PLASIC SOIC PACKAGE SG286DW SG86DW SOWB C.L./SOFSAR 1 SHUDOWN 2 15 V IN () C.S. () C.S. 1 1 OUPU B V C () ERROR AMP () ERROR AMP ENSAION GROUND OUPU A SYNC C 8 9 R DW Package: RoHS Complaint / Pbfree ransition DC: 05 DW Package: RoHS / Pbfree 100% Matte in Lead Finish 55 C to 125 C Notes: F L PIN CERAMIC FLA PACK PACKAGE 20PIN CERAMIC LLC PACKAGE 1. Contact factory for DESC part availability. 2. All parts are viewed from the top.. Consult factory for product availability. Absolute Maximum Ratings SG186FDESC SG186L88B SG186LDESC SG186L FLAPAK CLCC C.L./SOFSAR () C.S. () C.S. () ERROR AMP () ERROR AMP ENSAION C Parameter Value Units Supply Voltage (V IN) 0 V Collector Supply Voltage(V C) 0 V Analog Inputs (Pins,, 5, 6, and ) 0.V to V IN V Logic Input 0.V to 5.5V V Source/Sink Load current (continuous) 200 ma Source/Sink Load Current (peak, 200 ns) 500 ma Reference Load Current 0 ma Soft Start Sink Current 50 ma Sync Output Current 5 ma Error Amplifier Output Current 5 ma Oscillator Charging current (Pin 9) 5 ma SHUDOWN V IN OUPU B V C GROUND OUPU A SYNC R 1. N.C N.C. 2. C.L./SOFSAR 12. R SYNC. () C.S OUPU A 5. () C.S GROUND 6. N.C.. N.C. 7. () ERROR AMP V C 8. () ERROR AMP OUPU B 9. ENSAION 19. V IN 10. C SHUDOWN. he SG286 & SG86 is available shipped as tape & reel with the addition of a R suffix. 5. Hermetic Packages J, F, & L use Pb7/Sn6 hot solder lead finish, contact factory for availability of RoHS versions. 2

3 hermal Data Parameter Value Units Operating Junction emperature Hermetic (J, L, F Packages) 150 C Operating Junction emperature Plastic (N, DW Package) 150 C Storage emperature Range 65 to 150 C Lead emperature (Soldering, 10 Seconds) 00 C RoHS Peak Package Solder Reflow emp. (0 sec. max. exp.) 260 (0, 5) C 1. Values beyond which damage may occur. 2. Pin numbers refer to ceramic J package. hermal Data Parameter Value Units J Package: hermal ResistanceJunction to Case, θ JC 0 C/W hermal ResistanceJunction to Ambient, θ JA 80 C/W N Package: hermal ResistanceJunction to Case, θ JC 0 C/W hermal ResistanceJunction to Ambient, θ JA 65 C/W DW Package: hermal ResistanceJunction to Case, θ JC 0 C/W hermal ResistanceJunction to Ambient, θ JA 95 C/W F Package: hermal ResistanceJunction to Case, θ JC 70 C/W hermal ResistanceJunction to Ambient, θ JA 115 C/W L Package: hermal ResistanceJunction to Case, θ JC 5 C/W hermal ResistanceJunction to Ambient, θ JA 120 C/W Notes: 1. Junction emperature Calculation: J = A (P D x θ JA ). 2. he above numbers for θ JC are maximums for the limiting thermal resistance of the package in a standard mounting configuration. he θ JA numbers are meant to be guidelines for the thermal performance of the device/pcboard system. All of the above assume no ambient airflow. Recommended Operating Conditions Parameter Value Units Supply Voltage Range 8 to 0 V Collector Supply Voltage Range.5 to 0 V Source/Sink Output Current (continuous) 100 ma Source/Sink Output Current (peak 200ns) 200 ma Reference Load Current 0 to 10 ma Oscillator Frequency Range 1 to 500 khz Oscillator iming Resistor (R ) 2 to 100 kω Oscillator iming Capacitor (C ) 1 to 100 nf Operating Ambient emperature Range SG to 125 C SG to 85 C SG86 0 to 70 C Note: Range over which the device is functional.

4 Electrical Characteristics Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG186 with 55 C A 125 C, SG286 with 25 C A 85 C, SG86 with 0 C A 70 C, V IN = 15V. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. Symbol Parameter est Condition Reference Section SG186 SG286 SG86 Min yp Max Min yp Max Units Output Voltage J = 25 C, I O = 1mA V V REG Line Regulation V IN = 8V to 0V mv I REG Load Regulation I L = 1mA to 10mA mv emperature Stability mv/ C otal Output Variation 1 Line, Load and emperature V Output Noise Voltage 1 10Hz f 10kHz. J = 25 C µv Long erm Stability 1 J = 125 C, 1000Hrs. 5 5 mv VREF ISC Oscillator Section 6 Short Circuit Output Current = 0V ma OSC Initial Accuracy J = 25 C khz OSC VS Voltage Stability V IN = 8V to 0V % OSC S emperature Stability 1 Over Operating Range 1 1 % VOH Sync Output High Level V VOL Sync Output Low Level V VIH Sync Input High Level Pin 8 = 0V.9.9 V VIL Sync Input Low Level Pin 8 = 0V V IIL Sync Input Current Sync Voltage = 5.25V, Pin 8 = 0V ma

5 Electrical Characteristics Symbol Parameter est Condition Error AMP Section SG186 SG286 SG86 Min yp Max Min yp Max Units EA VOS Input Offset Voltage mv EA IIB Input Bias Current µa EA IOS Input Offset Current na EA CM Common Mode Range V IN = 8V to 0V 0 V IN 2V 0 V IN2V V EA AV Open Loop Voltage Gain V O = 1.2V to V, V CM = 2V db EA UGB Unity Gain Bandwidth 1 J = 25 C MHz EA CMRR CMRR V CM = 0V to 8V, V IN = 0V db EA PSRR PSRR V IN = 8V to 0V db EA SNK EA SRC EA VOH Output Sink Current Output Source Current High Level Output Voltage V ID = 15mV to 5V, V PIN 7 = 1.2V V ID = 15mV to 5V, V PIN 7 = 2.5V ma ma R L = 15kΩ (Pin 7) V EA VOL Low Level Output Voltage R L = 15kΩ (Pin 7) V Current Sense Amplifier Section CS AV Amplifier Gain 2 & V PIN = 0V, Pin 1 Open V Maximum Differential Input Signal 2 (V PIN V PIN ) Pin 1 Open R L = 15kΩ (Pin 7) V Input Offset Voltage 2 V PIN 1 = 0.5V, Pin 7 Open mv CS CMRR CMRR V CM = 1V to 12V db CS PSRR PSRR V IN = 8V to 0V db CS IIB Input Bias Current 2 V PIN 1 = 0.5V, Pin 7 Open µa CSI OC Input Offset Current 2 V PIN 1 = 0.5V, Pin 7 Open µa CS CM Input Common Mode Range 0 V IN 0 V IN V Delay to Outputs 1 J = 25 C ns Current Limit Adjust Section Current Limit Offset V PIN = 0, V PIN = 0V, Pin 7 Voltage 2 Open V CL IIB Input Bias Current V PIN 5 =, V PIN 6 = 0V µa 5

6 Symbol Parameter est Condition Shutdown erminal Section SG186 SG286 SG86 Min yp Max Min yp Max Units SD hreshold Voltage mv SD LC Input Voltage Range 0 V IN 0 V IN V Minimum Latching ma Current; (I PIN 1) Maximum NonLatching ma Current; (I PIN 1) SD DELAY Delay to Outputs 1 J = 25 C ns Output Section Collector Emitter Voltage Collector Leakage Current 0 0 V V C = 0V µa Output Low Level I SINK = 20mA V I SINK = 100mA V Output High Level I SOURCE = 20mA V I SOURCE = 100mA V Rise ime 1 C L = 1nF, J = 25 C ns Fall ime 1 C L = 1nF, J = 25 C ns UnderVoltage Lockout Section StartUp hreshold V hreshold Hysteresis V otal Standby Current IQ Supply Current ma Notes: 1. hese parameters, although guaranteed over the recommended operating conditions, are not tested in the production. 2. Parameter measured at trip point of latch with V PIN 5 =, V PIN 6 = 0V.. Amplifier gain defined as : V PIN = 0V to 1.0V. Current into Pin 1 guaranteed to latch circuit in shutdown state. 5. Current into Pin 1 guaranteed not to latch circuit in shutdown state. 6. R = 10kΩ, C =.7nF 6

7 Characteristic Curves Characteristic Curves REFERENCE VOLAGE (V) SHOR CIRCUI CURREN (ma) C.S. VOLAGE DIFFENIAL (V) O J = 125 C O J = 55 C JUNCION EMPERAURE ( O C) JUNCION EMPERAURE ( O C) ERROR AMPLIFIER OUPU VOLAGE (V) Figure 2 Reference Voltage Vs. emperature Figure Short Circuit Current Vs. emperature Figure Current Sense hreshold Vs. Error Amplifier Output CURREN SENSE GAIN (V/V) OSCILLAOR VALLEY VOLAGE (V) OSCILLAOR PEAK VOLAGE (V) JUNCION EMPERAURE ( O C) Figure 5 Current Sense Gain Vs. emperature JUNCION EMPERAURE ( O C) Figure 6 Oscillator Valley Voltage Vs. emperature JUNCION EMPERAURE ( O C) Figure 7 Oscillator Peak Voltage Vs. emperature LACH CURREN HRESHOLD (ma) V IN = 15 V CURREN SENSE DELAY (ns) (10% ABOVE HRESHOLD) SHUDOWN DELAY (ns) (10% ABOVE HRESHOLD) JUNCION EMPERAURE ( O C) JUNCION EMPERAURE ( O C) JUNCION EMPERAURE ( O C) Figure 8 Minimum SCR Latch Current Figure 9 Current Sense Delay Vs. emperature Figure 10 Shutdown Delay o Output Vs. emperature 7

8 5.0 INPU OFFSE VOLAGE (mv) ERROR AMP SINK CURREN (ma) SAURAION VOLAGE (V) = 55 C J = 25 C J = 125 C J JUNCION EMPERAURE ( O C) Figure 11 Error Amplifier Input Offset Voltage Vs. emperature JUNCION EMPERAURE ( O C) Figure 12 Error AMP Sink Current Vs. emperature OUPU CURREN (ma) Figure 1 Output ransistor Saturation Voltage Vs. Output Current (Sink ransistor) SAURAION VOLAGE (V) J= 125 C J= 55 C J= 25 C SYNC PULSEWIDH (ns) C = 0.001µF R = 8 kω SYNC PULSEWIDH (ns) C = 0.01µF R = 8 kω OUPU CURREN (ma) Figure 1 Output ransistor Saturation Voltage Vs. Output Current (Source ransistor) JUNCION EMPERAURE ( O C) Figure 15 Sync Pulsewidth Vs. emperature JUNCION EMPERAURE ( C) Figure Sync Pulsewidth Vs. emperature OSCILLAOR FREQUENCY (khz) C = 0.01µF R = 8 kω OSCILLAOR FREQUENCY (khz) C = 0.1µF R = 8 kω DUY CYCLE (%) C = 0.001µF R = 8 kω JUNCION EMPERAURE ( O C) Figure 17 Oscillator Frequency Vs. emperature JUNCION EMPERAURE ( O C) Figure 18 Oscillator Frequency Vs. emperature JUNCION EMPERAURE ( O C) Figure 19 Duty Cycle Vs. emperature 8

9 Application Information Application Information 100k 50k 20k C = 1 nf C = 2 nf C = 5 nf C = 10 nf C = 20 nf C = 50 nf C =.1 µf R (Ω) 10k 5k 2k 1k 10µsec 100µsec 1000µsec OSCILLAOR PERIOD (µs) Figure 20 Oscillator Frequency Curves 5 V V I R 1.2 V I R.7 V SAWOOH(Pin 8) C R OSC(Pin 10) I d Oscillator frequency is approximated by the formula: f ~ 2.2 R C OUPU DEADIME( ) D Figure 21 Oscillator Circuit 9

10 5 0.5 ma Z s 6 7 Z f I f < 0.5 ma Figure 22 Error Amp Output Configuration (Error amplifier can source up to 0.5 ma) I S R S R C CURREN SENSE Figure 2 Current Sense AMP Connections A small RC filter may be required in some applications to reduce switch transients. Differential input allows remote noise free switching. 10

11 Application Information SYNC 10 SG V IN V C 1 V IN 9 R OSC F/F NOR A OU 11 8 C 2 REF PWM LACH NOR B OU 1 V OU 0.5 ma INV NI EA 0.5 V I/A SENSE SENSE FEEDBACK 1 I LIMI SF/S GND 12 S/D SH/DN 50 mv Figure 2 Single Ended Boost Configuration SYNC 10 SG V IN V C 1 V IN 9 R OSC F/F NOR A OU 11 8 C 2 REF PWM LACH NOR B OU ma NI INV EA 0.5 V I/A SENSE SENSE V OU FEEDBACK 1 I LIMI SF/S GND 12 S/D SH/DN 50 mv Figure 25 Buck Converter with Current Sense Winding 11

12 SYNC 10 SG V IN V C 1 9 R OSC F/F NOR A OU 11 8 C 2 REF PWM LACH NOR B OU ma INV NI EA 0.5 V I/A SENSE SENSE FEEDBACK 1 I LIMI SF/S GND 12 S/D SH/DN 50 mv Figure 26 Push/Pull Converter with Slope Compensation I S () R S () I SENSE 0.5 ma x 0.5 V R 1 CURREN LIMI 1 E/A R 2 7 R R1R2 Peak Current (IS) is determined by the formula: IS = RS Figure 27 Pulse by Pulse Current Limiting 12

13 Application Information R 1 R 2 CURREN LIMI 1 I SS I SENSE ʃ 0.5 E/A S S C SHU DOWN 50 mv Figure 28 Soft Start and Shutdown/Restart Functions 0.5 V 0 ON OFF PWM CURREN LIMI (PIN 1) SHUDOWN (PIN ) ~ ~ ~ ~ < 0.8 ma R 1 Figure 29 Shutdown with AutoRestart If < 0.8 ma, the shutdown latch commutates. when I SS < 0.8 ma, a restart cycle will be initiated. ~ ~ ~ ~ R 1 > ma (LACHED OFF) Figure 0 Shutdown without AutoRestart (Latched) If > ma, the device will latch off until power is recycled. 1

14 Package Outline Dimensions Controlling dimensions are in inches, metric equivalents are shown for general information. Dim MILLIMEERS INCHES MIN MAX MIN MAX D A A A B H E c D E e 1.27 BSC 0.05 BSC e B L H L A A2 c θ *LC SEAING PLANE A1 *Lead co planarity Note: Dimensions do not include protrusions; these shall not exceed 0.155mm (.006 ) on any side. Lead dimension shall not include solder coverage. Figure 1 DW Pin SOWB Package Dimensions Dim MILLIMEERS INCHES MIN MAX MIN MAX A D A A2.0 yp yp. E1 b A2 1 b1 A A1 L E c b c D e 2.5 BSC BSC E E L e b SEAING PLANE θ Note: θ Dimensions do not include protrusions; these shall not exceed 0.155mm (.006 ) on any side. Lead dimension shall not include solder coverage. Figure 2 N Pin Plastic Dual Inline Package Dimensions 1

15 PACKAGE OULINE DIMENSIONS PACKAGE OULINE DIMENSIONS H E Seating Plane D b2 e b Q A L c ea θ Dim Note: MILLIMEERS INCHES MIN MAX MIN MAX A b b c D E e 2.5 BSC BSC ea H L α Q Dimensions do not include protrusions; these shall not exceed 0.155mm (.006 ) on any side. Lead dimension shall not include solder coverage. Figure J Pin Ceramic Dual Inline Package Dimensions E D A A1 L2 8 E L Dim MILLIMEERS INCHES MIN MAX MIN MAX D/E E e BSC BSC B YP YP L A h 1.0 YP 0.00 YP A A L B 0.20R 0.008R 1 1 Note: All exposed metalized area shall be gold plated 60 microinch minimum thickness over nickel plated unless otherwise specified in purchase order. A2 h 18 B1 e B Figure L 20Pin Ceramic Leadless Chip Carrier (LCC) Package Outline Dimensions 15

16 PACKAGE OULINE DIMENSIONS Controlling dimensions are in inches, metric equivalents are shown for general information. Dim MILLIMEERS INCHES MIN MAX MIN MAX B e A Q L L E E C L S1 D A b c D E E e 1.27 BSC BSC L Q S Note: 1. Lead No. 1 is identified by tab on lead or dot on cover. 2. Leads are within 0.1mm (.0005 ) radius of the true position (P) at maximum material condition.. Dimension e determines a zone within which all body and lead irregularities lie. Figure 5 F Pin Ceramic Flatpack Package Dimensions

17 Microsemi Corporate Headquarters One Enterprise, Aliso Viejo, CA USA Within the USA: 1 (800) 7111 Outside the USA: 1 (99) Sales: 1 (99) Fax: 1 (99) sales.support@microsemi.com 201 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include highperformance and radiationhardened analog mixedsignal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world s standard for time; voice processing devices; RF solutions; discrete components; security technologies and scalable antitamper products; PoweroverEthernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has approximately,00 employees globally. Learn more at Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. he products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with missioncritical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any endproducts. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer s responsibility to independently determine suitability of any products and to test and verify the same. he information provided by Microsemi hereunder is provided as is, where is and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice. SG /11.1