C URRENT M ODE PWM C ONTROLLER R ST I ST SG3842 PACKAGE ORDER INFO. T A ( C) M RoHS / Pb-free Transition DC: 0503 RoHS / Pb-free Transition DC:0440

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1 TM SG1842/SG1843 Series C URRENT M ODE PWM C ONTROLLER P R O D U I O N D A T A S H E E T DESCRIPTION The family of control IC's provides all the necessary features to implement off-line fixed frequency, current-mode switching power supplies with a minimum number of external components. Current-mode architecture demonstrates improved line regulation, improved load regulation, pulseby-pulse current limiting and inherent protection of the power supply output switch. The bandgap reference is trimmed to ±1% over temperature. Oscillator discharge current is trimmed to less than ±10%. The has under-voltage lockout, current limiting circuitry and start-up current of less than 1mA. The totem-pole output is optimized to drive the gate of a power MOSFET. The output is low in the off state to provide direct interface to an N channel device. The is specified for operation over the full military ambient temperature range of - 55 C to 125 C. The SG2842/43 is specified for the industrial range of -25 C to 85 C, and the SG3842/43 is designed for the commercial range of 0 C to 70 C. IMPORTANT: For the most current data, consult MICROSEMI s website: AC INPUT PRODUCT HIGHLIGHT R ST I ST SG3842 KEY FEATURES OPTIMIZED FOR OFF-LINE CONTROL LOW START-UP CURRENT (<1mA) AUTOMATIC FEED FORWARD COMPENSATION TRIMMED OSCILLATOR DISCHARGE CURRENT PULSE-BY-PULSE CURRENT LIMITING ENHANCED LOAD RESPONSE CHARACTERISTICS UNDER-VOLTAGE LOCKOUT WITH 6V HYSTERESIS (SG1842 only) DOUBLE-PULSE SUPPRESSION HIGH-CURRENT TOTEM-POLE OUTPUT (1AMP PEAK) INTERNALLY TRIMMED BANDGAP REFERENCE 500KHZ OPERATION UNDERVOLTAGE LOCKOUT SG volts SG volts LOW SHOOT-THROUGH CURRENT <75mA OVER TEMPERATURE HIGH RELIABILITY FEATURES AVAILABLE TO MIL-STD-883B AND DSCC SCHEDULED FOR MIL-M38510 QPL LISTING RADIATION DATA AVAILABLE Microsemi LEVEL "S" PROCESSING AVAILABLE PACKAGE ORDER INFO T A ( C) M Plastic DIP Plastic DIP Plastic SOIC Plastic SOIC Ceramic Dip Ceramic DIP Cer Flatpack Ceramic LCC 8-Pin N 14-Pin DM 8-Pin D 14-Pin Y 8-Pin J 14-Pin F 10-Pin L 20-Pin RoHS / Pb-free Transition DC: 0503 RoHS / Pb-free Transition DC: to 70 SG3842M SG3842N SG3842DM SG3842D SG3842Y SG3842J SG3843M SG3843N SG3843DM SG3843D SG3843Y SG3842J -25 to 85 SG2842M SG2842N SG2842DM SG2842D SG2842Y SG2842J SG2843M SG2843N SG2843DM SG2843D SG2843Y SG2843J -55 to SG1842Y SG1842J SG1842F SG1842L 125 SG1843Y SG1843J SG1843F SG1842L MIL- SG1842Y/883B SG1842J/883B SG1842F/883B SG1842L/883B STD/883 SG1843Y/883B SG1843J/883B SG1843F/883B SG1843L/883B DESC SG1842Y/DESC SG1842J/DESC SG1842F/DESC SG1842L/DESC SG1843Y/DESC SG1843J/DESC SG1843F/DESC SG1843L/DESC Note: Available in Tape & Reel. Append the letters TR to the part number. (i.e. SG2843DM-TR) Plastic packages are RoHS compliant Rev. 1.6b Microsemi Analog Mixed Signal Group Western Avenue, Garden Grove, CA , , Fax:

2 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 ABSOLUTE MAXIMUM RATINGS (Notes 1 & 2) Supply Voltage (I CC < 30mA)...Self Limiting Supply Voltage (Low Impedance Source)... 30V Output Current (Peak)...±1A Output Current (Continuous) mA Output Energy (Capacitive Load)... 5µJ Analog Inputs (Pins 2, 3) V to +6.3V Error Amp Output Sink Current... 10mA Power Dissipation at T A = 25 C (DIL-8)... 1W Operating Junction Temperature Hermetic (J, Y, F, L Packages) C Plastic (N, M, D, DM Packages) C Storage Temperature Range C to +150 C Lead Temperature (Soldering, 10 Seconds) C Pb-free / RoHS Peak Package Solder Reflow Temp. (40 second max. exposure) C (+0, -5) Note 1. Exceeding these ratings could cause damage to the device. Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified terminal. THERMAL DATA M PACKAGE: 95 C/W N PACKAGE: 65 C/W DM PACKAGE: 165 C/W D PACKAGE: 120 C/W Y PACKAGE: 130 C/W J PACKAGE: 80 C/W F PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, θ JC 80 C/W 145 C/W L PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, θ JC 35 C/W 120 C/W Junction Temperature Calculation: T J = T A + (P D x θ JA ). The θ JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. PACKAGE PIN OUTS COMP I SENSE / OUTPUT GND M & Y PACKAGE (Top View) M Package: Pb-free / RoHS 100% Matte Tin Lead Finish COMP I SENSE / OUTPUT GND DM PACKAGE (Top View) Pb-free / RoHS 100% Matte Tin Lead Finish COMP 1 14 N.C N.C N.C V C I SENSE 5 10 OUTPUT N.C. 6 9 GND / 7 8 PWR GND D PACKAGE (Top View) Pb-free / RoHS 100% Matte Tin Lead Finish COMP N.C. N.C. I SENSE N.C. / N.C. V C OUTPUT GROUND POWER GND J & N PACKAGE (Top View) N Package: Pb-free / RoHS 100% Matte Tin Lead Finish 1. COMP I SENSE 4. / 5. POWER GND F PACKAGE (Top View) L PACKAGE (Top View) 1. N.C. 2. COMP 3. N.C. 4. N.C N.C. 7. I SENSE 8. N.C. 9. N.C. 10. / V C 7. OUTPUT 6. GND 11. N.C. 12. GROUND 13. N.C. 14. N.C. 15. OUTPUT 16. N.C N.C. 19. N.C

3 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series Supply Voltage Range Output Current (Peak) Output Current (Continuous) Analog Inputs (Pin 2, Pin 3) Error Amp Output Sink Current Oscillator Frequency Range Oscillator Timing Resistor Oscillator Timing Capacitor Operating Ambient Temperature Range: SG2842/43 SG3842/43 Note 3. Range over which the device is functional. RECOMMENDED OPERATING CONDITIONS (Note 3) Recommended Operating Conditions Parameter Symbol Units Min. Typ. Max. 30 V ±1 A 200 ma V 5 ma khz KΩ µf C C 0 70 C ELECTRICAL CHARACTERISTICS (Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1842/SG1843 with -55 C T A 125 C, SG2842/ SG2843 with -25 C T A 85 C, SG3842/SG3843 with 0 C T A 70 C, = 15V (Note 7), = 10kΩ, and = 3.3nF. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Parameter Symbol Test Conditions SG2842/43 SG3842/43 Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units Reference Section Output Voltage T J = 25 C, I O = 1mA V Line Regulation 12 25V mv Load Regulation 1 I O 20mA mv mv/ C V µv mv ma Temperature Stability (Note 4) Total Output Variation (Note 4) Line, Load, Temp. Output Noise Voltage (Note 4) V N 10Hz f 10kHz, T J = 25 C Long Term Stability (Note 4) T A = 125 C, 1000hrs Output Short Circuit Oscillator Section Initial Accuracy T J = 25 C Voltage Stability 12 25V Temperature Stability (Note 4) T MIN T A T MAX Amplitude V RT/CT (Peak to Peak) Discharge Current T J = 25 C T MIN T A T MAX Error Amp Section Input Voltage V COMP = 2.5V Input Bias Current Open Loop Gain A VOL 2 V O 4V Unity Gain Bandwidth (Note 4) T J = 25 C Power Supply Rejection Ratio PSRR 12 25V Output Sink Current V VFB = 2.7V, V COMP = 1.1V Output Source Current V VFB = 2.3V, V COMP = 5V V OUT High V VFB = 2.3V, R L = 15K to gnd V OUT Low V VFB = 2.7V, R L = 15K to (Electrical Characteristics continue next page.) khz % % V ma ma V µa db MHz db ma ma V V 3

4 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 ELECTRICAL CHARACTERISTICS (Cont'd.) Parameter Symbol Test Conditions Current Sense Section Gain (Notes 5 & 6) Maximum Input Signal (Note 5) V COMP = 5V Power Supply Rejection Ratio (Note 5) PSRR 12 25V Input Bias Current Delay to Output (Note 4) Output Section Output Low Level I SINK = 20mA I SINK = 200mA Output High Level I SOURCE = 20mA I SOURCE = 200mA Rise Time T J = 25 C, C L = 1nF Fall Time T J = 25 C, C L = 1nF Under-Voltage Lockout Section Start Threshold Min. Operation Voltage After Turn-On PWM Section Maximum Duty Cycle Minimum Duty Cycle Power Consumption Section Start-Up Current Operating Supply Current Zener Voltage = V ISENSE = 0V I CC = 25mA Notes: 4. These parameters, although guaranteed, are not 100% tested in production. 5. Parameter measured at trip point of latch with V VFB = 0. SG2842/43 SG3842/43 Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units V/V V db µa ns V V V V ns ns V V V V % % ma ma V 6. Gain defined as: A = V COMP V ISENSE ; 0 V ISENSE 0.8V. 7. Adjust above the start threshold before setting at 15V. 4

5 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series BLOCK DIAGRAM * GROUND** 34V 16V (1842) 8.4V (1843) 2.5V UVLO 6V (1842) 0.8V (1843) S / R 5V REF INTERNAL BIAS 5.0V 50mA GOOD LOGIC V C * / OSCILLATOR OUTPUT COMP CURRENT SENSE ERROR AMP 2R R 1V S R CURRENT SENSE COMPARATOR PWM LATCH POWER GROUND** * - and V C are internally connected for 8 pin packages. ** - POWER GROUND and GROUND are internally connected for 8 pin packages. 5

6 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 GRAPH / CURVE INDEX Characteristic Curves FIGURE # 1. DROPOUT VOLTAGE vs. TEMPERATURE 2. OSCILLATOEMPERATURE STABILITY 3. CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE 4. OUTPUT DUTY CYCLE vs. TEMPERATURE 5. START-UP CURRENT vs. TEMPERATURE 6. REFERENCE VOLTAGE vs. TEMPERATURE 7. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE 8. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE 9. OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE 10. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND TEMPERATURE (SINK TRANSISTOR) 11. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT 12. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND TEMPERATURE (SOURCE TRANSISTOR) FIGURE INDEX Application Information FIGURE # 13. OSCILLATOIMING CIRCUIT 14. OSCILLATOR FREQUENCY vs. FOR VARIOUS Typical Applications Section FIGURE # 15. CURRENT SENSE SPIKE SUPPRESSION 16. MOSFET PARASITIC OSCILLATIONS 17. BIPOLARANSISTOR DRIVE 18. ISOLATED MOSFET DRIVE 19. ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH SOFTSTART 20. EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION 21. OSCILLATOR CONNECTION 22. ERROR AMPLIFIER CONNECTION 23. SLOPE COMPENSATION 24. OPEN LOOP LABORATORY FIXTURE 25. OFF-LINE FLYBACK REGULATOR 6

7 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CHARACTERISTIC CURVES FIGURE 1. DROPOUT VOLTAGE vs. TEMPERATURE FIGURE 2. OSCILLATOEMPERATURE STABILITY 2 Minimum Operating Voltage - (V) SG1843 SG1842 Frequency Drift - (%) = 15V Duty Cycle = 50% FIGURE 3. CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE FIGURE 4. OUTPUT DUTY CYCLE vs. TEMPERATURE kHz Current Sense Delay - (ns) V PIN3 = 1.1V Output Duty Cycle - (%) kHz 48 50kHz kHz 200kHz 50kHz

8 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 CHARACTERISTIC CURVES FIGURE 5. START-UP CURRENT vs. TEMPERATURE FIGURE 6. REFERENCE VOLTAGE vs. TEMPERATURE Start-Up Current - (ma) SG1842 Reference Voltage - (V) = 15V 0.2 SG FIGURE 7. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE FIGURE 8. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE Reference Voltage - (V) SG1843 Start Up Voltage - (V) SG

9 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CHARACTERISTIC CURVES FIGURE 9. OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE 8.2 FIGURE 10. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT & TEMPERATURE 2.5 Oscillator Discharge Current - (ma) Saturation Voltage - (V) C +25 C +125 C = 15V Duty Cycle < 5% Output Current - (ma) FIGURE 11. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT 1.0 FIGURE 12. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT & TEMPERATURE 0.9 Current Sense Threshold - (V) C -55 C 125 C Saturation Voltage - (V) = 15V Duty Cycle < 5% +25 C +125 C -55 C +125 C +25 C Error Amp Output Voltage - (V) Output Current - (ma) 9

10 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 APPLICATION INFORMATION OSCILLATOR The oscillator of the 1842/43 family of PWM's is designed such that many values of and will give the same oscillator frequency, but only one combination will yield a specific duty cycle at a given frequency. Given: Frequency f Maximum Duty Cycle D m (1.76) 1/D m -1 Calculate: = 267 (Ω) (1.76) (1-D m)/d m - 1 where.3 < D m <.95 A set of formulas are given to determine the values of and for a given frequency and maximum duty cycle. (Note: These formulas are less accurate for smaller duty cycles or higher frequencies. This will require trimming of or to correct for this error.) Example: A Flyback power supply requires a maximum of 45% duty cycle at a switching frequency of 50kHz. What are the values of and? Given: f = 50kHz D m = 0.45 (1.76) 1/ Calculate: = 267 (1.76).55/.45-1 = 674Ω = 1.86 * D m f * (µf) = 1.86 * * 674 =.025µF 1000 For Duty-Cycles above 95% use: = 680 = 2k 100 = 5k = 10k / GND f - (khz) 10 = 20k = 30k = 50k = 70k = 100k F 1.86 where 5kΩ Value - (µf) FIGURE 13 OSCILLATOIMING CIRCUIT FIGURE 14 OSCILLATOR FREQUENCY vs. FOR VARIOUS 10

11 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series TYPICAL APPLICATION CIRCUITS Pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package. 7 (12) 7 (12) 7 (11) 6 (10) Q1 7 (11) 6 (10) R 1 Q1 5 (8) R I PK 3 (5) C R S I PK(MAX) = 1.0V R S 5 (8) R S 3 (5) FIGURE 15. CURRENT-SENSE SPIKE SUPPRESSION The RC low pass filter will eliminate the leading edge current spike caused by parasitics of Power MOSFET. FIGURE 16. MOSFET PARASITIC OSCILLATIONS A resistor (R 1 ) in series with the MOSFET gate reduce overshoot and ringing caused by the MOSFET input capacitance and any inductance in series with the gate drive. (Note: It is very important to have a low inductance ground path to insure correct operation of the I.C. This can be done by making the ground paths as short and as wide as possible.) I B V C R (12) Isolation Boundary V C1 R 1 R 2 _ 7 (11) Q1 V C 7 (11) 6 (10) 5 (8) R 2 V C1 C 1 R 1 Q1 6 (10) 5 (8) 3 (5) C R R S N S N P Waveforms + 0 _ 50% DC + _0 25% DC 3 (5) FIGURE 17. BIPOLARANSISTOR DRIVE The 1842/43 output stage can provide negative base current to remove base charge of power transistor (Q 1 ) for faster turn off. This is accomplished by adding a capacitor (C 1 ) in parallel with a resistor (R 1 ). The resistor (R 1 ) is to limit the base current during turn on. R S V (PIN 1) I PK = 3R S N P N S FIGURE 18. ISOLATED MOSFET DRIVE Current transformers can be used where isolation is required between PWM and Primary ground. A drive transformer is then necessary to interface the PWM output with the MOSFET. 11

12 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 TYPICAL APPLICATION CIRCUITS (continued) 8 (14) 4 (7) 2 (3) 7 (12) 7 (11) 6 (10) Q1 I R A R B TIMER 3 8 (14) 4 (7) 1N4148 R 2 1 (1) MPSA63 5 (8) 3 (5) V CS 2 1 C R 1 5 (9) R S 5 (9) V CS R 1 I PK = Where: V CS = 1.67 and V C.S.MAX = 1V (Typ.) R S R 1 +R 2 f = 1.44 (RA + 2R V t SOFTSTART = -ln 1 - EAO R 1 R B )C 2 C R 5 1 R 1 +R R 2 R 1 +R 2 f = B RA + 2R B To other SGX842/43 where; V EAO voltage at the Error Amp Output under minimum line and maximum load conditions. FIGURE 19. ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH SOFTSTART Softstart and adjustable peak current can be done with the external circuitry shown above. FIGURE 20. EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION Precision duty cycle limiting as well as synchronizing several 1842/ 1843's is possible with the above circuitry. 2.8V 5V 8 (14) 1.1V 2.5V 4 (7) 0.5mA R i 2 (3) 1 (1) Discharge Current I d = 8.2mA R F R F 10K FIGURE 21. OSCILLATOR CONNECTION The oscillator is programmed by the values selected for the timing components and. Refer to application information for calculation of the component values. FIGURE 22. ERROR AMPLIFIER CONNECTION Error amplifier is capable of sourcing and sinking current up to 0.5mA. 12

13 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series TYPICAL APPLICATION CIRCUITS (continued) 7(12) 5V V O 8(14) UVLO 5V S R 5V REF 2N222A 2.5V INTERNAL BIAS GOOD LOGIC 7(11) R SLOPE 4(7) OSCILLATOR Q1 From V O R i R d C F 2(3) R F ERROR AMP 2R R 1V C.S. COMP PWM LATCH 6(10) 5(8) R 1(1) 5(9) 3(5) C R S FIGURE 23. SLOPE COMPENSATION Due to inherent instability of current mode converters running above 50% duty cycle, a slope compensation should be added to either current sense pin or the error amplifier. Figure 23 shows a typical slope compensation technique. 2N2222 A 4.7K 100K 1 COMP 8 1K ERROR AMP ADJUST 4.7K 5K 2 3 I SENSE OUTPUT µF 0.1µF 1K OUTPUT I SENSE ADJUST 4 GROUND 5 GROUND FIGURE 24. OPEN LOOP LABORATORY FIXTURE High-peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3. 13

14 SG1842/SG1843 Series PRODUCT DATABOOK 1996/1997 TYPICAL APPLICATION CIRCUITS (continued) 4.7 1W TI USD 735 AC INPUT µF 250V 56k 1W 1N pF 400V 1N µF 10V 5V 2-5A 16V 3.6k 20k 150k 100pF SG1842 COMP OUT 0.01µF 27 20k 10µF 20V UFN432 1N pF 2.5k T1: Coilcraft E b Primary - 97 turns single AWG 24 Secondary - 4 turns 4 parallel AWG 22 Control - 9 turns 3 parallel AWG µF 10k.0047µF / GND CUR SEN 1k 470pF 0.85 ISOLATION BOUNDARY FIGURE 25. OFF-LINE FLYBACK REGULATOR SPECIFICATIONS Input line voltage: 90VAC to 130VAC Input frequency: 50 or 60Hz Switching frequency: 40KHz ±10% Output power: 25W maximum Output voltage: 5V +5% Output current: 2 to 5A Line regulation: 0.01%/V Load regulation: 8%/A* 25 Watts, = 90VAC: 70% = 130VAC: 65% Output short-circuit current: 2.5Amp average * This circuit uses a low-cost feedback scheme in which the DC voltage developed from the primary-side control winding is sensed by the SG1842 error amplifier. Load regulation is therefore dependent on the coupling between secondary and control windings, and on transformer leakage inductance. 14