Output format same as L, except that when HP1 or HP2 is active, it will clear CP1. VDD GND. Rx IN OSC HP1 CODE 2 HP2 SC9149AL/ 9149AHN HP3 HP4 SP2

Transcription

1 INFRARED REMOTE CONTROL RECEIVER DESCRIPTION The are CMOS LSIs designed for use on the infrared remote control receiver, and when this LSI is used in combination with SC4A for transmitter, the remote control system can be constructed. The SC4A is DIP- type and is capable of controlling 0 functions, while the SC0A is DIP-4 type and is capable of controlling functions. SC4A DIP- FEATURES * Able to output parallel multiple keying signals sent from the transmitter (The SC4A is able to output parallel up to 5 functions, while the SC0A is able to output parallel up to functions.) * Output for single pulse, hold pulse and cyclic pulse are provided. (cyclic pulse is available only for SC0A) * A single terminal type oscillator by means of CR is provided. * Code detection circuit provided for code check with the transmitter prevents inter-ferences from various types of machines and apparatus. SC0A DIP-4 ORDERING INFORMATION SC4A Advanced version DIP- package SC4AL Advanced Dependent cyclic (toggle) Outputs SC4AHN Inversed Rxin input Output format same as L, except that when HP or HP is active, it will clear CP. SC0A Advanced version DIP-4 package PIN CONFIGURATION GND 4 Rx IN 3 GND GND HP 3 CODE Rx IN Rx IN HP 4 CODE HP 3 4 CODE HP 3 4 CODE HP3 5 0 SP HP HP3 4 5 SC4A 3 CODE 3 SP HP HP3 4 5 SC4AL/ 4AHN 3 CODE 3 SP HP4 HP5 SC0A SP HP4 SP HP4 SP HP SP4 HP5 0 HP5 0 CP SP5 SP5 SP4 CP CP CP 0 SP SP0 4 SP SP 3 SP

2 BLOCK DIAGRAM GND Rx IN Input shift register Up Counter Shift register Data Check HP HP HP3 Input Pulse counter Latch Circuit HP4 HP5 Code Check Error Detection Output Buffer SP5 SP CODE CODE 3 SP SP SC4A Block Diagram GND Rx IN Input shift register Up Counter Shift register Data Check HP HP HP3 Input Pulse counter Latch Circuit HP4 HP5 Code Check Error Detection Output Buffer CP CP CODE CODE 3 SP SP SC4AL/4AHN Block Diagram

3 4 3 GND Rx IN 3 HP Up Counter 4 HP 5 HP3 Input shift register Shift register Data Check HP4 HP5 Input Pulse counter Latch Circuit HP CP 0 CP Code Check Error Detection Output Buffer SP0 SP CODE CODE 3 4 SP SP SP SP5 SP4 0 SP SP SC0A Block Diagram ABSOLUTE MAXIMUM RATINGS(Ta=5 C) Characteristic Symbol Value Unit Supply Voltage 0 ~.0 V Input / Output Voltage VIN,VOUT Vss-0.3V ~ +0.3V V Power Dissipation PD 00 mw Operating Temperature Tamb -0 ~ +5 C Storage Temperature Tstg -55 ~ +5 C ELECTRICAL CHARACTERISTICS(Tamb=5 C =5.0V,Unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Operating Supply Voltage Ta=5 ~ 5 C V Operating Supply Current IDD Output without Load.0 ma Standard Frequency Sfosc 3 khz Oscillation Frequency fosc 5 khz Variance Of Oscillation Frequency Vfosc =4.5~5.5V -5 5 % By Variance Of Oscillation Frequency By Temperature Tfosc Ta=-30~+5 C -5 5 % Output Current H Level IOH All output, VOH=4.0V -.0 ma L Level IOL All Output, VOL=V.0 ma Input Current H Level IIH CODE Terminal, VIH=5.0V µa Pull-Up Resistor Rup CODE Terminal kω Input Circuit Threshold Voltage VIN Rx Terminal V Hysteresis Width VHIS Rx Terminal 0. V 3

4 PIN DESCRIPTION Pin No. SC4AL Symbol Terminal SC4A SC0A /4AHN GND GND Rx IN 3~ 3~ ~ -- ~ ~0 -- ~0 -- ~ ~0 HP ~HP5 HP ~HP CP ~CP SP ~ SP ~SP5 SP ~SP0 Receiving signal input Continuous signal output Cyclic signal output Single-shot signal output 3,4 3~4 ~ CODE Code input 3 4 Timing oscillation Power supply Function /operation Instruction signal with carrier signal eliminated is input. As long as receiving signal is input, this output is held at H level When receiving signal is input, output is reversed. When receiving signal is input, output is placed at H level only for a fixed time.(about 0msec) Transmitter code is compared with a code set at this terminal and if they agree each other, input is accepted. A resistor and a capacitor are parallel connected between this terminal and GND. Input/output configuration Built-in pull-up resistor. 4

5 FUNCTIONAL DESCRIPTION. ILLATION CIRCUIT Timing with transmitter signal and internal operating clock are all decided by this oscillator. C osc R The oscillator has been so far constructed through a combination of a linear amplifier by means of CMOS inverter in IC and 455kHz ceramic resonator ;however, when series are used, a stable oscillator can be constructed by parallel connecting C and R between the oscillator and GND by a single terminal oscillator. Oscillation frequency is about 3KHz±5 khz at R=3kΩ and C=000pF. (Refer to SCILLATION Frequency Characteristic below ) Oscillator frequency vs. resistor and capacitor =5V R=3kΩ 0 =5V C=000pF Oscillator frequency (khz) Oscillator frequency (khz) Capacitor (pf) Resistor (kω. RECEIVING SIGNAL INPUT CIRCUIT Vcc Amp. Det. Rx 5

6 Signal received by the light receiving element is sent through the amplifier to the detector where 3 khz carrier wave is eliminated and is input into the receiving signal input circuit. The receiving signal input circuit (Rx IN ) has a built-in Schmitt circuit for shaping receiving signal waveform to eliminate rounding. 3. RECEIVING SIGNAL CHECK The receiving signal check is to check cycle transmitting signal sent from the transmitter to determine if it is normal signal. RECEIVING SIGNAL BITS BITS FIRST DATA SECOND DATA First, the first data is stored in the -bits shift register. Then, when the second data is put into the shift register, data is forced out of the shift register by one bit, where the first data has been stored. Now, pushed out data and incoming data to see if they are same. If an error is caused in the receiving data -bits check, the system is reset at that point of time. Conversely, when all receiving data are OK, output is raised from "L" level to "H" level. Reader DATA "" Reader DATA "0" RECEIVEING DATA 0.4ms 0.4ms SHIFT PULSE CHECK PULSE The status of receiving data, shift pulse and check pulse is shown above. Shift pulse is provided in the data center by taking frequency margins of the transmitter and the receiver into consideration. 4.Code Comparison To prevent interference with other models, C, C and C3 code bits are provided for checking whether the transmitter and receiver codes agree each other. Only when both codes agreed, internal latch strobe pulse is generated to latch receiving data and output is raised from 'L" level. if both codes do not agree, no latch strobe pulse is generated and output remains at "L" level. Code bits used differ depending upon receiver as shown below : CODE BIT C C C3 C 0 0 C,C3 are used for SC4A/4AL/4AHN C,C are used for SC0A. Code bit 0, 0 can not be used.

7 5.INITIALIZATION In order to initialize the internal status at time of power ON, it is necessary to perform the initialization. The initialization is carried out when a capacitor is connected to the code bit terminal. INITIALIZE Rup C C Rup C3 Rup=0kΩ Typical) C=0.00µF~0.0µF C NOTE: * In case of SC4A series, connect a capacitor to C and C. * A capacitor for initialization is unnecessary for the terminal for which code bit 0 is selected. However, code bit 0, 0 can not be used. Either one terminal must be set at H.. EXPLANATION OF OUTPUT PULSE SP,HP,CP -. SP~SP5 (SINGLE PULSE) SINGLE-SHOT KEY ON Bits Bits Tx OUT LATCH STROBE PULSE SINGLE PULSE OUTPUT About 0msec After checking -bits receiving data, if data agree and OK, single pulse is output. Output is raised from L level to H level and returned again to L level after about 0msec. -. HP~HP5 (Hold pulse) CONTINUOUS KEY ON Bits Bits Bits Bits Tx OUT LATCH STROBE PULSE HOLD PULSE OUTPUT About 0msec Hold pulse is output by the first latch strobe pulse after key ON. Output is kept at H level as long as continuous signal is Input. When the key is released and continuous signal is stopped, about 0msec later, output is reversed to L by the last latch strobe pulse. Further, HP~HP5 are able to parallely and simultaneously maximum sextet outputs at H level by continuous signal sent from the transmitter. These outputs are optimum as outputs of REC-PLAY,REC-PAUSE, and CUE/REVIEW of tape deck.

8 -3. CP,CP ( Cyclic Pulse) KEY ON Bits Bits Bits Bits TX OUT LATCH STROBE PULSE CYCLIC OUTPUT When single-shot signal received, cyclic pulse output is reversed. This cyclic pulse is used for power ON/OFF, MUTE etc..code ALLOCATION (KEY NO. IS FOR SC4A) DATA BIT Key No. H S S K K K3 K4 K5 K FUNCTION OF INSTRUCTION Continuous Signal HP Continuous Signal HP Continuous Signal HP Continuous Signal HP Continuous Signal HP Continuous Signal HP Single-shot signal SP Single-shot signal SP Single-shot signal Single-shot signal SP Single-shot signal SP Single-shot signal SP Single-shot signal SP Single-shot signal SP Single-shot signal SP Single-shot signal SP Cyclic Signal CP Cyclic Signal CP C~C3 code bits are available in addition to the above data bits for optional selection. SC0A can use all keys, but SC4A is able to use KEY~5 and KEY ~ only for 0 commands. SC4AL/4AHN is able to use KEY~5 and KEY ~, KEY ~ only for 0 commands.

9 TYPICAL APPLICATION CIRCUIT. SC4A CIRCUIT 0µF C R C 000pF C3 000pF SP Control signal SP SP4 SC4A GND Rx IN HP HP HP3 HP4 HP5 SP kΩ Rx Input Control signal R should be 3kΩ±5% C should be polypropylene film capacitor having good temperature characteristics 000pF±5%.. SC4AL/4AHN CIRCUIT 0µF C R C 000pF C3 000pF SP SC4AL/ 4AHN Control signal SP CP GND Rx IN HP HP HP3 HP4 HP5 CP kΩ Rx Control signal Input R should be 3kΩ±5% C should be polypropylene film capacitor having good temperature characteristics 000pF±5%.

10 3. SC0A CIRCUIT Control signal 0µF R C 000pF 000pF C C 4 3 SP SP SP4 SP5 SP SP SP SC0A GND Rx IN HP HP HP3 HP4 HP5 HP CP CP SP0 SP kΩ Rx Input Control signal R should be 3kΩ±5%. C should be polypropylene film capacitor having good temperature characteristics 000pF±5%. NOTE FOR APPLICATION CIRCUIT. COMBINATION OF SC4A/SC4A / AL / AHN CODE BITS SC4A CODE T3 (C3) T (C) T (C) 3 0 K~K5 Code: C=C=,C3=0 4 Code (C) 3 Code3 (C3) SP~SP5 Code: C=,C3=0 SC4A / AL / AHN Example (C= and C3=0) The combination of code bits of SC4A and SC4A is shown in the following table. SC4A SC4A / AL / AHN C C C3 C C

11 To make code bit to on SC4A, connect diode to CODE terminal from T~T3 terminal. To set Code bit 0, open the circuit. SC4A has C and C3 code terminal. Code bit of C has been pulled up in IC and C is always kept at status. Therefore, on transmitter SC4A it is necessary to keep C code bit at. Example is the external circuit diagram when Code bit C= and C3=0.. COMBINATION OF SC4A/SC0A CODE BITS SC4A CODE T3 (C3) T (C) T (C) 3 0 K~K0 Code: C=C3=,C=0 Code (C) Code (C) SP~SP0 Code: C=,C=0 SC0A Example (C= and C=0) The combination of code bits of SC4A and SC0A is shown in the following table. SC4A SC0A C C C3 C C On SC0A, C3 code has been pulled up in IC and always kept at status. Therefore, it is necessary to keep Code Bit C3 of transmitter SC4A at. To keep Code Bit C3 at, connect a diode to CODE terminal from T3 terminal. 4. Note for Input Signal If input voltage above +0.3V may possibly be applied to Rx Input Terminal( Pin), connect resistor of about 0kΩ in series to Rx Input terminal in order to prevent latch-up.

12 PACKAGE OUTLINE DIP UNIT:mm degree 0.4 DIP UNIT:mm degree