Package. Applications

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1 5V / 6V High Voltage 3-phase Motor Driver ICs SIM68M Series Data Sheet Description The SIM68M series are high voltage 3-phase motor driver ICs in which transistors, a pre-driver IC (MIC), and bootstrap circuits (diodes and resistors) are highly integrated. These products can run on a 3-shunt current detection system and optimally control the inverter systems of small- to medium-capacity motors that require universal input standards. Features Built-in Bootstrap Diodes with Current Limiting Resistors (6 Ω) CMOS-compatible Input (3.3 V or 5 V) Bare Lead Frame: Pb-free (RoHS Compliant) Isolation Voltage: 15 V (for 1 min) UL-recognized Component (File No.: E11837) (SIM688M UL Recognition Pending) Fault Signal Output at Protection Activation (FO Pin) High-side Shutdown Signal Input (SD Pin) Protections Include: Overcurrent Limit (OCL): Auto-restart Overcurrent Protection (OCP): Auto-restart Undervoltage Lockout for Power Supply High-side (UVLO_VB): Auto-restart Low-side (UVLO_VCC): Auto-restart Thermal Shutdown (TSD): Auto-restart Typical Application (SIM681xM) Package DIP4 Mold Dimensions: 36. mm 14.8 mm 4. mm Selection Guide V DSS /V CES I O Feature 5 V 6 V A Leadform 2971 Not to scale Part Number SIM6811M 2.5 A Power MOSFET SIM6812M 3. A SIM6813M 3. A 5. A 2 4 IGBT with FRD, low switching dissipation 1 SIM688M SIM6822M SIM6827M VCC HIN3 HIN2 HIN1 VCC1 17 COM1 16 HIN3 15 HIN2 14 HIN1 13 SD 12 VB1A 21 VB1B 3 2 VB2 23 VB3 28VBB 31 U CBOOT1 CBOOT2 CBOOT3 VDC Applications For motor drives such as: Refrigerator Compressor Motor Fan Motor and Pump Motor for Washer and Dryer Fan Motor for Air Conditioner, Air Purifier, and Electric Fan Controller LIN3 LIN2 LIN1 5 V RFO Fault OCL 1 LIN3 LIN2 LIN1 COM2 VCC2 FO OCP MIC 19 V 26 V1 35 V2 W W2 M CFO RO LS1 11 LS2 2 LS3A LS2 LS3B CS CDC RS GND CO SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 1 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

2 SIM68M Series Contents Description Contents Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Characteristics of Control Parts Bootstrap Diode Characteristics Thermal Resistance Characteristics Transistor Characteristics SIM6811M SIM6812M SIM6813M SIM688M SIM6822M SIM6827M Mechanical Characteristics Insulation Distance Truth Table Block Diagrams Pin Configuration Definitions Typical Applications Physical Dimensions Marking Diagram Functional Descriptions Turning On and Off the IC Pin Descriptions U, V, V1, V2, W1, and W VB1A, VB1B, VB2, and VB VCC1 and VCC COM1 and COM HIN1, HIN2, and HIN3; LIN1, LIN2, and LIN VBB LS1, LS2, LS3A, and LS3B OCP and OCL SD FO Protection Functions Fault Signal Output Shutdown Signal Input Undervoltage Lockout for Power Supply (UVLO) Overcurrent Limit (OCL) Overcurrent Protection (OCP) Thermal Shutdown (TSD) Design Notes PCB Pattern Layout Considerations in Heatsink Mounting Considerations in IC Characteristics Measurement Calculating Power Losses and Estimating Junction Temperatures IGBT SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 2 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

3 SIM68M Series IGBT Steady-state Loss, P ON IGBT Switching Loss, P SW Estimating Junction Temperature of IGBT Power MOSFET Power MOSFET Steady-state Loss, P RON Power MOSFET Switching Loss, P SW Body Diode Steady-state Loss, P SD Estimating Junction Temperature of Power MOSFET Performance Curves Transient Thermal Resistance Curves Performance Curves of Control Parts Performance Curves of Output Parts Output Transistor Performance Curves Switching Losses Allowable Effective Current Curves SIM6811M SIM6812M SIM6813M SIM688M SIM6822M SIM6827M Short Circuit SOAs (Safe Operating Areas) Pattern Layout Example Typical Motor Driver Application Important Notes SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 3 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

4 SIM68M Series 1. Absolute Maximum Ratings Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming out of the IC (sourcing) is negative current ( ). Unless specifically noted, T A = 25 C, COM1 = COM2 = COM. Parameter Symbol Conditions Rating Unit Remarks Main Supply Voltage (DC) V DC VBB LSx Main Power Voltage (Surge) V DC(SURGE) VBB LSx IGBT / Power MOSFET Breakdown Voltage Logic Supply Voltage V DSS V CC = 15 V, I D = 1 µa, V IN = V 5 V CES V CC = 15 V, I C = 1 ma, V IN = V 6 V CC VCCx COM 2 VB1B U, V BS VB2 V, 2 VB3 W1 2 Output Current (1) I O T C = 25 C, T j < 15 C Output Current (Pulse) I OP T C = 25 C, V CC = 15 V, P W 1 ms, single pulse Input Voltage V IN HINx COM, LINx COM.5 to 7 V FO Pin Voltage V FO FO COM.5 to 7 V OCP Pin Voltage V OCP OCP COM 1 to 5 V V V V V SIM681xM SIM682xM SIM688M SIM681xM SIM682xM SIM688M SIM681xM SIM682xM SIM688M SIM6811M 2.5 SIM6812M 3 A SIM6813M SIM688M 5 SIM6822M SIM6827M 3 SIM6811M 3.75 SIM6812M 4.5 A SIM6813M SIM688M 7.5 SIM6822M SIM6827M SD Pin Voltage V SD SD COM.5 to 7 V Operating Case Temperature (2) T C(OP) 3 to 1 C Junction Temperature (3) T j 15 C Storage Temperature T stg 4 to 15 C Isolation Voltage (4) V ISO(RMS) Between surface of the case and each pin; AC, 6 Hz, 1 min 15 V (1) Should be derated depending on an actual case temperature. See Section (2) Refers to a case temperature measured during IC operation. (3) Refers to the junction temperature of each chip built in the IC, including the controller IC (MIC), transistors, and fast recovery diodes. (4) Refers to voltage conditions to be applied between the case and all pins. All pins have to be shorted. SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 4 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

5 SIM68M Series 2. Recommended Operating Conditions Unless specifically noted, COM1 = COM2 = COM. Parameter Symbol Conditions Min. Typ. Max. Unit Remarks Main Supply Voltage V DC VBB COM 3 4 V Logic Supply Voltage Input Voltage (HINx, LINx, OCP, SD, FO) Minimum Input Pulse Width V CC VCCx COM V V BS VB1B U, VB2 V, VB3 W V V IN 5.5 V t IN(MIN)ON.5 μs t IN(MIN)OFF.5 μs Dead Time of Input Signal t DEAD 1.5 μs FO Pin Pull-up Resistor R FO kω FO Pin Pull-up Voltage V FO V FO Pin Noise Filter Capacitor C FO.1.1 μf Bootstrap Capacitor C BOOT 1 22 μf I P 3 A 39 SIM6811M I P 3.75 A 27 SIM6812M Shunt Resistor R S I mω SIM6813M P 4.5 A 27 SIM688M I P 7.5 A 15 SIM6822M SIM6827M RC Filter Resistor R O 1 Ω SIM6822M 1 22 SIM6827M RC Filter Capacitor C O pf SIM688M SIM6811M 1 1 SIM6812M SIM6813M PWM Carrier Frequency f C 2 khz Operating Case Temperature T C(OP) 1 C SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 5 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

6 SIM68M Series 3. Electrical Characteristics Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming out of the IC (sourcing) is negative current ( ). Unless specifically noted, T A = 25 C, V CC = 15 V, COM1 = COM2 = COM. 3.1 Characteristics of Control Parts Parameter Symbol Conditions Min. Typ. Max. Unit Remarks Power Supply Operation Logic Operation Start Voltage Logic Operation Stop Voltage Logic Supply Current Input Signal High Level Input Threshold Voltage (HINx, LINx, SD, FO) Low Level Input Threshold Voltage (HINx, LINx, SD, FO) High Level Input Current (HINx, LINx) Low Level Input Current (HINx, LINx) Fault Signal Output FO Pin Voltage at Fault Signal Output FO Pin Voltage in Normal Operation Protection OCL Pin Output Voltage (L) OCL Pin Output Voltage (H) Current Limit Reference Voltage V CC(ON) VCCx COM V V BS(ON) VB1B U, VB2 V, VB3 W V V CC(OFF) VCCx COM V V BS(OFF) I CC I BS VB1B U, VB2 V, VB3 W1 VCC1 = VCC2, VCC pin current in 3-phase operation VB1B U or VB2 V or VB3 W1; HINx = 5 V; VBx pin current in 1-phase operation V ma 14 4 μa V IH V V IL V I IH V IN = 5 V 23 5 μa I IL V IN = V 2 μa V FOL V FO = 5 V, R FO = 1 kω.5 V V FOH V FO = 5 V, R FO = 1 kω 4.8 V V OCL(L).5 V V OCL(H) V V LIM V OCP Threshold Voltage V TRIP V OCP Hold Time t P 2 25 μs OCP Blanking Time t BK(OCP) 2 μs Current Limit Blanking Time t BK(OCL) 2 μs SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 6 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

7 SIM68M Series TSD Operating Temperature TSD Releasing Temperature Parameter Symbol Conditions Min. Typ. Max. Unit Remarks T DH C T DL C 3.2 Bootstrap Diode Characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Remarks Bootstrap Diode Leakage Current Bootstrap Diode Forward Voltage Bootstrap Diode Series Resistor I LBD V R = 5 V 1 μa V FB I FB =.15 A V R BOOT Ω 3.3 Thermal Resistance Characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Remarks Junction-to-Case Thermal Resistance (1) Junction-to-Ambient Thermal Resistance R j-c R (j-c)q (2) R (j-c)f (3) R j-a All power MOSFETs operating 3.6 C/W SIM681xM All IGBTs operating 3.6 C/W All freewheeling diodes operating All power MOSFETs operating 4.2 C/W SIM682xM SIM688M SIM682xM SIM688M 25 C/W SIM681xM R (j-a)q All IGBTs operating 25 C/W R (j-a)f All freewheeling diodes operating 29 C/W SIM682xM SIM688M SIM682xM SIM688M (1) Refers to a case temperature at the measurement point described in Figure 3-1, below. (2) Refers to steady-state thermal resistance between the junction of the built-in transistors and the case. For transient thermal characteristics, see Section (3) Refers to steady-state thermal resistance between the junction of the built-in freewheeling diodes and the case. SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 7 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

8 SIM68M Series 4 Measurement point 21 5 mm 1 2 Figure 3-1. Case Temperature Measurement Point 3.4 Transistor Characteristics Figure 3-2 provides the definitions of switching characteristics described in this and the following sections. HINx/ LINx t off I D / I C t d(on) t rr t on t t d(off) t f r 9% V DS / V CE 1% Figure 3-2. Switching Characteristics Definitions SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 8 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

9 SIM68M Series SIM6811M Parameter Symbol Conditions Min. Typ. Max. Unit Drain-to-Source Leakage Current I DSS V DS = 5 V, V IN = V 1 µa Drain-to-Source On Resistance R DS(ON) I D = 1. A, V IN = 5 V Ω Source-to-Drain Diode Forward Voltage V SD I SD =1. A, V IN = V V High-side Switching Source-to-Drain Diode Reverse t Recovery Time rr 15 ns Turn-on Delay Time t V DC = 3 V, I C = 1. A, d(on) 77 ns inductive load, Rise Time t r V IN = 5 V or 5 V, 7 ns Turn-off Delay Time t d(off) T j = 25 C 69 ns Fall Time t f 3 ns Low-side Switching Source-to-Drain Diode Reverse t Recovery Time rr 15 ns Turn-on Delay Time t V DC = 3 V, I C = 1. A, d(on) 69 ns inductive load, Rise Time t r V IN = 5 V or 5 V, 9 ns Turn-off Delay Time t d(off) T j = 25 C 65 ns Fall Time t f 5 ns SIM6812M Parameter Symbol Conditions Min. Typ. Max. Unit Drain-to-Source Leakage Current I CES V DS = 5 V, V IN = V 1 µa Drain-to-Source On Resistance V CE(SAT) I D = 1.25 A, V IN = 5 V Ω Source-to-Drain Diode Forward Voltage High-side Switching V F I SD =1.25 A, V IN = V V Source-to-Drain Diode Reverse t Recovery Time rr 14 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 1.25 A, 91 ns inductive load, Rise Time t r V IN = 5 V or 5 V, 1 ns Turn-off Delay Time t T j = 25 C d(off) 7 ns Fall Time t f 4 ns Low-side Switching Source-to-Drain Diode Reverse t Recovery Time rr 155 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 1.25 A, 875 ns inductive load, Rise Time t r V IN = 5 V or 5 V, 11 ns Turn-off Delay Time t T j d(off) = 25 C 775 ns Fall Time t f 35 ns SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 9 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

10 SIM68M Series SIM6813M Parameter Symbol Conditions Min. Typ. Max. Unit Drain-to-Source Leakage Current I DSS V DS = 5 V, V IN = V 1 µa Drain-to-Source On Resistance R DS(ON) I D = 1.5 A, V IN = 5 V Ω Source-to-Drain Diode Forward Voltage High-side Switching V SD I SD =1.5 A, V IN = V V Source-to-Drain Diode Reverse t Recovery Time rr 17 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 1.5 A, 82 ns inductive load, Rise Time t r V IN = 5 V or 5 V, 1 ns Turn-off Delay Time t T j d(off) = 25 C 81 ns Fall Time t f 5 ns Low-side Switching Source-to-Drain Diode Reverse t Recovery Time rr 18 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 1.5 A, 76 ns inductive load, Rise Time t r V IN = 5 V or 5 V, 13 ns Turn-off Delay Time t d(off) T j = 25 C 75 ns Fall Time t f 5 ns SIM688M Parameter Symbol Conditions Min. Typ. Max. Unit Collector-to-Emitter Leakage Current I CES V CE = 3 V, V IN = V 1 ma Collector-to-Emitter Saturation Voltage V CE(SAT) I C = 3. A, V IN = 5 V V Diode Forward Voltage V F I F = 3. A, V IN = V V High-side Switching Diode Reverse Recovery Time t rr 1 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 3. A, 88 ns Rise Time t r inductive load, V IN = 5 V or 5 V, 12 ns Turn-off Delay Time t d(off) T j = 25 C 74 ns Fall Time t f 21 ns Low-side Switching Diode Reverse Recovery Time t rr 1 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 3. A, 82 ns Rise Time t r inductive load, V IN = 5 V or 5 V, 14 ns Turn-off Delay Time t d(off) T j = 25 C 66 ns Fall Time t f 2 ns SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 1 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

11 SIM68M Series SIM6822M Parameter Symbol Conditions Min. Typ. Max. Unit Collector-to-Emitter Leakage Current I CES V CE = 6 V, V IN = V 1 ma Collector-to-Emitter Saturation Voltage V CE(SAT) I C = 5 A, V IN = 5 V V Diode Forward Voltage V F I F = 5 A, V IN = V V High-side Switching Diode Reverse Recovery Time t rr 8 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 5 A, 74 ns Rise Time t r inductive load, V IN = 5 V or 5 V, 7 ns Turn-off Delay Time t d(off) T j = 25 C 57 ns Fall Time t f 1 ns Low-side Switching Diode Reverse Recovery Time t rr 8 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 5 A, 69 ns Rise Time t r inductive load, V IN = 5 V or 5 V, 1 ns Turn-off Delay Time t d(off) T j = 25 C 54 ns Fall Time t f 1 ns SIM6827M Parameter Symbol Conditions Min. Typ. Max. Unit Collector-to-Emitter Leakage Current I CES V CE = 6 V, V IN = V 1 ma Collector-to-Emitter Saturation Voltage V CE(SAT) I C = 5 A, V IN = 5 V V Diode Forward Voltage V F I F = 5 A, V IN = V V High-side Switching Diode Reverse Recovery Time t rr 1 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 5 A, 13 ns Rise Time t r inductive load, V IN = 5 V or 5 V, 18 ns Turn-off Delay Time t d(off) T j = 25 C 59 ns Fall Time t f 15 ns Low-side Switching Diode Reverse Recovery Time t rr 1 ns Turn-on Delay Time t d(on) V DC = 3 V, I C = 5 A, 13 ns Rise Time t r inductive load, V IN = 5 V or 5 V, 24 ns Turn-off Delay Time t d(off) T j = 25 C 54 ns Fall Time t f 15 ns SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 11 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

12 SIM68M Series 4. Mechanical Characteristics Parameter Conditions Min. Typ. Max. Unit Remarks Heatsink Mounting Screw Torque * N m Flatness of Heatsink Attachment Area See Figure μm Package Weight 5.2 g * When mounting a heatsink, it is recommended to use a metric screw of M2.5 and a plain washer of 6. mm (φ) together at each end of it. For more details about screw tightening, see Section Measurement position Heatsink Heasink Figure 4-1. Flatness Measurement Position 5. Insulation Distance Parameter Conditions Min. Typ. Max. Unit Remarks Clearance Between heatsink* and mm Creepage leads. See Figure mm * Refers to when a heatsink to be mounted is flat. If your application requires a clearance exceeding the maximum distance given above, use an alternative (e.g., a convex heatsink) that will meet the target requirement. Creepage Heatsink Clearance Figure 5-1. Insulation Distance Definitions SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 12 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

13 SIM68M Series 6. Truth Table Table 6-1 is a truth table that provides the logic level definitions of operation modes. In the case where HINx and LINx signals in each phase are high at the same time, both the high- and low-side transistors become on (simultaneous on-state). Therefore, HINx and LINx signals, the input signals for the HINx and LINx pins, require dead time setting so that such a simultaneous on-state event can be avoided. After the IC recovers from a UVLO_VCC condition, the low-side transistors resume switching in accordance with the input logic levels of the LINx signals (level-triggered), whereas the high-side transistors resume switching at the next rising edge of an HINx signal (edge-triggered). After the IC recovers from a UVLO_VB condition, the high-side transistors resume switching at the next rising edge of an HINx signal (edge-triggered). Normal Operation Table 6-1. Truth Table for Operation Modes Mode HINx LINx High-side Transistor Low-side Transistor External Shutdown Signal Input FO = Low Level Undervoltage Lockout for High-side Power Supply (UVLO_VB) Undervoltage Lockout for Low-side Power Supply (UVLO_VCC) Overcurrent Protection (OCP) Overcurrent Limit (OCL) (OCL = SD) Thermal Shutdown (TSD) L L OFF OFF H L ON OFF L H OFF ON H H ON ON L L OFF OFF H L ON OFF L H OFF OFF H H ON OFF L L OFF OFF H L OFF OFF L H OFF ON H H OFF ON L L OFF OFF H L OFF OFF L H OFF OFF H H OFF OFF L L OFF OFF H L ON OFF L H OFF OFF H H ON OFF L L OFF OFF H L OFF OFF L H OFF ON H H OFF ON L L OFF OFF H L ON OFF L H OFF OFF H H ON OFF SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 13 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

14 SIM68M Series 7. Block Diagrams VB1B 3 VCC1 17 UVLO UVLO UVLO UVLO VB1A VB2 VB3 VBB HIN3 HIN2 HIN1 SD COM1 OCL LIN3 LIN2 LIN1 COM2 VCC2 FO Input Logic Input Logic (OCP reset) UVLO High Side Level Shift Driver Thermal Shutdown Low Side Driver 24 W1 19 V 26 V1 31 U 35 V2 37 W2 11 LS1 33 LS2 2 LS2 4 LS3B 1 LS3A OCP 3 OCP and OCL Figure 7-1. SIM681xM VB1B 3 VCC1 17 UVLO UVLO UVLO UVLO VB1A VB2 VB3 VBB HIN3 HIN2 HIN1 SD COM1 OCL LIN3 LIN2 LIN1 COM2 VCC2 FO Input Logic Input Logic (OCP reset) UVLO High Side Level Shift Driver Thermal Shutdown Low Side Driver 24 W1 19 V 26 V1 31 U 35 V2 37 W2 11 LS1 33 LS2 2 LS2 4 LS3B 1 LS3A OCP 3 OCP and OCL Figure 7-2. SIM682xM or SIM688xM SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 14 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

15 SIM68M Series 8. Pin Configuration Definitions Top view Pin Number Pin Name Description 1 LS3A W-phase IGBT emitter, or power MOSFET source 2 LS2 V-phase IGBT emitter, or power MOSFET source 3 OCP Overcurrent protection signal input 4 FO Fault signal output and shutdown signal input 5 VCC2 Low-side logic supply voltage input 6 COM2 Low-side logic ground 7 LIN1 Logic input for U-phase low-side gate driver 8 LIN2 Logic input for V-phase low-side gate driver 9 LIN3 Logic input for W-phase low-side gate driver 1 OCL Overcurrent limit signal input 11 LS1 U-phase IGBT emitter, or power MOSFET source 12 SD High-side shutdown signal input 13 HIN1 Logic input for U-phase high-side gate driver 14 HIN2 Logic input for V-phase high-side gate driver 15 HIN3 Logic input for W-phase high-side gate driver 16 COM1 High-side logic ground 17 VCC1 High-side logic supply voltage input 18 (Pin removed) 19 V V-phase high-side floating supply voltage input, bootstrap capacitor connection for V-phase 2 VB2 V-phase high-side floating supply voltage input 21 VB1A U-phase high-side floating supply voltage input 22 (Pin removed) 23 VB3 W-phase high-side floating supply voltage input 24 W1 W-phase output (connected to W2 externally) 25 NC (No connection) 26 V1 V-phase output (connected to V2 externally) 27 (Pin removed) 28 VBB Positive DC bus supply voltage 29 NC (No connection) 3 VB1B U-phase high-side floating supply voltage input 31 U U-phase output 32 (Pin removed) 33 LS2 (Pin trimmed) V-phase IGBT emitter, or power MOSFET source 34 (Pin removed) 35 V2 V-phase output (connected to V1 externally) 36 NC (No connection) 37 W2 W-phase output (connected to W1 externally) 38 (Pin removed) 39 (Pin removed) 4 LS3B W-phase IGBT emitter, or power MOSFET source SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 15 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

16 SIM68M Series 9. Typical Applications CR filters and Zener diodes should be added to your application as needed. This is to protect each pin against surge voltages causing malfunctions, and to avoid the IC being used under the conditions exceeding the absolute maximum ratings where critical damage is inevitable. Then, check all the pins thoroughly under actual operating conditions to ensure that your application works flawlessly. V CC C BOOT2 VB2 V VCC VB1A VB3 GND HIN3 HIN2 HIN1 Controller LIN3 LIN2 LIN1 Fault 5 V R FO C FO R O COM1 16 HIN3 15 HIN2 14 HIN1 13 SD 12 LS1 11 OCL 1 LIN3 LIN2 LIN1 COM2 VCC2 FO OCP LS2 LS3A MIC W1 V1 VBB VB1B U LS2 V2 W2 LS3B C BOOT1 C BOOT3 M C S V DC C DC C O R S Figure 9-1. SIM681xM Typical Application Using a Single Shunt Resistor V CC C BOOT2 VB2 V VCC VB1A VB3 GND HIN3 HIN2 HIN1 Controller LIN3 LIN2 LIN1 Fault C FO 5 V R FO C O1 C O2 R O1 R O2 COM1 16 HIN3 15 HIN2 14 HIN1 13 SD 12 LS1 11 OCL 1 LIN3 LIN2 LIN1 COM2 VCC2 FO OCP LS2 LS3A MIC W1 V1 VBB VB1B U LS2 V2 W2 LS3B C BOOT1 C BOOT3 M C S V DC C DC R O3 C O3 R S2 R S1 R S3 Figure 9-2. SIM681xM Typical Application Using Three Shunt Resistors SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 16 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

17 SIM68M Series 1. Physical Dimensions DIP4 Package 1.15 max. 2-R ± ± ±.15 Top view Pin 1 indicator ± ± ± Gate burr φ3.2± ±.1 ±.3 36 ± ± ± ±.3 (Ends of pins) NOTES: 1.7 min. - Dimensions in millimeters - Bare lead frame: Pb-free (RoHS compliant) - The leads illustrated above are for reference only, and may not be actual states of being bent. - Maximum gate burr height is.3 mm. Reference Through Hole Size and Layout 4 21 φ1.1 typ typ Center of screw hole Pin pich: Unit: mm SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 17 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

18 SIM68M Series 11. Marking Diagram 4 21 S I M 6 8 x x M Part Number Y M D D X 1 2 Lot Number: Y is the last digit of the year of manufacture ( to 9) M is the month of the year (1 to 9, O, N, or D) DD is the day of the month (1 to 31) X is the control number SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 18 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

19 SIM68M Series 12. Functional Descriptions Unless specifically noted, this section uses the following definitions: All the characteristic values given in this section are typical values. All the circuit diagrams listed in this section represent the type of IC that incorporates power MOSFETs. All the functional descriptions in this section are also applicable to the type of IC that incorporates IGBTs. For pin and peripheral component descriptions, this section employs a notation system that denotes a pin name with the arbitrary letter x, depending on context. Thus, the VCCx pin is used when referring to either or both of the VCC1 and VCC2 pins. The COM1 pin is always connected to the COM2 pin Turning On and Off the IC The procedures listed below provide recommended startup and shutdown sequences. To turn on the IC properly, do not apply any voltage on the VBB, HINx, and LINx pins until the VCCx pin voltage has reached a stable state (V CC(ON) 12.5 V). It is required to charge bootstrap capacitors, C BOOTx, up to full capacity at startup (see Section ). To turn off the IC, set the HINx and LINx pins to logic low (or L ), and then decrease the VCCx pin voltage Pin Descriptions U, V, V1, V2, W1, and W2 These pins are the outputs of the three phases, and serve as the connection terminals to the 3-phase motor. The V1 and W1 pins must be connected to the V2 and W2 pins on a PCB, respectively. The U, V (V1) and W1 pins are the grounds for the VB1A (VB1B), VB2, and VB3 pins. The U, V and W1 pins are connected to the negative nodes of bootstrap capacitors, C BOOTx. The V pin is internally connected to the V1 pin. Since high voltages are applied to these output pins (U, V, V1, V2, W1, and W2), it is required to take measures for insulating as follows: Keep enough distance between the output pins and low-voltage traces. Coat the output pins with insulating resin VB1A, VB1B, VB2, and VB3 These pins are connected to bootstrap capacitors for the high-side floating supply. In actual applications, use either of the VB1A or VB1B pin because they are internally connected. Voltages across the VBx and these output pins should be maintained within the recommended range (i.e., the Logic Supply Voltage, V BS ) given in Section 2. A bootstrap capacitor, C BOOTx, should be connected in each of the traces between the VB1A (VB1B) and U pins, the VB2 and V pins, the VB3 and W1 (W2) pins. For proper startup, turn on the low-side transistor first, then charge the bootstrap capacitor, C BOOTx, up to its maximum capacity. For the capacitance of the bootstrap capacitors, C BOOTx, choose the values that satisfy Equations (1) and (2). Note that capacitance tolerance and DC bias characteristics must be taken into account when you choose appropriate values for C BOOTx. C BOOTx (µf) > 8 t L(OFF) (1) 1 µf C BOOTx 22 µf (2) In Equation (1), let t L(OFF) be the maximum off-time of the low-side transistor (i.e., the non-charging time of C BOOTx ), measured in seconds. Even while the high-side transistor is not on, voltage across the bootstrap capacitor keeps decreasing due to power dissipation in the IC. When the VBx pin voltage decreases to V BS(OFF) or less, the high-side undervoltage lockout (UVLO_VB) starts operating (see Section ). Therefore, actual board checking should be done thoroughly to validate that voltage across the VBx pin maintains over 11. V (V BS > V BS(OFF) ) during a lowfrequency operation such as a startup period. As Figure 12-1 shows, a bootstrap diode, D BOOTx, and a current-limiting resistor, R BOOTx, are internally placed in series between the VCC1 and VBx pins. Time constant for the charging time of C BOOTx, τ, can be computed by Equation (3): τ = C BOOTx R BOOTx, (3) where C BOOTx is the optimized capacitance of the bootstrap capacitor, and R BOOTx is the resistance of the current-limiting resistor (6 Ω ± 25%). SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 19 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

20 SIM68M Series D BOOT1 R BOOT1 D BOOT2 R BOOT2 D BOOT3 R BOOT3 VB1B 3 VB2 2 VB3 23 C BOOT1 C BOOT2 HINx Set V CC 17 VCC1 5 VCC2 16 COM1 6 COM2 MIC HO3 HO2 HO1 VBB U 19 V 26 V1 37 W2 24 W1 M C BOOT3 V DC Reset VBx HSx Q V BS(ON) V BS(OFF) Stays logic high Figure Bootstrap Circuit Figure Waveforms at VBx HSx Voltage Drop Figure 12-2 shows an internal level-shifting circuit. A high-side output signal, HOx, is generated according to an input signal on the HINx pin. When an input signal on the HINx pin transits from low to high (rising edge), a Set signal is generated. When the HINx input signal transits from high to low (falling edge), a Reset signal is generated. These two signals are then transmitted to the high-side by the level-shifting circuit and are input to the SR flip-flop circuit. Finally, the SR flip-flop circuit feeds an output signal, Q (i.e., HOx). Figure 12-3 is a timing diagram describing how noise or other detrimental effects will improperly influence the level-shifting process. When a noise-induced rapid voltage drop between the VBx and output pins (U, V or W1; hereafter VBx HSx ) occurs after the Set signal generation, the next Reset signal cannot be sent to the SR flip-flop circuit. And the state of an HOx signal stays logic high (or H ) because the SR flip-flop does not respond. With the HOx state being held high (i.e., the high-side transistor is in an on-state), the next LINx signal turns on the low-side transistor and causes a simultaneously-on condition, which may result in critical damage to the IC. To protect the VBx pin against such a noise effect, add a bootstrap capacitor, C BOOTx, in each phase. C BOOTx must be placed near the IC, and be connected between the VBx and HSx pins with a minimal length of traces. To use an electrolytic capacitor, add a.1 μf to.1 μf bypass capacitor, C Px, in parallel near these pins used for the same phase VCC1 and VCC2 These are the power supply pins for the built-in control IC. The VCC1 and VCC2 pins must be externally connected on a PCB because they are not internally connected. To prevent malfunction induced by supply ripples or other factors, put a.1 μf to.1 μf ceramic capacitor, C VCC, near these pins. To prevent damage caused by surge voltages, put an 18 V to 2 V Zener diode, DZ, between the VCCx and COMx pins. Voltages to be applied between the VCCx and COMx pins should be regulated within the recommended operational range of V CC, given in Section 2. V CC DZ C VCC 17 VCC1 5 VCC2 16 COM1 6 COM2 MIC Figure VCCx Pin Peripheral Circuit HINx COM1 U1 16 Input logic Pulse generator Set Reset S R Q HOx VBx HSx Figure Internal Level-shifting Circuit COM1 and COM2 These are the logic ground pins for the built-in control IC. The COM1 and COM2 pins should be connected externally on a PCB because they are not internally connected. Varying electric potential of the logic ground can be a cause of improper operations. Therefore, connect the logic ground as close and short as possible to shunt resistors, R Sx, at a single-point ground (or star ground) which is separated from the power ground (see Figure 12-5). SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 2 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

21 SIM68M Series U1 VBB 28 C S V DC slightly lower than the output voltage of the microcontroller. Table Input Signals for HINx and LINx Pins 16 COM1 6 COM2 OCP Connect COM1 and COM2 on a PCB. LS1 LS2 LS3A R S1 R S2 R S3 C DC Create a single-point ground (a star ground) near R Sx, but keep it separated from the power ground. Parameter High Level Signal Low Level Signal Input Voltage 3 V < V IN < 5.5 V V < V IN <.5 V Input Pulse.5 μs.5 μs Width PWM Carrier 2 khz Frequency Dead Time 1.5 μs Figure Connections to Logic Ground HIN1, HIN2, and HIN3; LIN1, LIN2, and LIN3 These are the input pins of the internal motor drivers for each phase. The HINx pin acts as a high-side controller; the LINx pin acts as a low-side controller. Figure 12-6 shows an internal circuit diagram of the HINx or LINx pin. This is a CMOS Schmitt trigger circuit with a built-in 2 kω pull-down resistor, and its input logic is active high. Input signals across the HINx COMx and the LINx COMx pins in each phase should be set within the ranges provided in Table 12-1, below. Note that dead time setting must be done for HINx and LINx signals because the IC does not have a dead time generator. The higher PWM carrier frequency rises, the more switching loss increases. Hence, the PWM carrier frequency must be set so that operational case temperatures and junction temperatures have sufficient margins against the absolute maximum ranges, specified in Section 1. If the signals from the microcontroller become unstable, the IC may result in malfunctions. To avoid this event, the outputs from the microcontroller output line should not be high impedance. Also, if the traces from the microcontroller to the HINx or LINx pin (or both) are too long, the traces may be interfered by noise. Therefore, it is recommended to add an additional filter or a pull-down resistor near the HINx or LINx pin as needed (see Figure 12-7). Here are filter circuit constants for reference: - R IN1x : 33 Ω to 1 Ω - R INx : 1 kω to 1 kω - C INx : 1 pf to 1 pf HINx (LINx) COM1 (COM2) Figure Input signal Controller U1 Figure VBB 2 kω 2 kω 2 kω 5 V Internal Circuit Diagram of HINx or LINx Pin R IN1x R IN2x U1 C INx HINx/ LINx SIM68xxM Filter Circuit for HINx or LINx Pin This is the input pin for the main supply voltage, i.e., the positive DC bus. All of the IGBT collectors (power MOSFET drains) of the high-side are connected to this pin. Voltages between the VBB and COMx pins should be set within the recommended range of the main supply voltage, V DC, given in Section 2. To suppress surge voltages, put a.1 μf to.1 μf bypass capacitor, C S, near the VBB pin and an electrolytic capacitor, C DC, with a minimal length of PCB traces to the VBB pin. Care should be taken when adding R IN1x and R IN2x to the traces. When they are connected each other, the input voltage of the HINx and LINx pins becomes SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 21 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

22 SIM68M Series LS1, LS2, LS3A, and LS3B These are the emitter (source) pins of the low-side IGBTs (power MOSFETs). For current detection, the LS1, LS2, and LS3 (LS3B) pins should be connected externally on a PCB via shunt resistors, R Sx, to the COMx pin. In actual applications, use either of the LS3A or LS3B pin because they are internally connected. When connecting a shunt resistor, place it as near as possible to the IC with a minimum length of traces to the LSx and COMx pins. Otherwise, malfunction may occur because a longer circuit trace increases its inductance and thus increases its susceptibility to improper operations. In applications where long PCB traces are required, add a fast recovery diode, D RSx, between the LSx and COMx pins in order to prevent the IC from malfunctioning. U1 16 COM1 6 COM2 VBB 28 LS1 11 LS2 LS3A 2 1 C S Add a fast recovery diode to a long trace. Figure OCP and OCL D RS1 D RS2 D RS3 R S1 R S2 R S3 C DC Put a shunt resistor near the IC with a minimum length to the LSx pin. Connections to LSx Pin V DC The OCP pin serves as the input for the overcurrent protections which monitor the currents going through the output transistors. In normal operation, the OCL pin logic level is low. In case one or more of the protections listed below are activated by an OCP input signal, the OCL pin logic level becomes high. If the OCL pin is connected to the SD pin so that the SD pin will respond to the OCL input signal, the high-side transistors can be turned off when the protections (OCP and OCL) are activated. Overcurrent Limit (OCL) When the OCP pin voltage exceeds the Current Limit Reference Voltage, V LIM, the OCL pin logic level becomes high. While the OCL is in working, the output transistors operate according to an input signal (HINx or LINx). If the OCL pin is connected to the SD pin, the high-side transistors can be turned off. For a more detailed OCL description, see Section Overcurrent Pprotection (OCP) This function detects inrush currents larger than those detected by the OCL. When the OCP pin voltage exceeds the OCP Threshold Voltage, V TRIP, the IC operates as follows: the OCL pin = logic high, the lowside transistors = off, the FO pin = logic low. In addition, if the OCL pin is connected to the SD pin, the high-side transistors can be turned off. For a more detailed OCP description, see Section SD When a 5 V or 3.3 V signal is input to the SD pin, the high-side transistors turn off independently of any HINx signals. This is because the SD pin does not respond to a pulse shorter than an internal filter of 3.3 μs (typ.). The SD-OCL pin connection, as described in Section , allows the IC to turn off the high-side transistors at OCL or OCP activation. Also, connecting the FO and SD pins permits all the high- and low-side transistors to turn off owing to an inverted signal from the FO pin, even if the IC falls into an abnormal condition in which some or all of the protections (TSD, OCP, UVLO) are activated FO This pin operates as the fault signal output and the low-side shutdown signal input. Sections and explain the two functions in detail, respectively. Figure 12-9 illustrates a schematic diagram of the FO pin and its peripheral circuit. INT V FO R FO C FO Figure U1 FO COM 5 Ω Q FO 2 kω 5 V 1 MΩ 3. µs (typ.) Blanking filter Output SW turn-off and Q FO turn-on Internal Circuit Diagram of FO Pin and Its Peripheral Circuit Because of its open-collector nature, the FO pin should be tied by a pull-up resistor, R FO, to the external power supply. The external power supply voltage (i.e., the FO Pin Pull-up Voltage, V FO ) should range from 3. V to 5.5 V. When the pull-up resistor, R FO, has a too small resistance, the FO pin voltage at fault signal output becomes high due to the saturation voltage drop of a built-in transistor, Q FO. Therefore, it is recommended to use a 3.3 kω to 1 kω pull-up resistor. To suppress noise, add a filter capacitor, C FO, near the IC with minimizing a SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 22 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

23 SIM68M Series trace length between the FO and COMx pins. To avoid the repetition of OCP activations, the external microcontroller must shut off any input signals to the IC within an OCP hold time, t P, which occurs after the internal transistor (Q FO ) turn-on. t P is 15 μs where minimum values of thermal characteristics are taken into account. (For more details, see Section ) Our recommendation is to use a.1 μf to.1 μf filter capacitor Protection Functions This section describes the various protection circuits provided in the SIM68M series. The protection circuits include the undervoltage lockout for power supplies (UVLO), the overcurrent protection (OCP), and the thermal shutdown (TSD). In case one or more of these protection circuits are activated, the FO pin outputs a fault signal; as a result, the external microcontroller can stop the operations of the three phases by receiving the fault signal. The external microcontroller can also shut down the IC operations by inputting a fault signal to the FO pin. In the following functional descriptions, HOx denotes a gate input signal on the high-side transistor, whereas LOx denotes a gate input signal on the lowside transistor.. Table Shutdown Signals Parameter High Level Signal Low Level Signal Input Voltage 3 V < V IN < 5.5 V V < V IN <.5 V Input Pulse Width 6 μs Undervoltage Lockout for Power Supply (UVLO) In case the gate-driving voltages of the output transistors decrease, their steady-state power dissipations increase. This overheating condition may cause permanent damage to the IC in the worst case. To prevent this event, the SIM68M series has the undervoltage lockout (UVLO) circuits for both of the high- and low-side power supplies in the monolithic IC (MIC) Undervoltage Lockout for High-side Power Supply (UVLO_VB) Figure 12-1 shows operational waveforms of the undervoltage lockout operation for high-side power supply (i.e., UVLO_VB) Fault Signal Output In case one or more of the following protections are actuated, an internal transistor, Q FO, turns on, then the FO pin becomes logic low (.5 V). HINx LINx 1) Low-side undervoltage lockout (UVLO_VCC) 2) Overcurrent protection (OCP) 3) Thermal shutdown (TSD) VBx-HSx V BS(OFF) UVLO_VB operation V BS(ON) While the FO pin is in the low state, all the low-side transistors turn off. In normal operation, the FO pin outputs a high signal of 5 V.. The fault signal output time of the FO pin at OCP activation is the OCP hold time (t P ) of 25 μs (typ.), fixed by a built-in feature of the IC itself (see Section ). The external microcontroller receives the fault signals with its interrupt pin (INT), and must be programmed to put the HINx and LINx pins to logic low within the predetermined OCP hold time, t P. HOx LOx FO About 3 µs UVLO release HOx restarts at positive edge after UVLO_VB release. No FO output at UVLO_VB Shutdown Signal Input The FO pin also acts as the input pin of shutdown signals. When the FO pin becomes logic low, all the low-side transistors turn off. The voltages and pulse widths of the shutdown signals to be applied between the FO and COMx pins are listed in Table Figure UVLO_VB Operational Waveforms When the voltage between the VBx and output pins (VBx HSx shown in Figure 12-1) decreases to the Logic Operation Stop Voltage (V BS(OFF), 1. V) or less, the UVLO_VB circuit in the corresponding phase gets SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 23 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

24 SIM68M Series activated and sets an HOx signal to logic low. When the voltage between the VBx and HSx pins increases to the Logic Operation Start Voltage (V BS(ON), 1.5 V) or more, the IC releases the UVLO_VB condition. Then, the HOx signal becomes logic high at the rising edge of the first input command after the UVLO_VB release. The FO pin does not transmit any fault signals during the UVLO_VB operation. In addition, the VBx pin has an internal UVLO_VB filter of about 3 μs, in order to prevent noise-induced malfunctions Undervoltage Lockout for Low-side Power Supply (UVLO_VCC) Figure shows operational waveforms of the undervoltage lockout operation for low-side power supply (i.e., UVLO_VCC). When the VCC2 pin voltage decreases to the Logic Operation Stop Voltage (V CC(OFF), 11. V) or less, the UVLO_VCC circuit in the corresponding phase gets activated and sets both of HOx and LOx signals to logic low. When the VCC2 pin voltage increases to the Logic Operation Start Voltage (V CC(ON), 11.5 V) or more, the IC releases the UVLO_VCC condition. Then, the IC resumes the following transmissions: an LOx signal according to an LINx pin input command; an HOx signal according to the rising edge of the first HINx pin input command after the UVLO_VCC release. During the UVLO_VCC operation, the FO pin becomes logic low and sends fault signals. In addition, the VCC2 pin has an internal UVLO_VCC filter of about 3 μs, in order to prevent noise-induced malfunctions Overcurrent Limit (OCL) The overcurrent limit (OCL) is a protection against relatively low overcurrent conditions. Figure shows an internal circuit of the OCP and OCL pins; Figure shows OCL operational waveforms. When the OCP pin voltage increases to the Current Limit Reference Voltage (V LIM,.65 V) or more, and remains in this condition for a period of the Current Limit Blanking Time (t BK(OCP), 2 μs) or longer, the OCL circuit is activated. Then, the OCL pin goes logic high. During the OCL operation, the gate logic levels of the low-side transistors respond to an input command on the LINx pin. If the OCL and SD pins are connected on a PCB, the high-side transistors can be turned off even during the OCL operation. The SD pin has an internal filter of about 3.3 μs (typ.). When the OCP pin voltage falls below V LIM (.65 V), the OCL pin logic level becomes low. After the OCL pin logic has become low, the high-side transistors remain turned off until the first low-to-high transition on an HINx input signal occurs (i.e., rising edge triggering). OCP COM2 U1 3 6 Figure V 2 kω 2 kω Filter 2 kω 2 kω 1 OCL Internal Circuit of OCP and OCL Pins HINx HINx LINx LINx VCC2 UVLO_VCC operation OCP V LIM V CC(OFF) V CC(ON) HOx OCL (SD) t BK(OCP) LOx About 3 µs LOx responds to input signal. HOx 3.3 µs (typ.) HOx restarts at positive edge after OCL release. FO Figure UVLO_VCC Operational Waveforms LOx Figure OCL Operational Waveforms (OCL = SD) SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 24 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

25 SIM68M Series Overcurrent Protection (OCP) The overcurrent protection (OCP) is a protection against large inrush currents (i.e., high di/dt). Figure is an internal circuit diagram describing the OCP pin and its peripheral circuit. The OCP pin detects overcurrents with the input voltages across external shunt resistors, R Sx. Because the OCP pin is internally pulled down, the OCP pin voltage increases proportionally to a rise in the currents running through the shunt resistors, R Sx. Figure is a timing chart that represents operation waveforms during OCP operation. When the OCP pin voltage increases to the OCP Threshold Voltage (V TRIP, 1. V) or more, and remains in this condition for a period of the OCP Blanking Time (t BK, 2 μs) or longer, the OCP circuit is activated. The enabled OCP circuit shuts off the low-side transistors and puts the FO pin into a low state. Then, output current decreases as a result of the output transistors turn-off. Even if the OCP pin voltage falls below V TRIP, the IC holds the FO pin in the low state for a fixed OCP hold time (t P ) of 25 μs (typ.). Then, the output transistors operate according to input signals. The OCP is used for detecting abnormal conditions, such as an output transistor shorted. In case short-circuit conditions occur repeatedly, the output transistors can be destroyed. To prevent such event, motor operation must be controlled by the external microcontroller so that it can immediately stop the motor when fault signals are detected. For proper shunt resistor setting, your application must meet the following: Use the shunt resistor that has a recommended resistance, R Sx (see Section 2). Set the OCP pin input voltage to vary within the rated OCP pin voltages, V OCP (see Section 1). Keep the current through the output transistors below the rated output current (pulse), I OP (see Section 1). It is required to use a resistor with low internal inductance because high-frequency switching current will flow through the shunt resistors, R Sx. In addition, choose a resistor with allowable power dissipation according to your application. When you connect a CR filter (i.e., a pair of a filter resistor, R O, and a filter capacitor, C O ) to the OCP pin, care should be taken in setting the time constants of R O and C O. The larger the time constant, the longer the time that the OCP pin voltage rises to V TRIP. And this may cause permanent damage to the transistors. Consequently, a propagation delay of the IC must be taken into account when you determine the time constants. For R O and C O, their time constants must be set to the values listed in Table And place C O as close as possible to the IC with minimizing a trace length between the OCP and COMx pins. Note that overcurrents are undetectable when one or more of the U, V/V1/V2, and W1/W2 pins or their traces are shorted to ground (ground fault). In case any of these pins falls into a state of ground fault, the output transistors may be destroyed. A/D COM C O U1 OCP 3 COM2 6 R Ox V TRIP 2 kω kω Blanking filter 1.65 µs (typ.) Output SW turn-off and Q FO turn-on D RSx VBB 28 LSx Figure Internal Circuit Diagram of OCP Pin and Its Peripheral Circuit HINx LINx t BK OCP V TRIP V LIM HOx LOx FO Figure t BK t P t BK R Sx HOx responds to input signal. FO restarts automatically after tp. OCP Operational Waveforms Table Reference Time Constants for CR Filter Part Number SIM681x SIM682x SIM688x Time Constant (µs) 2.2 SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 25 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

26 SIM68M Series Thermal Shutdown (TSD) The SIM68M series incorporates a thermal shutdown (TSD) circuit. Figure shows TSD operational waveforms. In case of overheating (e.g., increased power dissipation due to overload, a rise in ambient temperature at the device, etc.), the IC shuts down the low-side output transistors. The TSD circuit in the monolithic IC (MIC) monitors temperatures (see Section 7). When the temperature of the monolithic IC (MIC) exceeds the TSD Operating Temperature (T DH, 15 C), the TSD circuit is activated. When the temperature of the monolithic IC (MIC) decreases to the TSD Releasing Temperature (T DL, 12 C) or less, the shutdown condition is released. The output transistors then resume operating according to input signals. During the TSD operation, the FO pin becomes logic low and transmits fault signals. Note that junction temperatures of the output transistors themselves are not monitored; therefore, do not use the TSD function as an overtemperature prevention for the output transistors. 13. Design Notes 13.1 PCB Pattern Layout Figure 13-1 shows a schematic diagram of a motor driver circuit. The motor driver circuit consists of current paths having high frequencies and high voltages, which also bring about negative influences on IC operation, noise interference, and power dissipation. Therefore, PCB trace layouts and component placements play an important role in circuit designing. Current loops, which have high frequencies and high voltages, should be as small and wide as possible, in order to maintain a low-impedance state. In addition, ground traces should be as wide and short as possible so that radiated EMI levels can be reduced. 28VBB V DC HINx LINx T j(mic) T DH TSD operation MIC 31 U 26 V1 V2 35 W1 24 W2 37 Ground traces should be wide and short. M T DL HOx LOx FO LOx responds to input signals. 11 LS1 2 1 LS2 LS3A High-frequency, high-voltage current loops should be as small and wide as possible. Figure High-frequency, High-voltage Current Paths Figure TSD Operational Waveforms 13.2 Considerations in Heatsink Mounting The following are the key considerations and the guidelines for mounting a heatsink: It is recommended to use a pair of a metric screw of M2.5 and a plain washer of 6. mm (φ). To tighten the screws, use a torque screwdriver. Tighten the two screws firstly up to about 3% of the maximum screw torque, then finally up to 1% of the prescribed maximum screw torque. Perform appropriate tightening within the range of screw torque defined in Section 4. SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 26 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

27 SIM68M Series When mounting a heatsink, it is recommended to use silicone greases. If a thermally conductive sheet or an electrically insulating sheet is used, package cracks may be occurred due to creases at screw tightening. Therefore, you should conduct thorough evaluations before using these materials. When applying a silicone grease, make sure that there must be no foreign substances between the IC and a heatsink. Extreme care should be taken not to apply a silicone grease onto any device pins as much as possible. The following requirements must be met for proper grease application: - Grease thickness: 1 µm - Heatsink flatness: ±1 µm - Apply silicone grease within the area indicated in Figure 13-2, below. Screw hole Thermal silicone M2.5 grease application area M2.5 Screw hole typical measurement circuits for breakdown voltage: Figure 13-3 shows the high-side transistor (Q 1H ) in the U-phase; Figure 13-4 shows the low-side transistor (Q 1L ) in the U-phase. And all the pins that are not represented in these figures are open. When measuring the high-side transistors, leave all the pins not be measured open. When measuring the low-side transistors, connect the LSx pin to be measured to the COMx pin, then leave other unused pins open. COM1 16 COM2 6 MIC Q 1H 28VBB Q 2H Q 3H U 31 V 19 V 26 V1 W V2 Q 1L Q 2L Q 3L 37 W Heatsink Unit: mm Figure Reference Application Area for Thermal Silicone Grease LS1 11 LS2 2 LS3A LS2 LS3B 13.3 Considerations in IC Characteristics Measurement When measuring the breakdown voltage or leakage current of the transistors incorporated in the IC, note that the gate and emitter (source) of each transistor should have the same potential. Moreover, care should be taken when performing the measurements, because each transistor is connected as follows: All the high-side collectors (drains) are internally connected to the VBB pin. In the U-phase, the high-side emitter (source) and the low-side collector (drain) are internally connected, and are also connected to the U pin. (In the V- and W-phases, the high- and low-side transistors are unconnected inside the IC.) The gates of the high-side transistors are pulled down to the corresponding output (U, V/V1, and W1) pins; similarly, the gates of the low-side transistors are pulled down to the COM2 pin. When measuring the breakdown voltage or leakage current of the transistors, note that all of the output (U, V/V1, and W1), LSx, and COMx pins must be appropriately connected. Otherwise the switching transistors may result in permanent damage. The following are circuit diagrams representing Figure Typical Measurement Circuit for Highside Transistor (Q 1H ) in U-phase COM1 16 COM2 6 LS1 11 LS2 2 LS3A 1 MIC Q 1H Q 2H 28VBB Q 3H U V 26 V1 W V2 Q 1L Q 2L Q 3L 37 W LS2 LS3B Figure Typical Measurement Circuit for Lowside Transistor (Q 1L ) in U-phase V SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 27 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

28 SIM68M Series 14. Calculating Power Losses and Estimating Junction Temperatures This section describes the procedures to calculate power losses in switching transistors, and to estimate a junction temperature. Note that the descriptions listed here are applicable to the SIM68M series, which is controlled by a 3-phase sine-wave PWM driving strategy. For quick and easy references, we offer calculation support tools online. Please visit our website to find out more. DT26: SIM682xM Calculation Tool DT27: SIM681xM Calculation Tool DT3: SIM688xM Calculation Tool IGBT Total power loss in an IGBT can be obtained by taking the sum of steady-state loss, P ON, and switching loss, P SW. The following subsections contain the mathematical procedures to calculate these losses (P ON and P SW ) and the junction temperature of all IGBTs operating IGBT Steady-state Loss, P ON Steady-state loss in an IGBT can be computed by using the V CE(SAT) vs. I C curves, listed in Section As expressed by the curves in Figure 14-1, linear approximations at a range the I C is actually used are obtained by: V CE(SAT) = α I C + β. The values gained by the above calculation are then applied as parameters in Equation (4), below. Hence, the equation to obtain the IGBT steady-state loss, P ON, is: π P ON = 1 2π V CE(SAT) (φ) I C (φ) DT dφ = 1 2 α π M cos θ I M π β π 8 M cos θ I M. (4) Where: V CE(SAT) is the collector-to-emitter saturation voltage of the IGBT (V), I C is the collector current of the IGBT (A), V CE(SAT) (V) DT is the duty cycle, which is given by DT = 1 + M sin(φ + θ), 2 M is the modulation index ( to 1), cosθ is the motor power factor ( to 1), I M is the effective motor current (A), α is the slope of the linear approximation in the V CE(SAT) vs. I C curve, and β is the intercept of the linear approximation in the V CE(SAT) vs. I C curve C y =.251x I C (A) Figure Linear Approximate Equation of V CE(SAT) vs. I C Curve IGBT Switching Loss, P SW VCC = 15 V 25 C 75 C Switching loss in an IGBT can be calculated by Equation (5), letting I M be the effective current value of the motor: P SW = 2 π f C α E I M V DC 3. (5) Where: f C is the PWM carrier frequency (Hz), V DC is the main power supply voltage (V), i.e., the VBB pin input voltage, and α E is the slope of the switching loss curve (see Section ) Estimating Junction Temperature of IGBT The junction temperature of all IGBTs operating, T j, can be estimated with Equation (6): T j = R (j C)Q {(P ON + P SW ) 6} + T C. (6) Where: R (j-c)q is the junction-to-case thermal resistance ( C/W) of all the IGBTs operating, and T C is the case temperature ( C), measured at the point SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 28 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

29 SIM68M Series defined in Figure Power MOSFET Total power loss in a power MOSFET can be obtained by taking the sum of the following losses: steady-state loss, P RON ; switching loss, P SW ; the steadystate loss of a body diode, P SD. In the calculation procedure we offer, the recovery loss of a body diode, P RR, is considered negligibly small compared with the ratios of other losses. The following subsections contain the mathematical procedures to calculate these losses (P RON, P SW, and P SD ) and the junction temperature of all power MOSFETs operating. R DS(ON) (Ω) y =.5281x VCC = 15 V 125 C 75 C 25 C I D (A) Figure Linear Approximate Equation of R DS(ON ) vs. I D Curve Power MOSFET Steady-state Loss, P RON Steady-state loss in a power MOSFET can be computed by using the R DS(ON) vs. I D curves, listed in Section As expressed by the curves in Figure 14-2, linear approximations at a range the I D is actually used are obtained by: R DS(ON) = α I D + β. The values gained by the above calculation are then applied as parameters in Equation (7), below. Hence, the equation to obtain the power MOSFET steady-state loss, P RON, is: P RON = 1 π 2π I D (φ) 2 R DS(ON) (φ) DT dφ = 2 2α 1 3π M cos θ I M 3 +2β π M cos θ I M 2. (7) Where: I D is the drain current of the power MOSFET (A), R DS(ON) is the drain-to-source on-resistance of the power MOSFET (Ω), DT is the duty cycle, which is given by Power MOSFET Switching Loss, P SW Switching loss in a power MOSFET can be calculated by Equation (8), letting I M be the effective current value of the motor: P SW = 2 f C α E I M V DC 3. (8) Where: f C is the PWM carrier frequency (Hz), V DC is the main power supply voltage (V), i.e., the VBB pin input voltage, and α E is the slope of the switching loss curve (see Section ). DT = 1 + M sin(φ + θ) 2, M is the modulation index ( to 1), cosθ is the motor power factor ( to 1), I M is the effective motor current (A), α is the slope of the linear approximation in the R DS(ON) vs. I D curve, and β is the intercept of the linear approximation in the R DS(ON) vs. I D curve. SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 29 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

30 SIM68M Series Body Diode Steady-state Loss, P SD Steady-state loss in the body diode of a power MOSFET can be computed by using the V SD vs. I SD curves, listed in Section As expressed by the curves in Figure 14-3, linear approximations at a range the I SD is actually used are obtained by: V SD = α I SD + β. The values gained by the above calculation are then applied as parameters in Equation (9), below. Hence, the equation to obtain the body diode steady-state loss, P SD, is: P SD = 1 π 2π V SD (φ) I SD (φ) (1 DT) dφ Estimating Junction Temperature of Power MOSFET The junction temperature of all power MOSFETs operating, T j, can be estimated with Equation (1): T j = R j C {(P ON + P SW + P SD ) 6} + T C. (1) Where: R j-c is the junction-to-case thermal resistance ( C/W) of all the power MOSFETs operating, and T C is the case temperature ( C), measured at the point defined in Figure 3-1. = 1 2 α π M cos θ I M π β 1 2 π 8 M cos θ I M. (9) Where: V SD is the source-to-drain diode forward voltage of the power MOSFET (V), I SD is the source-to-drain diode forward current of the power MOSFET (A), DT is the duty cycle, which is given by DT = 1 + M sin(φ + θ) 2, M is the modulation index ( to 1), cosθ is the motor power factor ( to 1), I M is the effective motor current (A), α is the slope of the linear approximation in the V SD vs. I SD curve, and β is the intercept of the linear approximation in the V SD vs. I SD curve. 2.5 VCC = 15 V V SD (V) y =.2888x C 25 C 75 C I SD (A) Figure Linear Approximate Equation of V SD vs. I SD Curve SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 3 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

31 SIM68M Series 15. Performance Curves 15.1 Transient Thermal Resistance Curves The following graphs represent transient thermal resistance (the ratios of transient thermal resistance), with steadystate thermal resistance = Ratio of Transient Thermal Resistance Time (s) Figure Transient Thermal Resistance Curve: SIM681xM Ratio of Transient Thermal Resistance Time (s) Figure Transient Thermal Resistance Curve: SIM682xM 1. Ratio of Transient Thermal Resistance Time (s) Figure Transient Thermal Resistance Curve: SIM6818M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 31 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

32 SIM68M Series 15.2 Performance Curves of Control Parts Figure 15-4 to Figure provide performance curves of the control parts integrated in the SIM68M series, including variety-dependent characteristics and thermal characteristics. T j represents the junction temperature of the control parts. Table Typical Characteristics of Control Parts Figure Number Figure Caption Figure 15-4 Logic Supply Current, I CC vs. T C (INx = V) Figure 15-5 Logic Supply Current, I CC vs. T C (INx = 5 V) Figure 15-6 VCCx Pin Voltage, V CC vs. Logic Supply Current, I CC curve Figure 15-7 Logic Supply Current (1-phase) I BS vs. T C (HINx = V) Figure 15-8 Logic Supply Current (1-phase) I BS vs. T C (HINx = 5 V) Figure 15-9 VBx Pin Voltage, V B vs. Logic Supply Current I BS curve (HINx = V) Figure 15-1 Logic Operation Start Voltage, V BS(ON) vs. T C Figure Logic Operation Stop Voltage, V BS(OFF) vs. T C Figure Logic Operation Start Voltage, V CC(ON) vs. T C Figure Logic Operation Stop Voltage, V CC(OFF) vs. T C Figure UVLO_VB Filtering Time vs. T C Figure UVLO_VCC Filtering Time vs. T C Figure High Level Input Threshold Voltage, V IH vs. T C Figure Low Level Input Threshold Voltage, V IL vs. T C Figure Input Current at High Level (HINx or LINx), I IN vs. T C Figure High-side Turn-on Propagation Delay vs. T C (from HINx to HOx) Figure 15-2 Low-side Turn-on Propagation Delay vs. T C (from LINx to LOx) Figure Minimum Transmittable Pulse Width for High-side Switching, t HIN(MIN) vs. T C Figure Minimum Transmittable Pulse Width for Low-side Switching, t LIN(MIN) vs. T C Figure SD Pin Filtering Time vs. T C Figure FO Pin Filtering Time vs. T C Figure Current Limit Reference Voltage, V LIM vs. T C Figure OCP Threshold Voltage, V TRIP vs. T C Figure OCP Hold Time, t P vs. T C Figure OCP Blanking Time, t BK(OCP) vs. T C ; Current Limit Blanking Time, t BK(OCL) vs. T C I CC (ma) 5. VCCx = 15 V, HINx = V, LINx = V 4.5 Max Typ Min I CC (ma) 5. VCCx = 15 V, HINx = 5 V, LINx = 5 V 4.5 Max Typ Min Figure Logic Supply Current, I CC vs. T C (INx = V) Figure Logic Supply Current, I CC vs. T C (INx = 5 V) SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 32 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

33 SIM68M Series 3.8 HINx = V, LINx = V 25 VBx = 15 V, HINx = V I CC (ma) C 25 C 125 C I BS (µa) Max. Typ. Min V CC (V) Figure VCCx Pin Voltage, V CC vs. Logic Supply Current, I CC curve Figure Logic Supply Current (1-phase) I BS vs. T C (HINx = V) 3 25 VBx = 15 V, HINx = 5 V Max VBx = 15 V, HINx = V I BS (µa) Typ. Min. I BS (µa) C 125 C 25 C V B (V) Figure Logic Supply Current (1-phase) I BS vs. T C (HINx = 5 V) Figure VBx Pin Voltage, V B vs. Logic Supply Current I BS curve (HINx = V) V BS(ON) (V) Max Typ. 1.7 Min V BS(OFF) (V) Max Typ Min Figure Logic Operation Start Voltage, V BS(ON) vs. T C Figure Logic Operation Stop Voltage, V BS(OFF) vs. T C SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 33 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

34 SIM68M Series V CC(ON) (V) Max Typ Min V CC(OFF) (V) Max Typ Min Figure Logic Operation Start Voltage, V CC(ON) vs. T C Figure Logic Operation Stop Voltage, V CC(OFF) vs. T C UVLO_VB Filtering Time (µs) Max Typ Min UVLO_VCC Filtering Time (µs) Max Typ Min Figure UVLO_VB Filtering Time vs. T C Figure UVLO_VCC Filtering Time vs. T C V IH (V) Max. Typ. Min. V IL (V) Max. Typ. Min Figure High Level Input Threshold Voltage, V IH vs. T C Figure Low Level Input Threshold Voltage, V IL vs. T C SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 34 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

35 SIM68M Series I IN (µa) 4 INHx or INLx = 5 V 35 Max Typ. 2 Min High-side Turn-on Propagation Delay (ns) 8 7 Max. 6 Typ. 5 Min Figure Input Current at High Level (HINx or LINx), I IN vs. T C Figure High-side Turn-on Propagation Delay vs. T C (from HINx to HOx) Low-side Turn-on Propagation Delay (ns) 7 6 Max. 5 Typ. 4 Min t HIN(MIN) (ns) 4 35 Max Typ. 2 Min Figure Low-side Turn-on Propagation Delay vs. T C (from LINx to LOx) Figure Minimum Transmittable Pulse Width for High-side Switching, t HIN(MIN) vs. T C 4 6 t LIN(MIN) (ns) Max. Typ. Min. t SD (ns) Max. Typ. Min Figure Minimum Transmittable Pulse Width for Low-side Switching, t LIN(MIN) vs. T C Figure SD Pin Filtering Time vs. T C SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 35 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

36 SIM68M Series 6.75 t FO (ns) Max. Typ. Min. V LIM (ns) Max. Typ. Min Figure FO Pin Filtering Time vs. T C Figure Current Limit Reference Voltage, V LIM vs. T C V TRIP (ns) Max. Typ. Min. t P (µs) Max Typ. 2 Min Figure OCP Threshold Voltage, V TRIP vs. T C Figure OCP Hold Time, t P vs. T C t BK (µs) Max. 2. Typ. 1.5 Min Figure OCP Blanking Time, t BK(OCP) vs. T C ; Current Limit Blanking Time, t BK(OCL) vs. T C SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 36 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

37 SIM68M Series 15.3 Performance Curves of Output Parts Output Transistor Performance Curves SIM6811M R DS(ON) (Ω) VCC = 15V C C C I D (A) SIM6811M V SD (V) C 75 C 125 C I SD (A) SIM6811M Figure Power MOSFET R DS(ON) vs. I D Figure Power MOSFET V SD vs. I SD SIM6812M R DS(ON) (Ω) VCC = 15 V 125 C 75 C 25 C SIM6812M V SD (V) C 125 C 75 C VCC = 15 V SIM6812M I D (A) I SD (A) Figure Power MOSFET R DS(ON) vs. I D Figure Power MOSFET V SD vs. I SD SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 37 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

38 SIM68M Series SIM6813M R DS(ON) (Ω) 4. VCC = 15 V C C C I D (A) SIM6813M V SD (V) VCC = 15 V C C 75 C I SD (A) SIM6813M Figure Power MOSFET R DS(ON) vs. I D Figure Power MOSFET V SD vs. I SD SIM688M V CE(SAT) (V) VCC = 15 V 125 C 75 C 25 C SIM688M V F (V) C VCC = 15 V 75 C 125 C SIM688M I C (A) I F (A) Figure IGBT V CE(SAT) vs. I C Figure FRD V F vs. I F SIM6822M and SIM6827M V CE(SAT) (V) VCC = 15 V 125 C 75 C 25 C SIM6822M/27M V F (V) C VCC = 15 V 75 C 125 C SIM6822M/27M I C (A) I F (A) Figure IGBT V CE(SAT) vs. I C Figure FRD V F vs. I F SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 38 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

39 SIM68M Series Switching Losses Conditions: VBB = 3 V, half-bridge circuit with inductive load. Switching Loss, E, is the sum of turn-on loss and turn-off loss SIM6811M 25 VB = 15 V SIM6811M 25 VCC = 15 V SIM6811M 2 15 T j = 125 C 2 15 T j = 125 C E (µj) 1 E (µj) 1 5 T j = 25 C 5 T j = 25 C I D (A) Figure High-side Switching Loss I D (A) Figure Low-side Switching Loss SIM6812M 25 VB = 15 V SIM6812M 25 VCC = 15 V SIM6812M T j = 125 C 15 T j = 125 C E (µj) 1 E (µj) 1 5 T j = 25 C 5 T j = 25 C I D (A) I D (A) Figure High-side Switching Loss Figure Low-side Switching Loss SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 39 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

40 SIM68M Series SIM6813M 3 VB = 15 V SIM6813M 3 VCC = 15 V SIM6813M T j = 125 C 2 T j = 125 C E (µj) T j = 25 C E (µj) T j = 25 C I D (A) Figure High-side Switching Loss I D (A) Figure Low-side Switching Loss SIM688M T j = 125 C VB = 15 V SIM688M T j = 125 C VB = 15 V SIM688M E (µj) T j = 25 C E (µj) T j = 25 C I C (A) Figure High-side Switching Loss I C (A) Figure Low-side Switching Loss SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 4 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

41 SIM68M Series SIM6822M E (µj) VB = 15 V T j = 125 C T j = 25 C I C (A) SIM6822M E (µj) VCC = 15 V T j = 125 C T j = 25 C I C (A) SIM6822M Figure High-side Switching Loss Figure Low-side Switching Loss SIM6827M E (µj) 45 VB = 15 V T j = 125 C T j = 25 C I C (A) Figure High-side Switching Loss SIM6827M E (µj) 45 VCC = 15 V T j = 125 C T j = 25 C I C (A) Figure Low-side Switching Loss SIM6827M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 41 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

42 SIM68M Series 15.4 Allowable Effective Current Curves The following curves represent allowable effective currents in 3-phase sine-wave PWM driving with parameters such as typical R DS(ON) or V CE(SAT), and typical switching losses. Operating conditions: VBB pin input voltage, V DC = 3 V; VCC pin input voltage, V CC = 15 V; modulation index, M =.9; motor power factor, cosθ =.8; junction temperature, T j = 15 C SIM6811M 2. f C = 2 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 2 khz): SIM6811M 2. f C = 16 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 16 khz): SIM6811M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 42 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

43 SIM68M Series SIM6812M 2.5 f C = 2 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 2 khz): SIM6812M 2.5 f C = 16 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 16 khz): SIM6812M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 43 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

44 SIM68M Series SIM6813M 3. f C = 2 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 2 khz): SIM6813M 3. f C = 16 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 16 khz): SIM6813M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 44 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

45 SIM68M Series SIM688M 2.5 f C = 2 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 2 khz): SIM688M 2.5 f C = 16 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 16 khz): SIM688M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 45 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

46 SIM68M Series SIM6822M 5. f C = 2 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 2 khz): SIM6822M 5. f C = 16 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 16 khz): SIM6822M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 46 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

47 SIM68M Series SIM6827M 5. f C = 2 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 2 khz): SIM6827M 5. f C = 16 khz Allowable Effective Current (Arms) Figure Allowable Effective Current (f C = 16 khz): SIM6827M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 47 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

48 SIM68M Series 15.5 Short Circuit SOAs (Safe Operating Areas) This section provides the graphs illustrating the short circuit SOAs of the SIM68M series devices whose output transistors consist of built-in IGBTs. Conditions: V DC 4 V, 13.5 V VCC 16.5 V, T j = 125 C, 1 pulse. 4 Collector Current, I C(Peak) (A) Short Circuit SOA Pulse Width (µs) Figure Short Circuit SOA: SIM688M 1 Collector Current, I C(Peak) (A) Short Circuit SOA Pulse Width (µs) Figure Short Circuit SOA: SIM6822M, SIM6827M SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 48 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214

49 SIM68M Series 16. Pattern Layout Example This section contains the schematic diagrams of a PCB pattern layout example using an SIM68M series device. For more details on through holes, see Section 1. Figure Top View Figure Bottom View SIM68M-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD 49 Jul. 18, 218 SANKEN ELECTRIC CO., LTD. 214