A Novel Hybrid Current-Limiting Circuit Breaker for Medium Voltage: Principle and Test Results

Transcription

1 460 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 18, NO. 2, APRIL 2003 A Novel Hybrid Current-Limiting Circuit Breaker for Medium Voltage: Principle and Test Results Michael Steurer, Member, IEEE, Klaus Fröhlich, Fellow, IEEE, Walter Holaus, and Kurt Kaltenegger Abstract Although many attempts have been made to design a fault-current limiting (FCL) circuit breaker (FCLCB) for medium voltage electric power systems, no economically attractive solution has been achieved so far. In this paper, a novel concept for a FCLCB is introduced based on a hybrid arrangement of semiconductors, temperature-dependent resistors, and a newly developed fast-opening mechanical switch. The latter utilizes one part of an electrodynamic repulsion drive, which is concurrent with the moving double-contact system. Laboratory tests as well as computer simulations of the complete FCLCB verify, as an example, the feasibility for the goal ratings 12 kv and 2/20 ka (single phase). A cost analysis shows the FCLCB to be more expensive than a conventional generator CB, but to be in the price range of the Is-limiter and below the costs of superconducting FCL principles. It is concluded that the presented method provides the basis for further commercial product development. Index Terms Circuit breaker, controlled switching, costs, faultcurrent limiting, GTO, high-speed switching. I. INTRODUCTION FAULT-CURRENT interruption by circuit breakers (CBs) is a most essential function in systems of electrical power transmission and distribution. It clears the short-circuit current because the latter may stress the system equipment to the mechanical, and in certain cases, also to the thermal limits. In order to reduce these stresses, it has been an enduring desire of engineers to have a current-breaking device which prevents the short-circuit current to rise to its full prospective value. In low voltage systems, appropriate current-limiting circuit breakers have been employed successfully for decades, particularly in European countries. The basic principle of these devices is to enhance the switching-arc voltage up to or higher than the system voltage, thus providing a significant reduction of the short-circuit current [1]. This principle is not very successful for medium voltage since the arc voltage is not easily raised into the range of the system voltage. In past decades, many attempts have been made to achieve a solution for medium voltage [2]. However, no Manuscript received March 22, 2000; revised November 28, M. Steurer was with the High Voltage Lab, Swiss Federal Institute of Technology, Zurich, CH-8092, Switzerland. He is now with the Center for Advanced Power Systems, Florida State University, Tallahassee, FL USA ( steurer@caps.fsu.edu). K. Fröhlich is with the High Voltage Lab, Swiss Federal Institute of Technology, Zurich, CH-8092, Switzerland. W. Holaus was with the High Voltage Lab, Swiss Federal Institute of Technology, Zurich, CH-8092, Switzerland. He is now with ABB High Voltage Tech. Ltd., Zurich, CH-8050, Switzerland. K. Kaltenegger is with ABB Medium Voltage Tech. Ltd., Zurich, CH-8050, Switzerland. Digital Object Identifier /TPWRD approach has proven comparable to a conventional CB with respect to economical and functional aspects. The only commercially available devices are those based on special fuses triggered with the aid of a disruptive charge (up to a rated voltage of 36 kv), but have a restricted current-limiting ability. These devices, such as the Is-limiter, must be serviced after each operation [3]. For the time being, the most promising approaches for a current-limiting device in medium voltage are based on high-temperature superconductors of the inductive or resistive type [4], [5]. The former, however, turns out to be too expensive in investment and operation costs, whereas the latter is still in a development process and is only slowly approaching adequate quenching power ratings. Hence, all solutions proposed are either too expensive or not practicable for technical reasons. In the presented report, a novel concept for a fault-current limiting CB (in the following referred to as FCLCB) is introduced. This concept is based on a hybrid arrangement of three different parallel paths, where the current is limited and cleared stepwise. Although the very basic ideas are not new, the concept contains many novel modifications compared to existing proposals [6], [7]. They turn the device into a well functioning current-limiting CB, without dependence on any superconductive elements. The entire assembly looks rather complicated at first, yet its function is sound, and it appears that the device is the first of its kind to have a real potential for industrial use. The concept of the system and the specific design of its key elements are introduced in this paper. Results from extensive computer simulation of the transient behavior within a single-phase network equivalent of a typical power system are presented. Basic tests in a high power laboratory verify the operability of the key elements under short-circuit conditions (for the example goal ratings of 12 kv and 2/20 ka). The economics of such a device have been studied and related to conventional switching equipment as well as to unconventional limiting devices. II. CONCEPT The key elements of the novel concept, their main functions, and interaction are first explained. Later in this chapter, a complete current-limiting and interrupting sequence is described in detail, including the transient current and voltage waveforms (as shown in Fig. 2) obtained from computer simulations with the Electro Magnetic Transient Program (EMTP). Fig. 1 shows the principle of the interrupting circuit of a single-phase FCLCB integrated into the equivalent circuit of a typical power network with source voltage, complex load and source impedance, and, respectively. The FCLCB consists of three distinct paths connected in parallel, each of which /03$ IEEE

2 STEURER et al.: A NOVEL HYBRID CURRENT-LIMITING CIRCUIT BREAKER FOR MEDIUM VOLTAGE 461 Fig. 1. Single-phase diagram of a hybrid fault-current limiting CB (FCLCB), consisting of a fast-opening transfer switch (FTS), a semiconductor unit (SEM), a fast-opening disconnecting switch (FDS), a limiting impedance (PTC-resistor), and a load switch (LS). The FCLCB is integrated into the equivalent circuit of a typical power network with source voltage u, complex load and source impedance Z,and Z, respectively. Fig. 2. (a) Simulated through-current (i ) and TRV (u ) of the FCLCB during the breaking sequence, in comparison to the prospective fault-current (i ) and the source voltage (u ), respectively. (b) Details of the step-wise current commutation ( with reference to labels in Fig. 1 ) from the FTS (i ) onto the SEM (i ), and finally onto the PTC (i ), as well as the voltage build-up across the FTS (u ), the SEM (u ), and the FDS (u ) at distinct points in time (t...t ). See text for detailed explanations. is given a certain task to handle during switching in order to gain synergy effects. One key element is an ultrafast switch (path A) which commutates the current within a few hundred microseconds onto a parallel path, consisting of power semiconductor elements (path B). This path acts as a commutation aid to force the current further on to the actual current-limiting element (path C). When a fault occurs, the ultrafast transfer switch (FTS) opens within a few hundred microseconds and produces an arc voltage drop of several tens of volts. However, the arc voltage is much too small for the purpose of short-circuit current limitation. Therefore, a gate-turn-off thyristor (GTO) with high current turnoff capability is employed to force the fault-current onto a limiting impedance (path C in Fig. 1). Since a single GTO can carry the current only in one direction, it is installed within a four-diode bridge to save costs (see to of path B in Fig. 1), thus providing unipolar conditions for the GTO for both polarities of the fault current. This semiconductor unit is called SEM in the following. Several SEM units connected in series would be necessary for power system voltages of more than 5 kv (medium voltage range), because one GTO unit typically is able to withstand a blocking voltage of only 4.5 kv when switching off 4 ka. Since the voltage drop of such a series connection would exceed the arc voltage of the mechanical switch in path A, only one SEM unit is used to commutate the current onto path C. After commutation, when the current in path B became zero, the fast-opening disconnector (FDS in Fig. 1) is opened without arcing to isolate the SEM from the following TRV. Path C consists of a resistor with a high positive temperature coefficient of resistivity at room temperature (PTC) and a load switch (LS) of low interrupting capability to interrupt the current at the first current zero. In order to meet the standard s voltage-withstand requirements for an open CB and to provide a visible break, an additional fast-opening disconnect switch in series to the FCLCB (omitted in Fig. 1) might be necessary. A. Details of the Breaking Sequence Fig. 2(a) shows the TRV and RV across the FCLCB ( ) and the (limited) through-current ( ) in comparison to the prospective (unlimited) fault-current ( ). A symmetrical fault-current which provides maximal at the moment of fault inception was assumed, and furthermore, that the load current prior to the fault is at peak value these are the most severe conditions that the FTS must handle. In the presented example, the rms ratings of the simulated network branch are: power frequency Hz, source voltage kv, rated continuous current ka, and prospective (unlimited) short-circuit current ka. Fig. 2(b) shows, in detail, the current courses in paths A, B, and C (, and ), the voltages across the fast switches ( and ) and the voltage across the semiconductors ( ) during the commutation process. While the FCLCB is carrying the continuous current, all three switches (FTS, FDS, and LS) are closed. When a fault occurs, the electrodynamic repulsion drive of the FTS (described later on) is triggered by a separate sensing and control unit (neither is depicted in Fig. 1) within s. An appropriate fast fault-

3 462 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 18, NO. 2, APRIL 2003 detecting algorithm is described in [8]. Due to contact separation of the FTS (at in Fig. 2(b)), an arc voltage of approximately 40 V builds up across the opening double-contact gap. Since the onstate voltage drop across the SEM (which is connected in parallel to the FTS) of typically 10 to 15 V is smaller than the arc voltage, the current starts to commutate from path A onto path B (see Fig. 1). To ensure complete current commutation within a short time interval s, the self-inductance of the loop A-B must be sufficiently low on the order of 0.5 H for the given current ratings. Such a low inductance can be achieved through close connection of the paths A and B using compact design. After the current has been completely commutated onto the SEM, implying that becomes zero at, the mechanical switch FTS has the opportunity to recover. Approximately 150 s later at, the GTO is turned off, forcing the current onto the PTC-resistor in path C. Turning off the GTO causes a very high 1, and thus, an excessive voltage rise due to the self-inductance of the loop B-C (on the order of 10 H). As a consequence, the voltage jumps up to approximately 4.5 kv, and a further rise is limited by the metal-oxide varistor (MOV). At this moment, the FTS must have sufficiently recovered. In the presented example, the peak of the current through the semiconductors exceeds the rating of a single GTO, so that two GTOs connected in parallel were chosen. When the current is completely transferred onto the PTC-resistor at, the voltage adapts to a value, with as the initial resistance of the PTC-resistor at room temperature. The following massive power dissipation within the PTC-resistor leads to a temperature rise which, in turn, results in a significant increase of resistivity due to its positive temperature coefficient. Along with the further rise of the current, a nonlinear increase of the voltage across the FCLCB occurs. The drive of the fast-opening disconnecting switch (FDS) is triggered immediately after the GTO is switched off at and opens without arcing at, thus protecting the SEM from further voltage rise. The FDS takes over the major portion of rising voltage ( ) according to the capacitance ratio of the SEM and the FDS. When the voltage drop across the PTC-resistor becomes equivalent to the value of the source voltage at, the peak of the through-current is reached, which is 35% of the prospective peak value in this example. The maximum of the TRV across the FTS is kv. When the current finally crosses zero at, it is interrupted by the switch LS. Contrary to the FTS, which has a voltage-free pause after arcing, and the FDS that opens without arcing at all, this switch has to withstand a small voltage transient, as shown in Fig. 2(a). The switch LS needs only a low interrupting capability: First, because the circuit is resistive due to the PTC-resistor so that the amplitude of the TRV is rather small, and second, because the as well as the RRRV are low. However, the LS must operate quickly enough to interrupt in less than 6 ms after fault detection. Although load switches with opening times more than ten times as long are in service today, 1 Modern GTOs, such as integrated gate-commutated thyristors (IGCTs) lose their conductivity within only 2 s at turnoff. the short opening time required can be achieved with certainty by means of modern electric drives and a conventional contact system, such as that of a vacuum switch. B. Service Operation and Current Making Regular-service current breaking with the FCLCB is similar to the fault-current breaking sequence described before, even though hardly any heating of the PTC-resistor takes place. At a current-making sequence, the LS closes first using the (cold) PTC-resistor as a closing resistor. Since closing times of the FDS and the FTS are in the range of 1 ms, they can be closed synchronously with the zero-crossing of the voltage drop across the PTC-resistor (soft switching). C. PTC-Resistor and Current-Limiting Performance The smallest possible through-current is achieved when the PTC-resistor has a self-inductance low enough to ensure current commutation from path B onto path C within several tens of microseconds when a voltage in the range of only 10% 20% of the rated voltage of the SEM is provided [see in Fig. 2(b)]; the highest possible initial resistance at room temperature, subject to the restriction that the voltage for commutation and the voltage after commutation, which is highest at symmetric fault conditions, add up to a value that does not exceed the voltage rating of the SEM [see in Fig. 2(b)]; an energy-absorbing capacity such that the highest temperature rise, which occurs at full asymmetry of the faultcurrent, causes the maximum allowable temperature of the PTC-material. In the presented design, the PTC-resistor is built from pure Ni-wire using a low inductive layout. During heating, a temperature rise of K can be allowed, since the final temperature must not exceed the melting temperature of Ni, which is approximately 1700 K. As a rough estimate, any cooling of the PTC-resistor during the limiting sequence has been neglected, and the temperature rise modeled by adiabatic heating, using the specific heat capacity of Ni ( Jkg K ). According to the resistivity-temperature characteristic of Ni, the highest achievable rise in resistivity is by a factor of approximately seven, starting from its value at room temperature K cm. Therefore, the initial voltage after commutation must already start with a value of several kilovolts to build up a peak of the TRV for efficient current limitation. Due to its low arc voltage, the FTS is, of course, not able to transfer the current directly onto the PTC-resistor, and thus, path B in Fig. 1 is essential as a commutation aid. If a PTC-resistor with a rise in resistivity on the order of 10 or more such as high temperature superconducting elements provide is used, a topology without path B is possible as described in [9]. In order to obtain the lowest achievable through-current and the associated TRV for different source voltages, a sensitivity study has been carried out by means of computer simulation. The parameters of the PTC-resistor have been recalculated for each source voltage value, as already outlined. As the result of

4 STEURER et al.: A NOVEL HYBRID CURRENT-LIMITING CIRCUIT BREAKER FOR MEDIUM VOLTAGE 463 corresponding to a peak of the asymmetric prospective fault current of 1.9 times the symmetric value. It was further assumed that heating of the PTC-resistor starts at ms after fault inception, with an initial value of the voltage drop after commutation of kv for one SEM-unit. Furthermore, it was expected that a load current with a power factor of flows prior to the fault. (It shall be noted here, that in contrast to noncurrent-limiting breakers, the severity for the limiter decreases with an increasing time constant of the circuit. This is because the initial rate of rise of current decreases while implying the same ratio of symmetric fault current to rated current.) Fig. 3. (a) Through-current normalized to the rated current (^i =^i ). (b) Peak of the TRV normalized to the source voltage (^u =( p 2 U )) when using a PTC-resistor made of Ni-wire in the FCLCB. Calculated values for faults with and without full asymmetry. Parameter is the ratio of prospective fault-current to the rated continuous current k = ^i =^i. this study, Fig. 3(a) shows how the smallest achievable throughcurrent, normalized to the symmetric prospective fault-current ( ), is effected by the rated source voltage (singlephase consideration). Since the performance of the current limiter is affected by the ratio of prospective fault current to rated continuous current, this appears as parameter in Fig. 3. The curves show that for lower system voltages, a significantly smaller through-current is achievable compared to higher system voltages. This is valid both for faults without asymmetry and with full asymmetry. With a higher, the system is more effective than with a lower ratio. As an example, for a system voltage of kv ) the through-current is limited to approximately 50% of the symmetric prospective value when only one SEM unit is used. However, when two SEM units are connected in series, the limitation is more effective and the through-current is therefore only 30% of the prospective current. With two SEM units and high values of rated currents, it might be necessary to use two double-contact systems (FTSs) in series in order to achieve an arc voltage buildup sufficient to commutate the current within the short time interval s from path A to path B. The corresponding peak of the TRV in per unit. [ ] is shown in Fig. 3(b). In any case, the TRV is below 1.5 p.u., which is very acceptable. For the curves in Fig. 3, the time constant of the DC component of the asymmetric fault current was assumed to be 60 ms, III. FAST-OPENING SWITCH As has already been indicated, ultrafast opening of the transfer switch FTS is essential for the efficient performance of the hybrid system. Its speed of operation determines how quickly after fault inception the current will be commutated onto path B. The major requirements for the FTS are as follows carrying load current in the kilo ampere range continuously (with respect to such an application as a generator CB); contact separation within approximately 0.1 ms after fault detection (trigger of drive); producing an arc voltage of some tens of volts to commutate the current onto the semiconductor path; very fast dielectric recovery after current commutation to withstand the TRV shown in Fig. 2. A. Principle Design From analysis of driving principles for the opening of a mechanical contact within the requested short period of time (compare in Fig. 1), only the principle of the electrodynamic repulsion drive (EDD) has been found to be adequate. This principle is based on the repulsion forces of eddy currents that are induced in a movable conductor by means of a coil subject to an impulse discharge. Although such drives have been used for fast switching contacts in the past [10], all previous designs have employed a driving unit mechanically linked to the actual contacts. The efficiency of EDDs, in general, (i.e., energy in the moving part over energy stored in the capacitor) is rather low (e.g., 5%). Therefore, those designs (especially for high current switches) require rather large capacitor banks for energy storage [11]. In Fig. 4, a novel design for a fast-opening switch driven by an electrodynamic repulsion drive is shown. A conducting ring serves as a contact bridge between spring-loaded fixed contacts to carry the current in the radial ( ) direction. The entire contact system is axially symmetric, which ensures the load current to be uniformly distributed along the circumference and keeps the self-inductance between the terminals of the switch to a minimum. The ring is the only moving part of the switch. Built from aluminum, it has a mass of approximately 0.05 kg for the ratings given earlier. The entire contact region is kept in a vessel under compressed air or at (300 to 800) kpa for a voltage-withstand capability of several tens of kilovolts in the final open position.

5 464 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 18, NO. 2, APRIL 2003 Fig. 5. Details of the contact region. (a) During arcing and (b) in fully open position, with gas damping slot and driving coil L for closing. The longitudinal extension of the arcing regions at current zero is indicated by s = 1t 1 v. Fig. 4. Cross-section of the fast switch in the closed position showing the current path i in detail and the driving coil L for opening. To open the switch, the triggered current source provides a current impulse to the driving coil which is placed adjacent to the ring. Due to the high magnetic coupling between the coil and the ring, an eddy current is induced in the ring in the azimuthal ( ) direction (perpendicular to ) and antiparallel to as shown in Fig. 4. This causes a repulsion force in the -direction with a peak value on the order of 25 kn accelerating the ring. During the duration of that impulse of approximately 40 s, the ring reaches a velocity of approximately ms. The time interval from triggering the EDD to contact separation is typically s. Immediately after contact separation, two arcing regions (one on each edge of the moving ring) build up a voltage drop of at least 40 V (two cathode and anode drops in series), as shown in Fig. 5(a). The arc extinguishes when the current is completely transferred to path B as described earlier (compare Fig. 2). The ring is decelerated by compressing the insulation gas in the provided slot where it is finally held by the friction forces of the walls. Fig. 5(b) shows the ring in the fully open position. For medium voltage applications, the insulation distance is on the order of 10 mm, depending on the kind and pressure of the insulation gas. The principle of the electrodynamic repulsion drive is also employed for closing the switch. The ring is shot into the fixed contacts by a second coil mounted on top of the slot (see Fig. 5(b)). Closing times in the range of ms are possible and were validated by laboratory tests. The same design as described before was employed for the FDS, although the requirements for that switch are less severe than for the FTS. The FDS has to carry only impulse currents in the kilo ampere range for approximately 0.3 ms and opens without arcing because the GTO commutates the current from path B to path C. B. Voltage Recovery Characteristics Both fast-opening mechanical switches (FTS and FDS) must recover very quickly to withstand the TRV across the FCLCB shown in Fig. 2. In order to learn in general the recovery characteristics, and thus, the limitations of such fast-opening mechanical contacts subject to very short arcing, a test device was designed and built. The test switch was of a similar design Fig. 6. Measured no-load characteristic of the fast switch compared to the simulated voltage waveform across the FDS from Fig. 2(b). to that shown in Figs. 4 and 5. The arcing time could be adjusted between 30 and 250 s by varying the number of semiconductors connected in series onto which the switch had to commutate currents up to 6 ka. To determine the initial recovery rise, overshooting voltage impulses of different amplitudes with a kv s were applied to the opening contact gap with a varying time interval after contact separation (for no-load characteristics) or after current zero (for load characteristics). For the specific tested design, the initial rate of voltage recovery rise without arcing was found to be approximately 80 V/us for air compressed at 600 kpa. For the specific tested design, the initial rate of voltage recovery rise without arcing was found to be approximately 80 V s for air compressed at 600 kpa. The DC breakdown voltage of the full open switch under test was measured to be approximately 25 kv. When arcing takes place, the same initial rate of recovery as without arcing is observed, but with a short time delay of s after current zero as shown in Fig. 6. Due to limitations of the test setup, no voltage pulses higher than 12 kv could be applied. Therefore, the recovery characteristic above 12 kv was estimated from electrostatic field calculations and rough estimations of the temperature decay within the arcing region. It was concluded that arcing in the observed time domain has only a minor effect on the voltage recovery characteristic if the length of the arc (in Fig. 5) is short compared to the insulation distance. From these findings, it was concluded that such fast-opening mechanical contacts in principle fulfill all requirements of the FTS and the FDS as used in the FCLCB. Fig. 6 shows the

6 STEURER et al.: A NOVEL HYBRID CURRENT-LIMITING CIRCUIT BREAKER FOR MEDIUM VOLTAGE 465 Fig. 7. Measured load characteristic of the fast switch after commutating 6 ka within 100 s compared to the simulated voltage waveform across the FTS taken from Fig. 2(b). simulated voltage across the FDS from Fig. 2 compared to the no-load characteristic obtained from the experiments. As described earlier, the drive of the FDS is triggered the moment the GTO is turned off and opens after a mechanical delay of s without arcing. The TRV across the FDS is far below its fast recovery rise. Fig. 7 shows the TRV across the FTS compared to the load characteristic that was observed after commutating 6 ka within s. The recovery is also faster in this case than the TRV, which starts its initial rise when the GTO in path B is turned off. Although the recovery slows down due to a moderate temperature decrease of the gas within the previous arcing regions, the switch can easily withstand the further rise of the TRV. IV. FULL-SCALE LABORATORY TESTS To verify the capabilities, a test device for the complete FCLCB system (Fig. 1) has been designed, assembled, and tested. Based on the measurements of the dielectric recovery after arcing, described before, the fast switches within the device were designed for the goal ratings given earlier. To avoid the need for two parallel GTOs, the SEM unit and PTC-resistor have been designed for ka, which is half of the continuous current. Fig. 8 shows an oscillogram of the current and voltage waveforms during an interrupting operation with a source voltage of kv. A symmetric prospective short-circuit current of 11 ka could be limited to a through-current of 6 ka. The peak of the TRV across the FCLCB reached kv. These data are compatible with the simulation. Since the PTC-resistor was designed to heat up to its maximum temperature during a fault with 100% asymmetry, it only reached a temperature of approximately 900 K during this test. Since a suitable solution for the switch LS was not available at the date of the test, the FCLCB under test was short-circuited by an auxiliary CB (as a part of the test circuit) after the first current zero, as indicated in Fig. 8. Despite the fact that the test could not be carried out at the full goal ratings for operational reasons, it clearly shows the feasibility of the principle and provides verification of the simulation data. Fig. 8. Oscillogram of measured current and voltage during a test of the FCLCB at a commercial high-power lab. V. COST ASPECTS Although cost estimates in the early stages of development are always difficult and not very precise, for a first impression a rough cost analysis of the investigated FCLCB system was carried out under the following assumptions: only material costs were considered in detail; the overhead for development and assembly is taken from standard switchgear and from high power semiconductor applications to be approximately twice the material costs; a life cycle of 30 years was assumed; maintenance costs are assumed to be similar to or less than those of all apparatus considered in this comparison and are therefore not taken into account; the comparison is given for the 17.5-kV class (three phase). The estimated material costs range from U.S.$ 9 to 45 U.S. per amp for the FCLCB. The total costs would add up to U.S.$ 18 to 90 per amp. This is on the order of the total costs of a state-of-the-art current limiter for the medium-voltage range (Islimiter), which is approximately U.S.$ 20 per amp. Costs of superconducting fault-current limiters (SCFCLs) of the resistive type are very difficult to determine, and no useful information has been found in literature. However, in [9], the power consumption for the cooling of a 63-MVA device was estimated to be approximately 24 kw. With the cost of electric power assumed to be U.S.$ 0.01 per kiowatt-hour (which is rather low as an estimate), the costs for just the cooling alone within 30 years would be approximately U.S.$ 30 per amp. So it seems to be reasonable to assume that for the time being, the total costs of a resistive-type SCFCL (including costs of operation) will be at least on the order of U.S.$ 40 per amp. The price for a standard generator CB is on the order of U.S.$ 3 to 6 per amp, and therefore, much lower than that for the proposed FCLCB. However, the FCLCB offers the following additional functional advantages: current limitation and the capability of controlled switching, due to the very short mechanical reaction time of the novel mechanical switch (compared to standard CBs); no special maintenance after switching is required (compared to the Is-limiter);

7 466 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 18, NO. 2, APRIL 2003 complete dielectric disconnection between the terminals, and hence, full switching functionality (compared to SCFCLs and semiconductor switches); no cryogenics required (compared to SCFCL). An analysis of the reliability of the proposed hybrid FCLCB is still pending. However, the only nonstandard device within the system is the novel fast-opening mechanical switch, which is of a rather simple design with only one moving part. Other major components, such as the high-power semiconductors and their electronic control components, are widely used within electric power transmission systems with adequate requests on reliability. VI. CONCLUSIONS From the results presented in this paper, the following conclusions apply a novel method for current-limiting fault interruption in the medium-voltage range with particular respect to generator CBs has been developed. Within this approach, all relevant technological key questions have been answered, specifically: 1) how to transfer very fast high currents onto a limiting impedance with economically reasonable effort, and 2) how to design a suitable PTC-resistor that works at room temperature and above. Although this PTC-resistor has a low rise in resistivity (compared to superconductors), synergy effects with the other elements of the proposed FCLCB lead to effective current limitation. a limited cost analysis shows that the proposed FCLCB is more expensive than a conventional generator CB. Nevertheless, it also shows that the costs of the FCLCB are in the range of those of the Is-limiter, even though the analysis does not take into account the cost-reducing effects of mass production; one open question is whether downsizing or cascading of the FCLCB would lead to economically attractive competition with distribution or high voltage switchgear; although the presented principle meets the requirements of standard circuit breakers with respect to a complete current-interruption cycle, investigations are still pending concerning how the FCLCB can perform switching duties such as open-close-open cycles; since there are currently no unresolved technological problems, the presented method constitutes a basis for the development of an economical product. ACKNOWLEDGMENT The authors wish to express their thanks to L. Widenhorn, M. Mendik, J. Peter, and E. Frei from ABB High Voltage Technologies Ltd., Switzerland, for the numerous stimulating discussions and for designing the full-scale test setup. Furthermore, the authors want to acknowledge H. Kienast, C. Sigrist, and H. Vögeli from the Swiss Federal Institute of Technology, Zurich, for their commitment and effort to constructing the experimental setup. REFERENCES [1] C. W. Brice, R. A. Dougal, and J. L. Hudgins, Review of technologies for curent limiting low-voltage circuit breakers, Proc. Conf. Rec IEEE Ind. Commercial Power Syst. Tech. Conf., pp , [2] V. H. Tahiliani and J. W. Porter, Fault current limiters, an overview of EPRI research, IEEE Trans. Power Apparat. Syst., vol. 99, no. 5, pp , [3] E. Dreimann, V. Grafe, and K. H. Hartung, Schutzeinrichtung zur Begrenzung von Kurzschlussströmen, ETZ, vol. 115, no. 9, pp , [4] W. Paul, M. Lakner, J. Ryhner, P. Unternhrer, T. Baumann, M. Chen, L. Widenhorn, and A. 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Superconduct., vol. 10, pp , Mar [10] T. Loewen, C. C. Erven, and M. A. S. Hick, A high speed mechanism for synchronous vacuum circuit breakers, in IEEE/Power Eng. Soc. Winter Power Meeting, New York, NY, 1977, A , pp [11] L. D. McConnell and R. D. Garzon, The development of a new synchronous circuit breaker, IEEE Trans. Power App. Syst., no. 2, pp , Michael Steurer (M 02) received the M.Sc. degree in electrical engineering from the Vienna University of Technology, Austria, in 1995, and the Ph.D. degree in technical science from the Swiss Federal Institute of Technology, Zurich, Switzerland, in 2001, where he specialized in current limiting circuit breakers for medium-voltage range. Currently, he is with the Center of Advanced Power Systems of the Florida State University, Tallahassee, FL, working in the field of power systems for all-electric ships. Klaus Fröhlich (M 78 F 02) was born in 1945 in Salzburg, Austria. He received the M.Sc. in electrical engineering and the Ph.D. degree in technical science from the Vienna University of Technology, Austria. Currently, he is a Full Professor of High Voltage Technology at the Swiss Federal Institute of Technology, Zurich, Switzerland. After 11 years in Switchgear and High Voltage Technology with BBC (later ABB) in Switzerland, he became a full professor at the Vienna University of Technology in Dr. Fröhlich is a member of CIGRE Study Committee 13, and the convenor of CIGRE Working Group (controlled switching).

8 STEURER et al.: A NOVEL HYBRID CURRENT-LIMITING CIRCUIT BREAKER FOR MEDIUM VOLTAGE 467 Walter Holaus received the M.Sc. degree in electrical engineering from the Vienna University of Technology, Austria, in 1997, and the Ph.D. degree in technical science (on very fast acting mechanical switches for the medium voltage range) from the Swiss Federal Institute of Technology, Zurich, Switzerland, in Kurt Kaltenegger was born in 1958 and received the Mag.rer.nat. degree in physics from Karl Franzens University, Graz, Austria, in 1985, and the Dr.mont. degree in solid state physics from Montanuniversity Leoben, Austria, in Currently, he is Business Area Technology Manager for Medium Voltage Technology in ABB, Zurich, Switzerland. In 1991, he joined ABB High Voltage Tech. Ltd., Switzerland, as a development engineer.