GP-based Design and Optimization of a Floating Voltage Source for Low-Power and Highly Tunable OTA Applications

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1 Manuscrpt receved Jun. 11, 2007; revsed Sep. 15, 2007 GP-based Desgn and Optmzaton of a Floatng Voltage Source for Low-Power and Hghly Tunable OTA Applcatons MARYAM SHOJAEI BAGHINI *, RAJENDRA KANPHADE **, D. G. WAKADE ** PRITI GAWANDE **, MANISHA CHHANGANI **, MANISH PATIL ** * EE Department of IIT Bombay, INDIA ** VLSI & Embedded System Desgn Center, SSGMCE, Shegaon, INDIA mshojae@ee.tb.ac.n, rdkanphade@gmal.com, prt.gawande@gmal.com, mansha.chhangan@gmal.com, manspatl1@gmal.com * ** Abstract Reuse of analog buldng blocks s a tme consumng process as CMOS technology scales down. Therefore automatc szng whle takng care of second order effects s of great mportance. In ths paper a method for automatc szng and optmzaton of a floatng voltage source (FVS) used n a CMOS Operatonal Transconductance Amplfer (OTA) s presented. The optmzaton determnes the optmal component values and transstor dmensons for FVS n order to mnmze the dsspated power and output mpedance. The presented methodology uses geometrc programmng (GP) and smulaton-based optmzaton n a tmeeffcent manner. The CMOS FVS s szed ntally usng convex optmzaton. Then the desgn s further optmzed by a smulaton-based crcut optmzer to nclude second order effects. Snce the ntal desgn uses GP method a globally optmum soluton s obtaned. The presented approach uses MATLAB verson and Cadence Analog Crcut Optmzer. The results are verfed by detaled analog smulaton usng Cadence Analog Desgn Envronment (ADE from IC ) n 0.35um mxed-mode CMOS process. Key-Words: - Operatonal Transconductance Amplfer, Convex Optmzaton, Geometrc Programmng, Smulaton-based Optmzaton. 1 Introducton Fast and optmum redesgn of analog buldng blocks n deep sub-mcron CMOS technologes s crucal n the IC ndustry when mgratng from a technology to another technology. Besdes standardzaton of analog specfcatons s not practcal because the analog crcut needs to be redesgned as desred specfcatons change [1]. Therefore, the desgn effort of a gven block for a dfferent technology requres the work of an expert analog desgner to provde, all the equatons contanng the knowledge of the adopted topologes. On the other hand, the analog expert should also provde the desgn crtera for the optmzaton of these blocks. In crcut desgn optmzaton, a crcut and ts performance specfcatons are gven and the goal s to automatcally determne the devce szes n order to meet the gven performance specfcatons whle mnmzng a cost functon, such as a weghted sum of the actve area or power dsspaton. Exstng approaches of automatc crcut szng are broadly classfed nto four man categores [1-3]. These approaches are: Classcal optmzaton Methods. Knowledge-Based Methods. Global Optmzaton Methods. Geometrc Programmng Methods. Desgner-drven Stochastc Mult-objectve Optmzaton Method. The man dsadvantage of the classcal optmzaton methods s they only fnd locally optmal desgns. Therefore small varatons of any of the desgn parameters results n a worse (or nfeasble) desgn. The knowledge based methods fnd a locally optmal desgn (or, even just a good or reasonable desgn) nstead of a globally optmal desgn. The fnal desgn depends on the ntal desgn chosen and the algorthm parameters. The global optmzaton methods are useful when there s no proper modelng of the ntegrated crcut components. However they are slow f the entre desgn space needs to be searched. Evolutonary approaches lke genetc algorthms mprove the speed. However n practce they cannot guarantee a globally optmal soluton. Geometrc Programmng (GP) methods can solve large problems, wth thousands of varables and tens of thousands of constrants, very effcently ISSN: Issue 10, Volume 6, October 2007

2 (n mnutes on a small workstaton). The other man advantage s that the methods are truly global,.e. the global soluton s always found, regardless of the startng pont (whch, ndeed, need not be feasble) and nfeasblty s unambguously detected [3]. GP needs expert desgner knowledge to ntroduce the constrants n a specal form. Durng preparaton of ths paper we found a recently reported method called Desgner-drven Stochastc Mult-objectve optmzaton method. Ths method uses desgner knowledge and requres approxmate equatons [4]. The method, whch s presented n ths paper, takes advantage of GP-based and smulaton-based optmzaton to balance speed-accuracy tradeoff. The method can be appled to a wde varety of analog functonal modules. Here the presented method s appled to a cross-coupled CMOS OTA. OTA s an analog element whch s used for wreless and vdeo sgnal processng functons n SOC (System On Chp) and FPAA (Feld Programmable Analog Array) applcatons wth one mportant feature,.e. external tunablty/programmablty, whch s not avalable n operatonal amplfers. 2 Geometrc Programmng (GP) To formulate the analog desgn problem n geometrc programmng each constrant has to be converted n the form of monomal or posynomal. 2.1 Monomals and Posynomals Let x 1, x 2, x n denote n real postve varables, and x = (x 1, x 2 x n ) a vector wth components x. A real valued functon f of x, wth the form a1 a2 an f( x) = cx1 x2... x n (1) where c > 0 and a R s called a monomal functon, or more nformally, a monomal (of the varables x 1, x 2 x n ). The constant c s referred as the coeffcent of the monomal, and the constants a are referred as the exponents of the monomal. As an example, 9.5x 1 x s a monomal of the varables x1 and x2, wth coeffcent 9.5 and x 2 - exponent Monomals are closed under multplcaton and dvson: f f and g are both monomals then so are fg and f/g. (Ths ncludes scalng by any postve constant.) A monomal rased to any power s also a monomal [5]. The term monomal, as used n the context of geometrc programmng s smlar to, but dffers from the standard defnton of monomal used n algebra. In algebra, a monomal has the form (1), but the exponent a must be nonnegatve ntegers, and the coeffcent c s one. A sum of one or more monomals,.e., a functon of the form K f ( x) = c x k x k... x nk (2) k = 1 k a1 a2 a 1 2 n where c k > 0, s called a posynomal functon or, more smply, a posynomal (wth k terms havng the varables x 1 x n ). The functon (or expresson) 5.8x 2 yz -1 s a monomal (hence, also a posynomal). The functon (xz+yz) 2 s a posynomal but not monomal [6]. 2.2 Standard Form Geometrc Program A geometrc program (GP) s an optmzaton problem of the form Mnmze f ( x ) 0 f ( x) 1, = 1,..., m, Subject to g ( x) = 1, = 1,..., p, (3) x > 0, = 1,..., n. where f are posynomal functons, g are monomals, and x are the optmzaton varables. (There s an mplct constrant that the varables are postve,.e., x > 0.) We refer to the problem (3) as a geometrc program n standard form. In a standard form GP, the objectve must be posynomal (and t must be mnmzed); the equalty constrants can only have the form of a monomal equal to one, and the nequalty constrants can only have the form of a posynomal less than or equal to one [5]. 2.3 Geometrc Programmng n Convex Form The man trck to solvng a GP effcently s to convert t to a nonlnear but convex optmzaton problem,.e., a problem wth convex objectve and nequalty constrant functons, and lnear equalty constrants. Effcent soluton methods for general convex optmzaton problems are well developed. Ths results n the problem y mnmze log f0 ( e ) subject to log f ( y e ) 0, = 1,..., m, y log g ( e ) = 0, = 1,..., p (4) wth varable y, where y =log x. Here we use y notaton e, where y s a vector, to mean y y component wse exponentaton: ( e ) = e. The transformed verson, gven n relaton (4), s the so- ISSN: Issue 10, Volume 6, October 2007

3 called convex form of the geometrc program (3). Unlke the orgnal GP, ths convex form can be solved very effcently [5]. Advantages of convex optmzaton are: They can solve problems wth thousands of varables and constrants, very effcently. The global soluton s always found n these methods, regardless of the startng pont. Infeasblty s also detected,.e., f the methods do not produce a feasble pont they produce a certfcate that proves the problem s nfeasble. Also, the stoppng crtera are completely nonheurstc,.e. at each teraton a lower bound on the achevable performance s obtaned. 3 Operatonal Transconductance Amplfer (OTA) OTA s an excellent current mode module due to ts nherent wde band capablty. One of the features of OTA s s that ts transconductance can be programmed or tuned, for example ether by varyng the analog bas voltage/current or by changng the gan of the current mrror used nsde OTA. nternal nodes, resultng n mproved lnearty wthout hgh-frequency performance degradaton. The smplfed schematc dagram of the crosscoupled dfferental MOS pars s shown n Fg 2. Two cross-coupled dfferental pars wth MOS devces M1 M4 are operatng n saturaton. Both pars are based by a dc current ss n combnaton wth an adjustable floatng voltage Vb wth low output resstance. It can be shown that dfferental transconductance of ths OTA, Gm, s expressed as Gm=K Vb (5) where K=0.5C ox W/L s the transconductance parameter of the transstors M1-M4 and Vb s the voltage of the floatng dc voltage source [6]. All undefned parameters have ther usual meanngs. Fg. 2. Cross-coupled OTA Fg. 1. Complete OTA Archtecture The programmng feature of OTA helps the desgners to realze the analog functonal crcuts of whch the performance specfcatons can be confgured as per the applcaton requrements [6]. The OTA module, consdered n ths paper, s based on two cross-coupled dfferental MOS pars, of whch the complete schematc dagram s shown n Fg. 1. Cross-coupled topology of the transconductor crcut does not ntroduce addtonal As per relaton (5) value of Gm s changed by changng value of Vb. Therefore Vb should be a varable FVS wth low output mpedance n the entre range of Vb values. The process specfcatons of 0.35um CMOS technology, used n ths paper, are gven n table 1. In the concerned FPAA, floatng voltage source Vb was requred to change from 29mV to 460mV wth Iss=19uA and mnmum output mpedance [7]. Iss s the current source used for the basng of OTA as shown n Fg.2. 4 Floatng Voltage Source (FVS) In order to obtan a wde range of applcaton frequences n OTA-C flter desgn, t s necessary for the transconductance of the OTA to be adjustable. Ths s acheved usng tunable FVS. To preserve the hgh lnearty of the transconductance, voltage source Vb needs to have ISSN: Issue 10, Volume 6, October 2007

4 low output mpedance. Fg. 3 shows the FVS archtecture whch exhbts low output mpedance wth low power dsspaton. Ths CMOS FVS conssts of a dfferental par wth a shunt-seres feedback. For smplcty basng path from Vdd to the source of transstor Mvb5 s not shown. In Fg. 3 V out+ - V out- s the amount of voltage shft,.e. Vb. Table 1. Process Specfcatons for 0.35um CMOS Technology Parameter Value V DD 3.3V V SS 0V V Tn 0.45V V Tp 0.65V ncox 158uA/V 2 pcox 66.7uA/V 2 A V = Gm2 ( r' o2 ro 4) (9) f = gm5( r o 5 Rob6) (10) In relaton (9) Gm 2 and r o2 are transconductance and output mpedance of dfferental par Mvb1- Mvb2, respectvely. From (6) to (10) t s clear that transstors Mvb1, Mvb2, Mvb5, Mvb6 and Mvb13 are the man desgn elements of FVS. The only condton appled to the FVS s that Vgs2 > Vgs GP-based optmal desgn of FVS GP-based desgn needs basng condtons, dc voltage level and small sgnal specfcatons of FVS to be formulated. Importance here s that the constrants on the desgn varables are posynomal nequaltes and hence, can be handled by GP. Basng condtons: For NMOS: V V V where, V thn > 0 G D thn For PMOS: V V V where, V thp < 0 G D thp Transstor Mvb1: V n - V gs6 (VDD V sg3 ) V thn ID3 V V + V + V V 1 W pcox 3 thn out (max) gs6 DD thp Fg. 3 Schematc Dagram of CMOS FVS The dc output voltage of FVS depends on the gate-source voltage of transstors Vb = Vgs13 + Vgs2 Vgs1 Vsg6 (6) AC analyss shows that the output resstance at the output termnals manly depends on the value of output resstance of transstors Mvb5 and Mvb6. Rob6 ro 5 Rout = (7) 1 + T where R ob6 =output resstance of cascade current source and T s Loop gan of FVS gven by T = AV f (8) In relaton (8) A V s forward gan and f s feedback factor gven by Transstor Mvb2: ( ) V V V V V n(max) gs13(mn) n(max) sg5 thn I D5 1 W pc ox 5 V + V V thn gs,13(mn) thp Transstor Mvb4: V V V V V ( ) DD sg3 n(max) sg5 thp ID3 1 W pcox Transstor Mvb5: V n - V sg5 - (V n - Vb mn ) V thp ID5 1 W pcox 5 3 V + V V + V thp DD n(max) sg5 V + V V V thp gs13(mn) gs6 thp ISSN: Issue 10, Volume 6, October 2007

5 Saturaton condtons of Mvb1 and Mvb5 satsfy those of Mvb4 and Mvb2, respectvely. Output mpedance: The output resstance s a posynomal (Rel (7)). We developed a GP-based optmzaton fle usng posynomal constrants, derved above, to sze the FVS transstors n MATLAB envronment. Power dsspaton mnmzaton was chosen as the objectve functon. Ths optmzaton led to ntal szng of transstors of FVS, of whch aspect ratos are gven n Table 2. Szng n MATLAB envronment on a Pentum 4 PC took only a few seconds. Ths s because fast optmzaton speed s one of the features of convex optmzaton methods. Table 2. Aspect Rato of MOS Transstors of GP- Based Optmzed FVS Transstor W/L W/L Transstor (m/ m) (m/ m) Mvb1 19/1 Mvb10 1/1 Mvb2 19/1 Mvb11 3/1 Mvb3 1/1 Mvb12 3/1 Mvb4 1/1 Mvb13 1/1 Mvb5 300/1 Mvb14 1.3/1 Mvb6 0.8/1 Mvb15 2/1 Mvb7 3/1 Mvb16 1/1 Mvb8 3/1 Mvb17 3/1 Mvb9 1/1 Mvb18 1/1 4.2 Smulaton Results of GP-Optmzed FVS The GP-based desgned FVS was smulated usng Cadence s Analog Desgn Envronment n 0.35um CMOS technology wth process specfcatons gven n Table 1 and control voltage (V ctrl ) of 1V. Fg. 4 shows the smulaton results of Matlab- optmzed FVS. Ths FVS provdes a voltage shft 27.6mV to 460.9mV (shown wth label VB n Fg. 4) for control voltage varyng between 1V to 2.3V ( V ctrl n Fg. 3) whle the average output resstance s 158.7ohms. Power consumpton changes from 30uW (supply current of 9uA) to 230uW (supply current of 69.7uA) n the entre range of VB. 4.3 Smulaton-Based Optmzaton of FVS Snce GP modelng does not consder the second order effects smulaton-based optmzaton s used at the next step. For ths purpose Cadence Optmzer s used. The ntal values of the desgn varables are Fg. 4 Smulaton Results of GP-Optmzed FVS taken from MATLAB optmzaton output. The Cadence optmzer frst determnes how the values of the goal expresson vary as desgn varables change. Then the optmzer updates the desgn varables n a manner to move the values of the expresson n the drecton of goals. The optmzer smulates the crcut wth updated values to check the outcome. If stoppng crtera are not met, the optmzer terates through the optmzaton process. In Cadence s Optmzer output mpedance and DC power consumpton mnmzaton are set as optmzaton goals. W1, W3, W5, I S (bas current of dfferental par of FVS) and I D5 are consdered as desgn varables. Fg. 5 shows the Cadence s optmzer waveform wndow at mnmum control voltage (V ctrl =1). The left sde of the Fg. 5 shows how the value of goals,.e. average current consumpton and output mpedance of the FVS, s changng wth teratons. Rght sde of Fg. 5 shows how desgn varables change to acheve the desred goals. As Fg. 5 shows optmzer reduces output mpedance teratvely whle power dsspaton s almost unchanged. Ths s based on the complete modelng of transstors gven by technology model fles n 0.35um CMOS process. Fnal aspect ratos of the transstors of FVS are gven n Table Smulaton Results of Fnal FVS The fnal FVS was smulated usng Cadence s Analog Desgn Envronment n 0.35um CMOS technology. Fg. 6 shows the smulaton results of FVS. Ths FVS provdes a voltage shft 27.33mV to 460.6mV for control Voltage varyng between 1V to 2.3V whle the average output resstance has reduced to 131 ohms. Power consumpton s almost as the same as that of GP-based desgn. ISSN: Issue 10, Volume 6, October 2007

6 programmable OTA applcaton n 0.35um CMOS technology was presented. FVS was frst desgned usng GP-based optmzaton n MATLAB envronment to get a global optmal desgn wth respect to power dsspaton. The ntal desgn was further optmzed usng a smulaton-based envronment (here Cadence Crcut Optmzer) to take nto account the second order effects. In ths way a fast, automatc and optmzaton-based desgn approach was acheved. Automated and globallyoptmzed low-power desgn s desrable as power requrements of ntegrated crcuts become more strngent for portable and battery-operated devces. Fg. 5. Cadence Analog Crcut Optmzer s Waveform Wndow for FVS 6 Future Work The method presented n ths paper provdes an effcent automatc analog crcut szng. As an ntal attempt an automatc szng procedure can be mplemented by automatcally lnkng MATLAB to a crcut smulaton-based optmzer. Automatc generaton of GP model and ts dervatves for nano scale devces wll have an mpact on analog desgn and reuse n future technologes. Fg. 6. Smulaton Results of Optmzed FVS Table 3. Fnal Aspect Rato of MOS Transstors of Cadence-Optmzed FVS Transstor W/L Transstor W/L Mvb1 20/1 Mvb10 1/1 Mvb2 20/1 Mvb11 3/1 Mvb3 0.8/1 Mvb12 3/1 Mvb4 1/1 Mvb13 1/1 Mvb5 245/1 Mvb14 1.3/1 Mvb6 0.8/1 Mvb15 2/1 Mvb7 3/1 Mvb16 1/1 Mvb8 3/1 Mvb17 3/1 Mvb9 1/1 Mvb18 1/1 5 Conclusons In ths paper automatc desgn and optmzaton of a floatng voltage source for a hghly tunable and References: [1] L. Laberk, T.Txer, Y. Fellah and N. Abouch, A New Approach for Automated Analog Desgn Optmzaton, Proc. of WSEAS Intl. Conf. on Crcuts, 2007, pp [2] T. Chen, Y. Cheng, Global Optmzaton Usng Hybrd Approach, Proc. of WSEAS Int. Conf. on Sm, Modelng and Optmzaton, 2007, pp [3] M.M.Hershenson, S.P.Boyd and T.H. Lee Optmal Desgn of a CMOS Op-Amp va Geometrc Programmng n IEEE Transactons on Computer-Aded Desgn of Integrated Crcuts and Systems, vol. 20, no. 1, 2001, pp [4] V. Aggarwal, U.M. O'Relly, Mult-objectve optmzaton theory and crcut optmzaton, [5] S. P. Boyd, S. J. Kmy, L. Vandenberghe and A. Hassb, A Tutoral on Geometrc Programmng, ISL, EE Dept., Stanford Unv, Stanford, CA, 02/05. [6] Pankewcz B., Wojckowsk M., Szczepansk S., and Sun Y., A FPAA for CMOS contnuoustme OTA-C flter applcatons, IEEE J. of Sold- State Crcuts, Vol. 37, No. 2, 2002, pp [7] R. D. Kanphade, M. Shojae Baghn, D. G. Wakade, M. Chhangan, M. V. Patl, S. M. Ranjan, J. R. Verma, N. K. Ingole and P. Gawande Desgn of FPAA usng custom IC and optmzaton-based desgn flow, Proc. of CDNLve 06, USA, ISSN: Issue 10, Volume 6, October 2007