A Novel 20G Wide-Band Synthesis Methodology for CMOS Spiral Inductors using Neural Network and Genetic Algorithm

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1 A Novel 20G Wde-Band Synthess Methodology for CMOS Spral Inductors usng Neural Network and Genetc Algorthm Hayang Shen Wenjun Zhang Tao u CAD Department, Insttute of Mcroelectroncs, Tsnghua Unversty, Bejng 00084, Chna Abstract We develop a novel synthess way to effectvely generate CMOS spral nductor s layout parameters usng artfcal neural network and genetc algorthm. An accurate neural network model for CMOS spral nductors s frstly developed based on measured results from TSMC 0.3um MM/RF process wth the frequency range of -20 GHz. The neural network model s further ntegrated n the synthess smulator kts called SPUNK. An nnovatve synthess technque s then appled n whch genetc algorthm based optmzaton s adopted. Our methodology promses to provde greater accuracy than prevous results n the frequency range whle able to mnmze the tme cost for spral nductor desgn. Keywords: CMOS spral nductor, Neural network, Genetc algorthm, ayout parameter optmzaton.. Introducton In recent years, there has been a great development n the CMOS RF ntegrated crcut due to the large demand of communcaton ndustry such as wreless communcaton. Compared wth other ntegrated crcut processes, CMOS process has the advantage of hgh densty and low power []. But passve components wth large area and hgh power consumpton make the desgn of CMOS RF ntegrated crcut a great challenge, especally the lack of nductors wth hgh value. The most used on-chp nductors are spral nductors for ther low cost and ease of process [2]. As the operaton frequency ncreases, varous physcal mechansms such as skn effect, proxmty effect and electrc-magnetc penetraton nto substrate make spral nductors dffculty to be well modeled and desgned [3]. Recently, a lot of research has been done on the modelng and synthess of spral nductor and there are manly two ways of nductors modelng maturely developed: Numercal Smulaton and Emprcal models. Artfcal Neural Network methodology s a newly developed way whch can calculate the results fast and accurately n a wde frequency range once the network has been well traned and becomes more and more popular n the modelng of RF passve devces [4] [5]. Synthess, the converse of modelng, s of great mportance, too. The am of synthess s to work out the process parameters and layout geometrcal parameters accordng to the desgn parameters such as value of nductance, value of and so on. The general methodology of nductor synthess s such a loop that gets the desgn parameters by makng use of the smulator and then optmzes the process parameters and layout geometrcal parameters to get the most satsfactory results by varous optmzaton ways. Accordng to the knds of smulator, the way of synthess can also be classfed nto three knds: synthess based on Numercal Smulaton [5], synthess based on emprcal models [3] [7] [8] and synthess based on Neural Network []. Among the three ways, the methodology based on emprcal models s mostly used because there s a lot of mature research results focused on emprcal models, not only analytcal expressons but also equvalent crcuts. The methodology based on Neural Network, as a novel way for fast and accurate synthess, has attracted more and more attenton and s used n synthess of other devces and crcuts [9], [0]. Although the advantages and dsadvantages of these synthess ways are largely dependent on ther smulators under ths loop optmzaton methodology, the choce of better optmzaton way s of great mportance, too. Tradtonal analytc optmzaton way such as evenberg-marquardt method [], artfcal ntellgent algorthm such as Genetc Algorthm [2], [3] and Partcle Swarm Optmzaton (PSO) [4] and some other mult-objectve optmzaton technques are put nto use [8]. In ths paper, a novel ayout-level Synthess Methodology for Integrated Spral Inductors s proposed. It uses the artfcal neural network as the smulator and the synthess adopts Genetc Algorthm as the optmzaton way. We carry out experments

2 based on the octagon dfferental spral nductors of TSMC 0.3um MM/RF process. On account of the rapd and accurate neural network smulator and excellent global optmzaton capacty of genetc algorthm, ths methodology s able to synthess layout parameters fast and accurately n frequency up to 20GHz, ncludng the turns of spral, n; the wdth of metal lne, w; the spacng between the metal lnes, s; the nner radus, r, whch s of great help to the desgners of RF Integrated Crcuts. 2. Neural Network Smulator SPUNK The block dagram of the functon of the neural network smulator SPUNK (Smulaton Program Usng Neural Network) for spral nductors s llustrated n Fg.. It s a modelng tool of RF passve devces based on both C++ and Matlab programmng language. In RF crcut desgn, the electrcal characterstcs of passve components are generally presented usng S parameters for the ease of measurement. Therefore, S parameters are used as our model output. After tranng, SPUNK can calculate the S parameters of the two-port network of a spral nductor accordng to the nput of the layout geometrcal parameters ncludng the turns of spral, n; the wdth of metal lne, w; the spacng between the metal lnes, s; the nner radus, r and the operatng frequency. Besdes, snce S2 and S2 are equal for a passve two-port recprocal network lke spral nductor, S2 and S2 s theoretcal the same and therefore only S 2 s ncluded n the model output. SPUNK adopts the evenberg-marquardt (M) method s utlzed as the tranng algorthm. Although not shown here, our experments ndcate that the M method s a sgnfcantly faster and preferable algorthm to other methods such as the conjugategradent (CG), quas-newton, and back-propagaton momentum algorthms. In addton, to ensure the valdty and speed of smulaton under hgher frequency than the Self-Resonance Frequency (SRF) of the nductor, SPUNK adopts unque physcs-based samplng technque. In ths procedure, the S parameters for each nductor are smulated from low operaton frequency to hgh frequency. The Inductance of each nductor s accordngly calculated. Once the calculated nductance becomes negatve, ths frequency pont wll be excluded from tranng data and the hgher operaton frequency wll no longer be smulated for ths nductor. Fgure.: The functon of SPUNK. After S parameters are gven by the neural network smulator, the electrcal desgn parameters of nductors can be calculated accordng to the followng expressons ganed from the equvalent network. Frstly, convert the S parameter matrx to Y parameter matrx: Y = [ I S][ I + S] Z 0 () Secondly, calculate the electrcal desgn parameters of the nductor usng the Y parameter matrx: (2) = Im ( ) ω Y (3) (4) (5) Im ( ) Y Im ( Y) = = Re( ) Re( Y ) Y and are the value of nductance and value of qualty factor seen from port; and are the value of nductance and value of qualty factor seen from port2. In deal cases (the shape and process s symmetrc enough), are equal to and are equal to, too. So n the followng calculaton, we choose and as the nductance and qualty factor of the nductor. = Im ( ) ω Y Im( ) Y Im( Y) = = Re( ) Re( Y) Y 3. Optmzaton usng Genetc Algorthms

3 Genetc algorthm s a guded stochastc search technque based on mechancs of evoluton and natural Selecton [5]. They operate through creaton of generatons of populaton of strngs, evaluaton and selecton of most ft strngs, and generc manpulaton to create a new populaton. The strngs are formed by encodng of each varable and through the operaton of crossover and mutaton all the possble combnatons of the soluton space can be searched and evaluated, so Genetc algorthms has good global optmzaton capablty. Besdes, Genetc algorthm s ntrnscally parallel, so the optmzaton process s faster than other analytcal numercal optmzaton ways. Based on our synthess process, every step of genetc algorthm s delberately desgned as follows:. Populaton creaton. A reasonable populaton sze can make the optmzaton process search the soluton space more thoroughly, thereby reducng the chance that the algorthm wll return a local mnmum that s not a global mnmum, as well as make the algorthm to run more quckly. In our optmzaton process, we create populaton wth unform functon and set the populaton sze of generaton to be Objectve and Ftness functon. Our synthess objectve s to match the target as accurate as possble and make the qualty factor of the nductor maxmum under the constrants of layout area. Ths s n nature a mult-objectve optmzaton problem. By ntroducng reasonable power ndex, we can transform the mult-objectve problem nto a sngle-objectve one wth constrant. Formulated mathematcally s: P mn F= P 2 spec + const. Area Areaspec spec (6) In the functon, spec, spec and Areaspec are the synthess targets. P and P2 are power ndex for and respectvely, the precse value of whch wll be set durng the process accordng to dfferent optmzaton targets. Generally speakng, we wll set lower value for P2, for example P=0. and P2= because desgn of RF IC needs nductors of qualty factor whle s less senstve to the varaton of the nductance. In addton, the scalng of ftness functon should be taken nto consderaton n the set of power ndex, for the too large range of ftness value caused by napproprate value of power ndex wll result n the early-convergence of genetc optmzaton. 3. Ftness scalng. As mentoned above, approprate range of ftness value s very mportant for the convergence of the optmzaton process. Ftness scalng processes the raw ftness value of ndvduals nto an approprate range. The way of ftness scalng we adopt s Rank methodology. 4. Selecton operaton. We choose the mostly used Roulette Wheel strategy as our selecton functon whch s descrbed by: F P se lect _ = (7) In the above formulaton, P select_ s the fnal possblty of selecton whle F s the ftness value of one sample after scalng and the sum of F s the total ftness value of the present generaton. 5. Crossover and reproducton operaton. Crossover operaton s an mportant way to enlarge populaton dversty and fnd the global optmzaton n the soluton space by exchangng the correspondng part of two parents generc code. Scattered crossover, sngle-pont crossover, two-pont crossover are frequently used for Crossover operaton, n whch twopont crossover can We choose two-pont as our crossover strategy because t can promote the search n the soluton space more thoroughly and prevent the early convergence to the local mnmum and we set the crossover possblty as 0.8. In addtonal, every generaton we wll retan 2 best ndvduals (elte) to next generaton 4. Mutaton operaton. We use an adaptve strategy called adaptve feasble for mutaton,.e., to set a large mutaton possblty value n the begnnng of optmzaton and set t smaller to converge to the fnal soluton. 4. Methodology and Flow of Synthess The am of nductor synthess s to get the layout-level geometrcal parameters accordng to the target electrcal desgn parameters such as, and so on. The four layout-level parameters of CMOS spral nductors are: n, the turns of spral; w, the wdth of metal lne; s, the spacng between the metal lnes; r, the nner radus. Based on the artfcal neural network and genetc algorthm methodology, the methodology and flow of synthess we adopt s shown n fgure.2 [6]:. Input the electrcal parameters of nductor to be optmzed. The electrcal parameters of nductor to be optmzed s the nductor value and the qualty value under the constrant of the nductor area. 2. Optmzaton process. F

4 Optmzaton process s an teratve process between the Genetc Optmzer and the Neural Network SPUNK. Because the turn n s dscrete, we set n as an approprate value before hand. Therefore, n the real optmzaton process, only w, s, r are beng optmzed n the Genetc Optmzer. The electrcal parameters, of every generatons of ndvdual are extracted n the Neural Network SPUNK. Then the Fgure 2: NEURO-genetc optmzaton PROCESS [6]. electrcal parameters wll be processed n the Genetc Optmzer. After generatons of optmzaton, the optmum layout parameters wll be output fnally. 5. Experments and results Our synthess experments are based on the octagon dfferental spral nductors of TSMC 0.3um MM/RF process and the geometrcal shape of an example nductor s seen n Fgure.3 [2]. Fgure.3. An example of octagon dfferental spral nductors (.5 turns) Accordng to our synthess flow, at frst, about 5,000 desgn samples are chosen from the desgn space and the range and the step of the layout parameters of the nductor s lsted n the Table Ⅰ. Then, the correspondent,, area of each desgn sample s calculated usng SPUNK. Compare these values of nductance wth the goal nductance and select the best results n and area. Parameter Ranges Step N W (um) 2-0 S (um) 2-6 R (um) Table :The range and the step of the layout parameters. All the followng experments are carred out on a computer wth 2.67GHz Pentum CPU and 448MB memory. Example: An nductor of 2.2nH wth mn of 0 operatng at the frequency of 2.45GHz s syntheszed. 4 desgn samples meet such requrements and ther correspondent parameters are lsted n Table Ⅱ. Experment N W S R Area Table 2: Synthess results of one nductor. Among these results, no.6 acheves max wth area of 3653um 2. So we choose n=2.5, w=0, s=2, r=65 as the optmzaton result. The whole synthess process costs 7.2s. Some other synthess examples are carred out wth dfferent and dfferent operatng frequency. The results are seen n Table Ⅲ. Experment f N W S R Tme(s) Table 3: Synthess results of nductors. The results above show the rule that and are contradctve: when s large, must be low and vce versa. All of the synthess s fnshed n about 7s, whch ndcate our synthess methodology s a fast and effectvely way. 6. Concluson

5 A novel wde-band layout-level synthess methodology based on coupled Artfcal Neural Network and generc algorthm s developed n ths paper. Due to the hgh speed and hgh accuracy of Artfcal Neural Network smulator SPUNK and the global optmzaton ablty of genetc algorthm, the synthess of layout-level spral nductors becomes smple and fast wth hgh accuracy. A lot of experments are done to prove the advantages of ths methodology. Ths novel synthess approach s sutable for beng employed n the desgn and layout optmzaton of nductors of RF crcuts. References [] S. Mukherjee, B. Mutnury and S. Dalma, ayout-evel Synthess of RF Inductors and Flters n CP Substrates for W-F Applcatons, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIUES, 53(6), JUNE [2] Y. Cao, R.A. Groves, and Xuejue Huang, Frequency-Independent Equvalent-Crcut Model for On-Chp Spral Inductors, IEEE JOURNA OF SOID-STATE CIRCUITS, 38(3), MARCH [3] N. A. Talwalkar, C.P. Yue, and S.S. Wong, Analyss and Synthess of On-Chp Spral Inductors, IEEE TRANSACTIONS ON EECTRON DEVICES, 52(2), FEBRUARY [4] T. u,research of Artfcal Neural Network Based Modelng Approach for RF Components, Dssertaton Submtted to Tsnghua Unversty n partal fulfllment of the requrement for the degree of Master of Engneerng,2006. [5] T. u, W.J. Zhang, and Z.P. Yu, Modelng of Spral Inductors Usng Artfcal Neural Network, Proceedngs of Intematonal Jont Conference on Neural Networks, Montreal, Canada, July 3 - August 4, [6] H.J. Wang, J., H.G. u, J.S. Jang, The Applcaton of FDTD and Mcro Genetc Algorthms to the Planar Spral Inductors, ENGINEERING SCIENCE, l6(): 3-8, [7] T.S. Horng, J.K. Jau, C.H. Huang, and F.Y. Han, Synthess of a Super Broadband Model for On- Chp Spral Inductors, 2004 IEEE Rado Frequency Integrated Crcuts Symposum, TUlD-3 [8] A. Neuwoudt, Yeha Massoud, Robust Automated Synthess Methodology for Integrated Spral Inductors wth Varablty, ICCAD IEEE/ACM Internatonal Conference on Computer-Aded Desgn, pp , [9] José Ernesto, Rayas-Sánchez, EM-Based Optmzaton of Mcrowave Crcuts Usng Artfcal Neural Networks: The State-of-the-Art, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIUES, 52(), JANUARY [0] C. Yldz, Mustafa Turkmen, Very accurate and smple CAD models based on neural networks for coplanar wavegude synthess, 2005 Wley Perodcals, Inc. Int J RF and Mcrowave CAE 5: 28 4, 2005 [] W. Gao, Scalable Compact Crcut Model for Spral Inductor-ke Components n CMOS RF ICs, Dssertaton Submtted to Tsnghua Unversty n partal fulfllment of the requrement for the degree of Doctor of Engneerng,2006. [2] M. n, Y.M., H.Y. Chen, An Optmzaton Technque for Planar Spral Inductor Based on the Inductor's Physcal Model and Genetc Algorthm,Chnese Journal of Semconductors, (7):897~903, 200. [3] R.J. Pratap, S. Sarkar, Stephane Pnel, Modelng and Optmzaton of Multlayer RF Passves Usng Coupled Neural Networks and Genetc Algorthms, 2004 IEEE MlT-S Dgest, /04. [4] S.K. Mandal, A. De, A 20GHZ COMPACT SCAABE MODE OF SIICON-BASED ON-CHIP SPIRA INDUCTOR FOR RFICS, th Int. Crmean Conference: Mcrowave & Telecommuncaton Technology (CrMCo'2005). 2-6 September, Sevastopol, Crmea, Ukrane. [5] D. Goldberg, Genetc Algorthms n Search, Optmzaton & Machne earnng, Mass: Addson Wesley, 989. [6] R.J. Pratap, S. Sarkar and S. Pnel, Modelng and optmzaton of multlayer RF passves usng coupled neural networks and genetc algorthms, IEEE MTT-S Dgest, 2004.