Chapter 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages

Transcription

1 Chapter 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages Eric A. Sanjuan and Sean S. Cahill Abstract As integrated circuit speeds and bandwidth needs increase, low-cost packaging and interconnect technology continue to be challenges. Solutions to these problems are driven by consumers desire for increasing bandwidth (e.g., portable communications applications) and manufacturers desire to drive down system cost (e.g., taking advantage of volume manufacturing processes). This work describes a low-cost plastic QFN package possible of meeting these needs. This package has low-loss, high-bandwidth and is based around microcoax interconnect technology. Since this package structure is broadband, it allows for a variety of chipsets to be assembled using the same process sequence and I/O configuration, thereby eliminating costly overhead. With less than 0.5 db insertion-loss and >15 db return-loss per RF interconnect at 50 GHz, a 5 5 mm microcoax QFN package allows existing bare-die only applications to enter the world of high-speed PCB assembly, significantly driving down the cost of high-frequency RF subsystems. Process technology, I/O performance, active device performance, PCB board material selection and test protocol will all be discussed. 2.1 Introduction Electronic devices and components are operating at ever increasing speeds and over increasing frequency ranges. For this reason, electronic device packages can become a source of performance degradation, often leading high-frequency system designers to dispense with a package altogether. Such bare die approaches frequently give inconsistent performance as the devices are subjected to environmental stresses to a greater degree than packaged devices. Commonly available high-frequency packages, often constructed from metal and ceramic laminates, address some of the E.A. Sanjuan (B) BridgeWave Communications, Inc., Santa Clara, CA 95054, USA K. Kuang et al. (eds.), RF and Microwave Microelectronics Packaging, DOI / _2, C Springer Science+Business Media, LLC

2 26 E.A. Sanjuan and S.S. Cahill concerns imparted by standard package approaches in that they bring controlledimpedance planar waveguide structures such as microstrip and coplanar waveguide (CPW) interconnects very close to the device. Device and waveguide are then connected by a short wire bond, ribbon bond, or flip-chip bump. While this provides a performance improvement, bonds and bumps still do not comprise waveguide structures, and therefore create signal mismatch at each occurrence. Solitary bonds and bumps are inductors at high frequencies, and so a matching network structure is typically constructed on the device, package, or printed circuit board (PCB) in order to cancel the effect of the inductance. This solution then results in frequency range or bandwidth limitations for the device-package-pcb system. A further drawback of this approach is that the typical high-frequency package is much more expensive than its common low-frequency counterpart, in large part because of the RF tune/test/rework yield impacts associated with conventional assembly technologies at these higher frequencies. An alternative approach is needed. 2.2 MicroCoax Approach MicroCoax, an approach based on wire bonding, is similar in structure to common 50 coax cable. MicroCoax allows signals to flow over large frequency ranges from 0 to 115+ GHz, with significant impedance matching and very little cross-talk. The main differences between microcoax and common coax cable relates to coax sizes, connection, and fabrication techniques. The following formula may be used to estimate the impedance, Z 0, of a coaxial transmission line: Z 0 : = 138 ( ) b log (2.1) εr a Where a is the diameter of the bond wire, b is the outside diameter of the dielectric, and ε r is relative permittivity of the coaxial dielectric. A typical microcoax is about 70 μ in diameter, or about the width of a single human hair. To turn a wirebond into a microcoax, the process is relatively simple. First, chips to be packaged are die-attached. Then, the chip is wirebonded using a conventional wire bonder. Next, the chip and wire bonds are coated with a plastic layer forming the coaxial dielectric that is very uniform and of precise thickness. Metal coating on the outside of a coax is tied to ground through small holes, which are made using standard laser trimming equipment, in precise locations on the package. The metal may be selectively patterned (so that ground metal is not on the chip surface) through an additional process step. This ground on the outside of the microcoax creates an impedance-controlled structure, shields from noise, and prevents signal leakage (Figure 2.1). Unlike bare wires or flip-chip bumps, coax cables are matched in impedance to the devices that they connect and thus do not exhibit limited bandwidth behavior of lumped structures. This advantageous behavior is depicted in Figure 2.2, which shows measured insertion and return loss performances of microcoax through-line

3 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 27 Fig. 2.1 Standard coax structure compared to wirebond-based microcoax Fig. 2.2 Performance of 2.2 mm long microcoax structures connected to CPW I/Os for probing purposes. Note that the insertion loss is less than 0.7 db at any point from 0 to 115 GHz. The return loss is never worse than 15 db, and typically better than 20 db across this same band. Example test structures are shown in Figure 2.3. Fig. 2.3 MicroCoax test structures (L to R): Dielectric-coated wirebonds; 2 Views of CPW probing structures after outer metal shield is in place. Note the circular vias to establish ground Key to the performance of microcoax is how well the formation process can produce interconnects of the desired impedance. High-frequency devices have mostly standardized on input and output impedances of 50, so the process to-date has focused on this target value. Equation 2.1 shows that for a given dielectric constant, once the center conductor diameter is fixed, the characteristic impedance is purely a function of the dielectric diameter. Wire bond diameter batch-to-batch variation is about ±3%, and is primarily due to variation from die-to-die in the wire-drawing tooling. Process variation accounts for less than 1% tolerance of the final diameter.

4 28 E.A. Sanjuan and S.S. Cahill With these assumptions in mind and utilizing the materials set under discussion, variation in wire diameter produces about 2.2% variation in final impedance value. Presuming that target thickness of deposited dielectric is controlled to the same level, one can assume deviation from target impedance of about ±3%. In terms of return loss, the impact is less than 30 db, and therefore negligible. Other sources of variation, such as deposition uniformity, must also be considered. The process for creating the dielectric coating utilizes vacuum-condensation, and is thus extremely uniform. Variations can occur if diffusion of reactant species is somehow limited, thus it is useful to consider how such variations might impact performance. One can model this problem as a simple conductor positional offset within the coax structure. An example of this approach is shown in Figure 2.4. Fig. 2.4 Offset conductor impedance model and cross-section of offset conductor Table 2.1 shows that offset has a very weak impact on impedance, as the core has to be offset by 40% of the dielectric thickness before the impedance changes by 10%. A 10% offset leads to impedance changes of about 0.3. Thus, process induced offset is not a major concern. Table 2.1 Impedance as a function of offset % Offset Impedance

5 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages Packaging Approaches Once the power of microcoax as an interconnect technology was realized, packaging approaches were developed around it. This led to the possibility of making extreme-performance packaging for high-end applications on a chip scale. The highest performing package I/O structure for marriage with a microcoax interconnect would seem to be something of the same form factor, namely a coaxial feedthrough. Such a package is shown in Figure 2.5. Fig. 2.5 Coaxial Feedthough package with microcoax interconnects with test die (left) and with port-to-port through lines of various lengths (right) The process sequence for creating such a package, as earlier described, is shown in Figure 2.6 and comprises the steps of: (1) forming dielectric donuts, (2) build-up of metallic package with feedthrough. This approach allows for creation of hermetic packages when combined with a glass or ceramic donut for the dielectric, as metal + glass/ceramic constructions have excellent gas impermeability. Fig. 2.6 Process sequence for coax feedthrough package and dielectric donut example

6 30 E.A. Sanjuan and S.S. Cahill Package assembly steps (Figure 2.7) include: (1) die attach and wire bond, (2) coat with conformal dielectric, (3) laser via formation, (4) selective metallization. Lidding would comprise the final step of the assembly. A formed-metal cavity lid, with a soldered or brazed seal, creates a fully hermetic assembly. If hermeticity is not a requirement, other lid materials can be used, and even overmolding may be applied. Existing semiconductor backend equipment can be used to execute every step of the assembly. Fig. 2.7 MicroCoax creation on coax feedthough package Figures 2.8 and 2.9 show an GHz LNA interconnected with microcoax. Note that ground metal appears only in the areas near the I/O regions. The performance of this device is shown in Figure The solid S21 line in the figure shows the essentially lossless performance vs. compensated probe data (dots) from the manufacturer. Performance over the band of interest is excellent. Slightly early roll-off is due to the lack of 0.2 nh inductance from a bare wirebond expected at each port. Excellent return loss characteristics demonstrate the minimal impact of the package implementation on the overall performance. This further implies that the inductance-compensating structures of the MMICs may be eliminated through Fig. 2.8 MicroCoax-interconnected MMIC (left to right): UMS CHA2069 with patterned ground; I/O area prior to via formation (note center conductor); I/O after via/patterned ground formation

7 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 31 Fig. 2.9 X-ray micrograph of packaged UMS CHA2069. Coaxial structure of interconnects is visible, as are ground vias within the MMIC chip Fig MicroCoax interconnected MMIC performance the use of microcoax, further improving bandwidth. This, in turn, would allow reduction of chip size, saving costly real estate, and lowering chip cost. The coaxial feed-through structure of the package described so far has some unique assembly requirements. To use the coaxial feed-through in combination with PCB routing structures requires the ability to create a transition from the coaxial structure of the package to the planar waveguide structure, either coplanar or microstrip, that will propagate signals around the board. The assembly technology is not too different than that commonly used for ball-grid array (BGA) or other higher I/O count surface-mount packages. Figure 2.11 is an x-ray micrograph of a

8 32 E.A. Sanjuan and S.S. Cahill Fig Package attach to PCB. Small circular vias scattered about the attach area are thermal vias in the PCB typical microcoax package board attach. What is meaningful to note in this micrograph is that there are no voids in the die attach area underneath the package, and that all center conductors are contiguous (dark grey areas) with board leads Limitations to the Approach The coaxial package, combined with microcoax interconnects, provides many desirable characteristics. These significant advantages, however, can also be an Achilles heel when cost-sensitivity begins to dominate package considerations. The use of coaxial feed-throughs, in this glass/metal surface-mount package, is unique in the assembly industry. The hermetic performance of this geometry is ideal for demanding military and space-born applications. Such an attribute is neither necessary nor cost-effective for most consumer applications. We must therefore ask ourselves, is another less-costly, high-volume friendly approach possible? 2.3 MicroCoax/Leadframe Approach With the foregoing discussion in mind, the ideal package would have the following attributes: Low-cost of package and assembly Standard package outline Surface mount suitable for pick and place Controlled impedance from PCB to die interface

9 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 33 Integral shielding to minimize cross-talk Good thermal dissipation Multi-chip and passives possible Internal routing possible A standard JEDEC 95 Quad Flat No-lead (QFN) package of the open-cavity variety (depicted in Figure 2.12) has several desirable attributes (ie. 1, 4, and 5), while having some performance limitations. With careful design, QFN packages are used up to GHz frequencies. The main limitation of QFNs has been the bare wirebond interconnections, as they are not waveguides. Fig Standard open cavity QFN packages Package I/O Structure Considerations In order to achieve good signal propagation characteristics from the PCB, into the package, through the interconnect, and to the chip, the entire signal path must be considered as a waveguide. Different waveguide geometries are possible. Substrate waveguides are typically one of three common varieties: microstrip, stripline, and coplanar waveguide (CPW). The devices are waveguides because they have both signal and ground leads held in a specific geometric arrangement that allows for controlled impedance. The CPW configuration in particular is implemented through the arrangement of three leads in a ground-signal-ground (GSG) arrangement on single plane. The width of the signal lead, and the gaps between the signal and ground leads, and the dielectric constant of the substrate material are key determinants of the impedance of the CPW configuration. The stripline has a similar GSG configuration, but the arrangement is layered in stacked planes rather than on a single plane, rendering it more complex for attachment to a PCB. Leadframe-style packages lend themselves to consideration as quasi-cpw or quasi-stripline waveguides. Three adjacent leads on the leadframe may be configured in a GSG arrangement, thus a waveguide-like structure is achieved. A

10 34 E.A. Sanjuan and S.S. Cahill standard QFN package may range in lateral dimension from 3.0 to 12.0 mm in increments of 0.5 mm. Typical terminals range in width from 0.15 to 0.5 mm, range in pitch from 0.4 to 1.27 mm, and have a thickness from seating plane to upper terminal surface of 0.2 mm and overall height of mm. Given this range of dimensions, a wide range of impedances may be realized, crudely estimated as variable from 30 to 120 s with a typical plastic material of dielectric constant value ranging from 3.5 to 4.0. As previously discussed, impedance of 50 is typical for the I/O s of devices operating in the 10 s of GHz such as millimeter-wave integrated circuits (MMICs). The typical desired impedance for device packages, utilizing a GSG structure, is thus achievable within the allowed dimensional ranges of industry standard QFN packages. Matching the impedances between two structures is not a sufficient condition for efficient energy transfer in waveguides, however. In a CPW, energy is distributed primarily in the two gaps between the signal lead, and the ground electrodes adjacent to it. This shaping of the electromagnetic energy is known as the mode shape. Similarly, in a coaxial waveguide in its lowest order mode, the energy fills the entire space between the center conductor and the outer ground shield. The fundamental modes in the respective waveguides are very different in shape, thus coupling from one waveguide structure to another can cause reflections that are detrimental to performance. For this reason, it is important to blend the energy distribution shapes as smoothly as possible from one waveguide type to another. This blend region is known as a transition. The previously discussed JEDEC Design Guides do not limit dimensions and spacings internal to the package, but only define the external elements. Complex three-dimensional (3-D) shapes created with dissimilar front and back photolithographic patterns allow for sculpting of signal lead and ground lead shapes such as may be useful for creating mode transforming structures that transform from CPW, with its planar GSG configuration, to a coaxial bond wire, with its concentric signal-insulator-ground structure. Thus, two-sided forming can create 3-D mode transforming shapes in the metallic leadframe Modelling the Signal Path The transforming structures are typically not simple geometric blends of one shape into another. This is because both spacings and shapes control reactive impedance. Analytical and numerical analysis tools are brought to bear to optimize the overall performance of the transition region. Both frequency-domain and time-domain approaches are useful for this purpose. Frequency domain analysis allows one to assess performance at any given frequency over the entire frequency band of interest. Time domain analysis allows one to identify trouble spots in the transmission path, which can cause energy reflections. Localizing the sources of mismatch permits optimization of the geometries of leads and adjacent spaces for improved performance.

11 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 35 Fig (a) Package I/O structure solid model. (b) Package I/O structure EM simulation Numerical approaches (e.g., CST Microwave Studio) can be used to simulate the expected performance of different design variants, as can be seen in Figure The high frequency input ports of the package have several parameters that can be varied in order to optimize performance. Because of the lithographic process used to define the shapes in the leadframe, parameters of concern are easily divided into an external and an internal layer. Each of the parameters has some influence on performance, but some are much more significant in their effect than others. Figures 2.14 and 2.15 show the results of frequency domain models. The effect of varying the side gap (Figure 2.14) is quite significant. Figure 2.15 shows the effect of varying the front gap, which is relatively small. Parameters also have interactive effects, which can be quite challenging to adequately characterize. For this reason, it is helpful to create parameterized electromagnetic models, which can automatically vary parameters, and optimize for the best performance. Such optimization criteria include minimizing S21 (insertion loss) and S11 (return loss), while maximizing

12 36 E.A. Sanjuan and S.S. Cahill Fig Parametric model return loss: Large impact of varying the side gap Fig Parametric model return loss: Small impact of varying the front gap bandwidth for frequency domain models and minimizing the effects of dimensional variation and tolerance on performance. Time domain models such as time domain reflectometry (TDR) are similarly useful for optimization. The models are useful for probing discontinuities in the signal propagation path. The greater the reflected signal, the worse is the impedance mismatch at a given propagation distance into the path. Thus, the actual location of impedance mismatch can be established. With this tool, one would optimize for best impedance match and least reflected energy. Figures 2.16 and 2.17 show the impact with variation of different parameters on the instantaneous impedance as a wave travels from the simulated PCB, through the package leads, and into the coaxial bond wire to the chip and out through a reciprocal path (note the relative symmetry of the waveforms). The effect of the chip is ignored for the purpose of these models. An ideal characteristic for this simulation is a constant 50 impedance for the entire signal propagation time.

13 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 37 Fig Parametric model time domain: Impedance estimate as a function of a signal line width parameter Fig Parametric model time domain: Impedance estimate as a function of a signal line shape parameter Thus, modeling allows one to optimize the design of quasi-cpw inputs of the package for performance criteria such as impedance and signal integrity. The present-day leadframe and transfer molding fabrication methods, as well as assembly technologies, place some limits on the achievable geometries in such a package. It is anticipated that fabrication technology improvements will permit consequent improvements in achievable designs and package performance with time.

14 38 E.A. Sanjuan and S.S. Cahill Figure 2.18 shows the simulated performance of a package input port, leading toa50 termination internal to the package in order to simulate attachment to a MMIC. At 80 GHz, insertion loss is predicted to be about 0.6 db, and return loss to be 18 db. This is quite acceptable, as most MMICs of interest have broadband return loss characteristics of db. Fig Optimized package model 0 to 80 GHz Performance In order to evaluate performance characteristics for actual microcoax enhanced packages, port-to-port thrus were constructed. The package has the general outline of the standard QFN (Figure 2.12), but contains geometric enhancements internal to the package that vastly improve the high frequency performance when used in combination with microcoax. The resulting device is depicted in Figure Fig MicroCoax enhanced QFN package (left to right): A bare package with enhanced ports; the same package with coaxial through-line; close-up of port/through-line structure

15 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 39 This testing configuration is really an acid-test of performance, because the longest interconnect is constructed (>4 mm long), maximizing insertion loss, and the back-to-back connections essentially double the return loss. Testing of the through-line structures can be performed with a vector network analyzer (e.g., Agilent 8510C VNA) and appropriate fixturing (e.g., Anritsu 3680 V-band Universal Test Fixture). Figure 2.20 shows data collected from a Fig Fixture based test of back-to-back through-line. Lower return loss line shows predicted performance of single I/O connecting to a perfect 50 termination internal to the package Fig Un-mounted package vs. PCB-mounted package performance. Both parts were placed in test fixture so that performance could be directly compared

16 40 E.A. Sanjuan and S.S. Cahill package as shown in Figure In this particular case, SOLT-based coaxial calibration was used, so the losses of the test fixture are embedded in the data. There are methods to de-embed the test fixture effects from the data, such as TRL and its variants, but these approaches generally have bandwidth limitations. Since we are looking to assess performance over the entire band from near-dc to 50 GHz, coaxial calibration up to the test fixture gives us a reasonable measure of system performance over the entire band. In the instance where a specific band of interest is desired, a TRL method may be preferred. Most important in the test device evaluation is the entire utilized path. In other words, a package must ultimately be attached to a PCB, and the performance on the PCB, ideally, would be no worse than the bare package itself. Figure 2.21 shows that this goal has been achieved. The on-board performance (bold lines) is generally better at all frequencies than the un-mounted performance (thin lines) for both the insertion loss and return loss characteristics. This is because the interconnectpackage-pcb system was modeled and designed to optimize mounted performance. The PCB test board is fabricated from Rogers 5880 and was approximately 1 cm in length. The connectors of the Anritsu 3680 are representative of typical v-band edge connector performance. The impact of the package on performance of MMICs is the ultimate test of utility. One of the important features of this package is its substantial bandwidth. The CHA2069 (available from United Monolithic Semiconductor) is an GHz Low Noise Amplifier (LNA) with nice performance characteristics. A device with this significant bandwidth will challenge most packaging approaches, as they are usually optimized to operate over a limited band. Figure 2.22 compares the bare die Fig Comparison of bare die and microcoax-enabled QFN (mqfn) package performance. Note low impact on insertion loss and slightly early roll-off due to lack of parasitic inductance

17 2 Low-Cost High-Bandwidth Millimeter Wave Leadframe Packages 41 and microcoax-enhanced QFN (mqfn) approaches for this MMIC LNA. The reference plane for evaluating the bare die is at the probe pads on the die surface, and neglects any interconnect losses. The LNA with mqfn packaging is mounted on a PCB and placed in the previously described Anritsu 3680 test fixture. The reference plane for evaluating the LNA is external to the test fixture for reasons previously discussed. This creates an effective path difference of approximately 18mm between bare die and PCB implementation reference planes. There are several things to note in the performance comparison. First, the mqfn package has little impact on insertion loss through the gain region, exhibiting performance approaching the bare die itself. This is especially noteworthy given the presence of connector, PCB, and transition losses. Second, the leading edge of the respective S21 graphs overlay one another perfectly. The trailing edge shows slightly early roll-off of the mqfn part. This is due to the fact that most MMICs are designed to compensate for nh of series inductance arising from the wirebond interconnects through the use of additional capacitance at the I/Os. Because the mqfn interconnects are true coaxial waveguides, there is no lumped inductance to compensate. This leads one to propose that mqfn style packaging might allow for elimination of the capacitive compensation structures, and permit some shrinkage of the die. This, in turn, would have cost benefits accruing from higher die count per wafer. Fig Comparison of QDG vs. mqfn package performance. Note the improved gain flatness and superior return loss characteristic

18 42 E.A. Sanjuan and S.S. Cahill As previously discussed, existing package offerings for MMICs do not typically have the wide band performance of mqfn. A packaged CHA2069 is commercially available in a 4mm QFN. This offering carries the designation QDG. Figure 2.23 compares published data for the QDG package vs. the mqfn. There are several important performance aspects that should be noted. First, note that the gain flatness over the GHz band is significantly better for the mqfn that for the QDG, ±3 db vs. ±0.6 db, or 5 better flatness. Secondly, the input return loss (S11) is better for the mqfn at nearly all frequencies, with as much as 12 db improvement at some instances. Again, the QDG package data assumes a reference plane immediately external to package and excludes connectors or board transmission lines (approx. 6.2 mm path), while the mqfn data includes all connector, PCB, and transition (approx. 20 mm path) losses. 2.4 Conclusion High performance microcoax interconnects have been successfully applied to multiple package configurations, including high-volume compatible QFN outlines. Since these package structures are broadband, they allow for assembly of a variety of chipsets using identical process sequences and I/O configurations, vastly reducing overhead associated with multiple unique solutions. Costly measures such as custom substrates, wire bond trajectory adjustments, and trimming procedures can be eliminated. With less than 0.5 db insertion-loss and >15 db return-loss per RF interconnect form DC 50 GHz, a 5 5 mm microcoax QFN package allows existing bare-die only applications to enter the world of high-speed PCB assembly, significantly driving down the cost of high-frequency RF subsystems. This material is based, in part, upon work supported by the National Science Foundation under Grant No