Product Specification

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1 AT320 Preliminary Product Specification Product : Time to Digital Converter IC Model : AT320 [DATE ] Written by Checked by 1 Checked by 2 Approval by SNA Co., LTD Customer OTRON ELECTRONIC TECHNOLOGY CO., LTD.

2 Revision history No Date Page Change information ALL Preliminary ALL Preliminary 1

3 Table of contents 1. Overview 1.1 Description Features Applications Block Diagram Pin Configuration Pin Assignment Electrical Characteristics 2.1 Absolute Maximum Rating Recommended Operating Condition Electrical Characteristics Converter Specification 3.1 Timing Measurement Unit Timing 4.1 Oscillator Serial Interface Disable Timing Reset Timing Registers 5.1 Configuration Registers Read 14 Registers OPCODES Operation 6.1 START and STOP Signal Timing Requirement Measurement Flow Calibrating a High Frequency Oscillator Flow Package Dimension 7.1 Package Dimension

4 Time to Digital Converter IC 1. Overview 1.1 Description The AT320 IC is a time to digital converter (TDC) integrated circuit for accurate time measurement devices. TDC function can be measurement the interval time between each Start to Stop1 or Stop2 signal and Stop1 to Stop2 signal. AT320 time measurement resolution LSB is typical 30ps. 1.2 Features Provide 4-wire SPI interface NVRAM for configuration registers 500kHz continuous data rate max Measurement range : 3ns~30us 15ns pulse-pair resolution with 4-fold multi-hit capability 1.8V LDO integrated I/O voltage : 2.5V to 3.6V Core Voltage : 1.8V to 3.6V Power on reset Operating temperature range : -40 to +125 QFN32 package 1.3 Applications Ultra sonic meters LIDAR & TOF(Time of Flight) application Position Sensor 3

5 1.4 Block Diagram 1.5 Pin Configuration < QFN-32 Package Top view > 4

6 1.6 Pin Assignment Pin No. Pin Name Pin Description Note 1 XIN Oscillator input X tal 2 XOUT Oscillator output X tal 3 VIO I/O power 4 GNDO I/O ground 5 MUX_OUT Internal signal monitoring Test mode 6 NVREF_EXT NVRAM test Test mode 7 VB Version test VB to GND Test mode 8 INT Interrupt flag Active low 9 SSN SPI slave select Active low 10 SCK SPI clock interface 11 SI SPI data input interface 12 SO SPI data output interface 13 RSTN Reset input Active low 14 VCC Core power 15 NC No connect 16 NC No connect 17 NC No connect 18 VIN LDO power 19 VLDO 1.8V internal LDO output 2.2uF connect 20 NC No connect 21 GND LDO ground 22 VIN LDO power 23 ALDO 1.8V internal LDO output 100uF connect 24 ABIAS Delay core bias Tie to ALDO 25 EN_STOP2 Enable STOP2 input Active High 26 EN_STOP1 Enable STOP1 input Active High 27 STOP2 STOP2 input Not use to GND 28 GNDC Core ground 29 VCC Core power 30 STOP1 STOP1 input Not use to GND 31 START START input 32 EN_START Enable START input Active High 2. Electrical Characteristics 5

7 2.1 Absolute Maximum Rating Symbol Parameter Conditions Min Typ Max Unit Vcc Core supply voltage VCC vs. GNDC Vio I/O supply voltage VIO vs. GNDO V Vin LDO supply voltage VIN vs. GND Tstg Storage temperature Tj Junction temperature Recommended Operating Condition Symbol Parameter Conditions Min Typ Max Unit Vcc Vio Vin Core supply voltage I/O supply voltage LDO supply voltage VCC=VIO=VIN V Ta Ambient temperature Tj must not exceed Electrical Characteristics (Vio=Vcc=Vin=3.3V, Tj=-40 to 85 C) DC Characteristics Symbol Parameter Conditions Min Typ Max Unit Itmu Time measurement current During time measurement 4 ma Voh High level output voltage 0.8Vio V Vol Low level output voltage 0.2Vio V Vih High level input voltage LVTTL Level 0.7Vio V Vil Low level input voltage LVTTL Level 0.3Vio V Vth High level Schmitt trigger voltag e 0.7Vio V Vtl Low level Schmitt trigger voltag e 0.3Vio V Vh Schmitt trigger hysteresis 0.28 V Terminal Capacitance Symbol Parameter Conditions Min Typ Max Unit Ci Digital input 7 Vcc=Vio=Vin Co Digital output TBD f = 1 MHz, Ta = 25 C Cio Bidirectional 9 pf 6

8 3. Converter Specification (Vcc=Vio=Vin=3.3V, Tj=25 C) 3.1 Timing Measurement Unit Symbol Parameter Conditions Min Typ Max Unit LSB Resolution(BIN=Size) 30 ps Conversion Rate 500 KHz Standard deviation Delay 200ns <40 ps Tm Measurement Range 3ns 500ns INL Integral Non-linearity TBD LSB DNL Differential Non-Linearity TBD LSB 4. Timing (Vcc=Vio=Vin=3.3V, Tj=25 C) 4.1 Oscillator Symbol Parameter Conditions Min Typ Max Unit Clk32 32kHz reference oscillator khz ClkHS High speed reference oscillator MHz 4.2 Serial Interface Symbol Parameter Vio 2.5V 3.3V Unit Fclk Serial clock frequency MHz Tvd Data valid after SCLK rising ns Symbol Parameter Vio Unit Tpwh SCK pulse width high Tpwl SCK pulse width low Tsussn SSN enable to valid latch clock Tpwssn SSN pulse width between write cycles ns Thssn SSN hold time after SCK falling Tsud Data set-up time prior to SCK falling 5 5 Thd Data hold time before SCK falling

9 SSN : Slave select SCK : SPI clock SI : SPI data in SO : SPI data out * AT320 serial interface is compatible with 4-wire standard. It needs the SSN(Serial Select Not) signal. The AT320 does only support the following Motorola specification SPI mode. Clock Phase Bit = 1, Clock Polarity Bit = Disable Timing Symbol Description Typ. Tsen Enable setup time 0ns Tshen Enable hold time 1.5ns 4.4 Reset Timing Symbol Description Typ. Tph Reset pulse width 50ns Trfs Time after rising edge of reset pulse 200ns 8

10 5. Registers 5.1 Configuration Registers AT320 has 2 configuration registers with 32bit. AT320 has default value on power on reset. Configuration registers can be write by opcode h8x. Register Configuration - Register table index Register Address Number Bit Number Parameter Index (4) (5) (6) (7) - (8) Default Value Register table Register 0 ( Address 0 ) (1) (2) (3) (4) (5) (6) (7) - (8) Register 1 ( Address 1 ) (9) (10) (11) (12) (13) (14) - - (15) Register 2 ( Address 2 ) (16) (17) Register 3 ( Address 3 ) (18) (19) (20) (21) (22) (1) DIV_CLKHS[1:0] Sets pre-divider for CLKHS 0 = Divide by 1 1 = Divide by 2 2 = Divide by 4 9

11 (2) START_CLKHS[2:0] Defines the time interval the chip waits after switching on the oscillator before making a measurement 0 = Oscillator off 1 = Oscillator continuously on 2 = Settling time 480us 3 = Settling time 1.46ms 4 = Settling time 2.44ms 5 to 7 = Settling time 5.14ms (3) CALIBRATE Enables/disables calibration calculation in the ALU Disable(0), Enable(1) (4) NO_CAL_AUTO Enables / disables auto calibration run in the TDC 0 = Auto-calibration after measurement 1 = Auto-calibration disabled (5) NEG_START Negation of Start input 0 = Non-inverting input signal - Rising Edge 1 = Inverted input signal - Falling Edge (6) NEG_STOP1 Negation of STOP1 input 0 = Non-inverting input signal - Rising Edge 1 = Inverted input signal - Falling Edge (7) NEG_STOP2 Negation of STOP2 input 0 = Non-inverting input signal - Rising Edge 1 = Inverted input signal - Falling Edge (8) EN_START_OFFSET 10

12 Enables start calculation offset 0 = Start calculation offset disable 1 = Start calculation offset enable (9) HIT2[3:0] Defines operator for ALU data processing 0 = Start 1 = 1 stop ch1, 2 = 2 stop ch1, 3 = 3 stop ch1, 4 = 4 stop ch1 5 = No action, Measurement Mode1 : HIT1 HIT2 6 = Cal1 ch1 7 = Cal2 ch1 9 = 1 stop ch2 A = 2stop ch2 B = 3stop ch2 C = 4 stop ch2 (10) HIT1[3:0] Defines operator for ALU data processing 0 = Start 1 = 1 stop ch1, 2 = 2 stop ch1, 3 = 3 stop ch1, 4 = 4 stop ch1 5 = No action, 6 = Cal1 ch1 7 = Cal2 ch1 9 = 1 stop ch2 A = 2stop ch2 B = 3stop ch2 C = 4 stop ch2 (11) HITIN2[2:0] Number of expected hits on stop channle2 0 = Stop channel 2 disabled 1 = 1 hit 2 = 2 hits 3 = 3 hits 4 = 4 hits 5 to 7 = Not permitted. 11

13 (12) HITIN1[2:0] Number of expected hits on stop channle1 0 = Stop channel 1 disabled 1 = 1 hit 2 = 2 hits 3 = 3 hits 4 = 4 hits 5 to 7 = Not permitted. (13) SEL_TSTO2[2:0] Defines functionality of EN_Start pin. EN_Start Pin can act as output for various signal 0 = Start Enable input pin 1 = START_TDC output 2 = STOP1 TDC output 3 = STOP2 TDC output (14) EN_INT[3:0] Activates interrupt sources wired by OR. Bit 0 = ALU interrupt enable Bit 1 = Timeout interrupt enable Bit 2 = End Hits interrupt enable Bit 3 = End of EEPROM action (15) EN_ERR_VAL Timeout forces ALU to write hffffffff into the output register 0 = Disabled, 1 = Enabled (16) CAL_START_OFFSET ALU data offset User keep default value (17) Test En Test data writable register 0 = Disabled 1 = Enabled 12

14 (18) DIGITAL_TRIM_LDON Reserved User keep default value (19) DIGITAL_TRIM_LDOP Internal VLDO trimming 32bit register 0 = 1.6V, 31 = 2.35V Recommended default value (20) ANALOG_TRIM_LDON Reserved User keep default value (21) ANALOG_TRIM_LDOP Internal VLDO trimming 32bit register 0 = 1.6V 31 = 2.35V Recommended default value (22) ANALOG_TRIM_ADC Reserved User keep default value 13

15 5.2 Read Registers The result and status registers can be read by opcode hbx. ADR Symbol Bits Descriptions Note 0 RES_0 32 Measurement Result 1, fixed-point number with 16 integer and 1 6 fractional digits , RES_1 32 Measurement Result 2, fixed-point number with 16 integer and 1 6 fractional digits 2 RES_2 32 Measurement Result 3, fixed-point number with 16 integer and 1 6 fractional digits 3 RES_3 32 Measurement Result 4, fixed-point number with 16 integer and 1 6 fractional digits 4 STAT ~22 ~19 ~16 TBD TBD Time # of # of ALU TBD TBD TBD out hits hits OP TDC CH CH PTR 2 1 Result Registers RES_0 to RES_3 registers are result register. Negative results are possible - Measurement with calibration ( CALIBRATE = 1 ) Calibrated data are 32 bit fixed point numbers with 16 integer bit and 16 fractional bit. >> Time = RES_X * Tref * 2 DIV_CLKHS (DIV_CLKHS = divided by 1, 2 or Tref = 1/ClkHS (ClkHS = High speed oscillator RES_X = (HIT1-HIT2)/(cal2-cal1), Cal2-Cal1 = gradient 14

16 AT320 generates START/STOP pulses from high frequency reference oscillator. - Measurement without calibration ( CALIBRATE = 0 ) Non-calibrated data are stored as a 16bit value(signed Integer) in the high word of the result registers. >> Time = RES_X * LSB = RES_X * 30ps Status Registers ALU_OP_PTR : ALU operation pointer. Pointer to the result register. # of hits Ch 1 : Number of hits registered on channel 1 # of hits Ch 2 : Number of hits registered on channel 2 Timeout TDC : Indicates an overflow of the TDC unit, 1 = overflow 5.3 OPCODES Hex MSB LSB Description h8x A2 A1 A0 Write into address A hbx A2 A1 A0 Read from address A hc hf Write configuration registers into EEPROM Transfer EEPROM content int o configuration registers Followed b y 24 bit or 32 bit data 8,16, or 32b it data h Init 15

17 h Power On Reset h Start_Cal_Oscillator h Start_Cal_TDC 6. Operation 6.1 START and STOP Signal Timing Requirement Time (Condition) Description tph 2.5ns (min) Minimum pulse width tpl 2.5ns (min) Minimum pulse width tss 3ns (min) 500ns (max) Start to Stop time trr 15ns (typ) Rising edge to rising edge tff tva txx 15ns (typ) 1us (uncalibrated) 4.6us (calibrated) No timing limit Last hit to data valid tyy 500ns (max) Maximum measuring range 6.2 Measurement Flow 16

18 [1] Configuration (Power on Reset) New Configuration [2] Initialization Retest [3] Measurement & ALU Processing [4] Read Data [1] Configuration Configure register0~3 has default value on power-up and write opcode h50 (Power on Reset). If change configuration register, set by opcode h8x + write new configure register command. [2] Initialization After an initialization the AT320 TDC unit will start with the first pulse on the START input. It will run until the set number of hit (HITIN1, 2) or timeout occurs. New measurement always with initialization by Opcode h70 [3] Measurement & ALU Processing flow [4] Read Data Read measurement data, RES_X read by command opcode hbx. 17

19 6.3 Calibrating a High Frequency Oscillator Flow AT320 calibrating a high frequency oscillator is based on the very precise kHz clock. Then temperature variation of oscillator can be calculated by microprocessor using correction factor. [Example] 5MHz ceramic resonator used. RES_theoretical =, RES_X = measured Correction factor = Calibrated CLKHS frequency = CLKHS frequency * Correction factor 7. Package Dimension 7.1 Package Dimension QFN-32 Pacakge 18

20 8. Application Circuit 19

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