Improving Clock-Data Recovery using Digital Signal Processing. A Thesis Presented. Yann Malinge

Transcription

1

2 Improving Clock-Data Recovery using Digital Signal Processing A Thesis Presented By Yann Malinge To The Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering in the field of Communications and Signal Processing Northeastern University Boston, Massachusetts August, 2008

3 1 Improving Clock Data Recovery Using Digital Signal Processing

4 Abstract This thesis presents ways to improve clock-data recovery (cdr) using digital signal processing techniques. The communication system is presented and the different components of jitter are analyzed. Several different cdrs are presented, including the bang-bang cdr. With the increase in data rates in today s circuit board technology the current cdr technology is being outpaced, jitter is becoming more of a problem. Three cdr algorithms are created, presented, and tested versus the bang-bang cdr. The three algorithms all use the concept of edge detection, found in image processing. The first uses the Hilbert transform to locate the transitions of the signal. The second algorithm uses an algorithm developed for the speech processing field, the Automate de Cucchi. This algorithm finds the location of noise on a noisy speech signal. The Cucchi cdr uses this concept to smooth the data, and then find the exact location of the transitions. The third algorithm uses the Prewitt operator, this operator is used in the image processing field to locate the edges of an image. The Prewitt cdr uses a one dimensional version of the image operator. Again this algorithm finds the exact location of the transitions. The three algorithms are compared to the bang-bang cdr using eye diagrams. Different metrics of the eye diagrams and four data sets are used for the comparison. Three of the four datasets are simulated data, and the fourth is taken of a Fully-Buffered Dual In-Line Memory Module (FBDIMM) link. The three algorithms outperform the bang-bang cdr in every jitter categories, with as much as 65% improvements. 2

5 3 Improving Clock Data Recovery Using Digital Signal Processing

6 Table of Contents Abstract... 2 Table of Contents... 4 Table of Figures Introduction Communication Model Transmitter Channel Receiver Jitter Analysis Random jitter Deterministic jitter Total jitter Clock Data Recovery Phase-Locked loop Bang-Bang cdr New Algorithms Hilbert cdr Cucchi cdr Prewitt cdr Experimental Results Conclusion Bibliography

7 Improving Clock Data Recovery Using Digital Signal Processing Appendix

8 Table of Figures Figure 2-1 Communication model Figure 2-2 Transmitter Block Figure 2-3 Crosstalk Figure 2-4 Effect of reflection Figure 2-5 Receiver block Figure 3-1 Jitter breakdown flowchart Figure 3-2 Jitter example Figure 3-3 Eye diagram example Figure 3-4 Eye diagram example Figure 3-5 Normal Distribution with different variances Figure 3-6 Periodic Jitter Figure 3-7 ISI example Figure 3-8 ISI example Figure 3-9 Total jitter pdf Figure 3-10 Total jitter Figure 4-1 Clock is sent through a channel to the receiver Figure 4-2 Clock is taken from two different reference clocks Figure 4-3 Location of the three sampled bits Figure 4-4 Hogge algorithm Figure 4-5 Differentiation cdr Figure 4-6 PLL Figure 4-7 Bang-bang cdr block diagram Figure 4-8 Data Sampler example Figure 4-9 Adjustments to the phase for a bang-bang cdr Figure 4-10 Input data, and the resulting instantaneous phases Figure 4-11 Bang-bang cdr eye diagram Figure 5-1 Original image, on left, edges emphasized, on right Figure 5-2 data with its Hilbert transform Figure 5-3 h[ n. ] Figure 5-4 Width of pulses Figure 5-5 finding min/max of Hilbert transform Figure 5-6 reason for Interpolation Figure 5-7 Hilbert cdr results Figure 5-8 Eye diagram Figure 5-9 Speech versus FBDIMM signal Figure 5-10 Choosing values for b Figure 5-11 Comparing different values for L Figure 5-12 α[ n ] vs. input data Figure 5-13 square wave with its differentiation Figure 5-14 Adjustments of transitions using interpolation

9 Improving Clock Data Recovery Using Digital Signal Processing Figure 5-15 Cucchi cdr results Figure 5-16 Eye diagram Figure 5-17 Prewitt operator on square wave Figure 5-18 Prewitt cdr results Figure 5-19 Eye diagram using Prewitt cdr Figure 6-1 The four metrics used to test the new algorithms Figure 6-2 First two data sets Figure 6-3 FBDIMM data Figure 6-4 Equalized data Figure 6-5 Square wave eye diagram Figure 6-6 Square wave with added jitter eye diagrams Figure 6-7 Eye diagram for FBDIMM data Figure 6-8 Equalized data eye diagrams Figure 6-9 Comparison of the datasets

10 1 Introduction The process of transmitting data from point A to point B has remained relatively unchanged since the first telegraph was sent. The first communication consisted of a transmitter (the telegraph) a channel (the cable), and a receiver (the other telegraph). Today the telegraph is no longer used but we still use the same model for all types of transmission, from phone transmission to circuit board operations. Circuit boards are one of the essential building blocks of our society. They are used in everything from a simple alarm clock to the most advanced server farms. Different circuit boards have varying needs. The alarm clock, for example, does not need to have very fast transmission as long as it keeps reliable time. On the other hand, a server needs to retrieve data as fast as possible, its only limitation being the available technology. The problem of making things move faster is affected by many different factors: whether it be the material used to fabricate the boards, the quality of the chips being used at the transmitter and receiver end, or even the physical aspect of the link (the length of the channels the number of vias). All these problems lead to an issue called jitter. Jitter is defined as a variation of a digital signal position from its ideal position in time [2]. Jitter causes all sorts of problems at the receiver end of the communication system. The goal of such system is to receive the same information that was transmitted. If the receiver samples the incoming data at the wrong location errors will occur. To battle the effect of jitter a technology called the Clock-Data Recovery (cdr) circuit 8

11 Improving Clock Data Recovery Using Digital Signal Processing (henceforth referred to as cdr) was created. This circuit s main goal is to recover the data sent over the communication link. Different algorithms have been created to perform this task, they do a decent job at recovering the data, but jitter still causes problems. The goal of this thesis is to study approaches to reduce the effect of jitter in the cdr. Three algorithms were developed to counteract the effect of jitter. They were developed with the goal of minimizing the effect of jitter. The two algorithms developed were created to find the exact point of transition of the signal. Knowing the location of the transitions an accurate estimate of the location of the sample points can be made, thus limiting the effect of jitter. The first algorithm developed is based on the Hilbert transform. The Hilbert transform finds the exact location of the transition by finding the rate of great ascent/descent. The second algorithm developed is taken from the speech signal processing field. It uses an algorithm called the automate de Cucchi. This algorithm creates a waveform that reduces the effect of noise and jitter. From that waveform the optimum sampling points are determined. The third and final algorithm uses the Prewitt operator to find the transitions. The Prewitt operator is used in image processing to find edges in images. This same principle is used to create the Prewitt cdr. The organization of the thesis is as follow: Chapter 2 introduces the communication model, this includes a description of the transmitter, the channel and the receiver. Chapter 3 goes into details on the subject of jitter, the different types of jitter are introduced and analyzed. Chapter 4 describes cdrs, what they do, and how they do it, this includes an introduction to a specific cdr, the bang-bang cdr. This cdr is presented and implemented in Matlab. Chapter 5 discusses the three new algorithms that were created for this thesis. 9

12 This includes background on the theory used and a description of the algorithm, developed in Matlab. Chapter 6 shows a comparison of four algorithms: the bang-bang and the three new ones created for this thesis. The algorithms were compared on four data sets, three simulated and one real world data. Finally the conclusion summarizes the new algorithms and their performance versus the bang-bang cdr. 10

13 Improving Clock Data Recovery Using Digital Signal Processing 2 Communication Model There are many different forms of communications, whether it be telephone communication, wireless communication or even in the old time the telegraph, it could be as simple as two people speaking in a crowded room. All these forms of communications use the same model, as defined by Shannon [1], consisting of five parts, as shown in Figure 2-1. Figure 2-1 Communication model. The information source produces the information to be transmitted, the transmitter, operates on the message to make it suitable for transmission over a channel. The channel is the medium in which the signal is transmitted. There are many different types of mediums, including, air for wireless transmission or copper for circuit board transmission. The next stage is the receiver which does the inverse operation of the transmitter. The last piece of the model is the destination, which is the final stop for the message/data. A telephone conversation is a simple example that can be used to illustrate this model better. A telephone conversation is composed of the same five blocks from Figure 2-1, the person talking on one end is the information source. The telephone is the transmitter on one end and the receiver on the other. The channel in this case is the 11

14 telephone wire between the two phones, and the destination is the person listening at the other end. Very often the information source block and destination block are omitted when discussing this topic because they are part of other models, or combined with the transmitter and receiver block. Thus this Chapter will only focus on the middle three components of the model. Equation Chapter 2 Section Transmitter The transmitter block is a very important part of a communication system, it is where the data is transformed into a form that can easily be sent to over the channel. It is typically composed of four components, as shown in Figure 2-2: encoder, multiplexer (MUX), equalizer and driver [2]. Equation Chapter 2 Section 1 Figure 2-2 Transmitter Block. Going back to the example of the phone conversation the words emitted by the information source, the person, needs to be changed from sounds to bits that can be sent over a telephone wire, this is the job of the encoder. Depending on what type of communication is being performed the code will be different. Some of these codes 12

15 Improving Clock Data Recovery Using Digital Signal Processing include PAM, PSK, QAM and NRZ. All these codes primary purpose is to make the transmission of data from point A to B error free, or at least try to eliminate the most errors possible [7]. The MUX is in charge of serializing the data, or in going from multiple inputs to one output. The clock is used in the serialization process by telling the MUX when to put the next bit on the data stream. The next block, the equalizer, is used to counteract the effect of the channel, such as inter symbol interference. A very basic, and often used, equalizer is a linear finite impulsive response filter [2]. It could, for example, decrease the low frequency intensity compared to high frequency ones. This technique is called De-emphasis. The final piece of the transmitter is the driver, this block gives the necessary power to send the signal through the channel to the receiver. 2.2 Channel The next block in the communication model is the channel. The channel is the medium used to transmit information from the transmitter to the receiver [1]. There is a wide variety of channels, it all depends on the type of transmission being performed. For electrical systems copper wires are typically used, fiber optics, which is made of glass, are used in telephone systems, even air can be a channel, when a wireless communication is performed. More fundamentally, there are two types of channels: lossless and lossy. 13 A channel is said to be lossless if it does not attenuate the amplitude of the information traveling on it [3]. A channel that attenuates the amplitude, and ads jitter to

16 information traveling on it is said to be lossy [4]. Circuit boards use mostly use copper microstrips to transfer information, this is due to its relative low cost and effectiveness. A copper channel can be modeled as a lumped LRC circuit. As was previously stated a lossy channel is affected by outside influences, these factors include skin effect, dielectric loss, crosstalk, reflection and jitter. Jitter will be discussed in more details in the next Chapter. Skin effect The tendency for current to distribute itself so that it is mostly on the surface of a conductor is called skin effect [4]. It can be calculated as a density distribution over the cross section of the conductor given byequation Chapter 1 Section 2 where ( ) ( ) d o J d = j e δ (1.2.1) J d is the current density distribution as a function of distance, d, j o is the current density at the surface, and δ is the skin depth. Skin depth is defined as the distance at which the current density has decayed to e of J( d ) given by 1 δ = (1.2.2) π f μσ where μ is the magnetic permeability, σ is the conductivity, and f is the frequency. Equation (1.2.2) shows that as the frequency increases the skin depth decreases, this phenomenon increases the conductors resistance, resulting in an attenuated signal at the output of the channel [4]. This causes the current to distribute itself non-uniformly on the 14

17 Improving Clock Data Recovery Using Digital Signal Processing conductor, which increases the resistance of the conductor resulting in the attenuation of the voltage level. Dielectric loss The next error causing issue that the channel has to deal with is dielectric loss. Every material has a dielectric constant, which is defined as the measure at which the material concentrates electrostatic lines of flux. It is the ratio of the amount of stored electrical energy when a potential is applied [4]. The physical properties, which includes the electric and magnetic field, of the information propagating through the channel interacts with the channel in such a way that the voltage associated with the waveform is attenuated [2]. Dielectric loss is usually calculated using the loss tangent. This is because the dielectric constant is usually a complex number and mathematically the tangent of something is the ratio of the imaginary component over the real component. The loss tangent is given by ε tan i σ δ = = (1.2.3) ε 2π f ε r where ε i and ε r are the imaginary and real parts of the dielectric constant, ε, respectively, f is the frequency, and σ is the conductivity. Dielectric loss can be measured in terms of voltage loss given by Vi V o α f = e D (1.2.4) Where α D is π f εr tanδ α D = (1.2.5) c 15

18 c is the speed of light and tanδ D is the loss tangent, see equation (1.2.3). Crosstalk The corruption of the signal on a given channel by a signal on a nearby channel is defined as crosstalk. This is a common problem in electrical circuitry because there tends to be many channels closely packed together. There are two main types of crosstalk both are caused by the inductive and capacitive coupling between adjacent channels. Figure 2-3 Crosstalk. Figure 2-3 shows the two types of crosstalk, where the blue arrows are the crosstalk. The first is called far-end crosstalk (FEXT), this is crosstalk that is caused by an aggressor transmitter and observed by the receiver at the other end. The other type of crosstalk is called near-end crosstalk (NEXT), this is crosstalk that is caused by the transmitter and observed by the receiver at the same end. FEXT and NEXT are directly proportional to 16

19 Improving Clock Data Recovery Using Digital Signal Processing the spacing between channels, thus increasing spacing between channels will greatly decrease the effect of crosstalk. Another physical fix that can greatly reduce the effect of FEXT is the length of the channel, the shorter the channel is the smaller the effect of FEXT will be on the channel [2]. Reflection When a wave or electrical signal transitions from one medium to another reflection occurs, which is the case at the end of a channel. This phenomenon is measured in terms of voltage reflection coefficient given by Z Z V Γ= = Z Z V L o o L + o + o (1.2.6) where ZL and Z o are the load and characteristic impedance of the line. V + o and V o are the wave amplitude traveling in the positive and negative direction, respectively. The reflection coefficient is the ratio of the amplitude of the wave traveling in the negative direction, reflected wave, V o, to the amplitude of the wave moving in the positive direction, the incident wave, V + o [3]. To illustrate equation (1.2.6) better, a simple example is created, if Z o is 50 ohms and Z L is 75 ohms, the reflection coefficient will be ( 75 50) ( ) = 0.2. This means that if the incoming wave had an amplitude of 1v the reflected wave will have an amplitude of 0.2v. 17

20 Figure 2-4 Effect of reflection. Figure 2-4 shows that the incident wave will both go through the boundary and be reflected when medium 1 and medium 2 are different. When looking at equation (1.2.6), it can be seen that in order to have no reflection, the characteristic and load impedance have to be matched [3]. This is very hard to do in practice, especially on a circuit board. Most of today s circuit boards have multiple layers, one link could originate on the top layer of the board and terminate on the bottom layer. To get the signal from one layer to another vias have to be used. A via is a pad with a plated hole that connects the two layers. The problem with using vias is that they also introduce discontinuity on the data link creating reflections. Though board designers try to keep the number of vias per link to a minimum, some links could have as many as five vias. This creates a lot of reflection at the receiver end. 2.3 Receiver The last block in the communication model is the receiver block. The function of the receiver is to accept the data from the channel, and to transform it into readable form for 18

21 Improving Clock Data Recovery Using Digital Signal Processing the destination. The receiver is usually made up of four blocks, as shown in Figure 2-5, the equalizer, the cdr, the De-MUX, and the decoder. Equation Chapter 2 Section 3 Figure 2-5 Receiver block. The equalizer is used to correct the effect of a lossy channel. The action taken by the receiver equalizer is the opposite of what the transmitter equalizer does. The cdr is an important block, and will be discussed in more details in the following Chapters. Its role is to accept the incoming data and sample it at the correct location. The De-MUX is used to de-serialize the data, in other words it is used to go from a data stream where the bits are processed one bit at a time to one where they are parallelized. The final step is the decoder which takes the parallel data and puts it into a form that the destination can comprehend. Summary A communication system has three vital components: the transmitter, the channel, and the receiver. Errors occur at each step of the system, but the channel is where most errors tend to occur. Factors such as skin effect, dielectric loss, crosstalk, reflection, and jitter, which will be discussed in Chapter 3, all affect the data as it passes through the channel. All of the issues discussed in this Chapter affect the amplitude of the signal. 19

22 This can result in errors at the receiver. These are errors that can be counteracted with a good equalizer. Jitter cannot be taken care of by just using an equalizer it needs a cdr, which is discussed in Chapter 4. 20

23 Improving Clock Data Recovery Using Digital Signal Processing 3 Jitter Analysis There are many factors that affect a transmission on a circuit board, but the biggest problem that worries engineers is jitter. It is defined as the short-term variations of a digital signal s significant instants from their ideal positions in time [5], or a shift in time of the signal location. Jitter can be broken down into two categories, deterministic jitter and random jitter. These two types of jitter can also be categorized as continuous jitter, random jitter, and discrete jitter, deterministic jitter. Regardless of the names, jitter has random components, thus discussing jitter in terms of statistical components, such as mean and variance, makes jitter analysis easier. To obtain these components we need to first obtain the probability density function (pdf). The pdf is the probability that a variable has the value x [6]. It is much easier to manipulate few statistics rather than having to deal with many random samples. The breakdown of jitter is presented in Figure 3-1 and is described in details in the following sections. 21

24 Figure 3-1 Jitter breakdown flowchart. The goal of every communication system is to have the output be the same as the input. If the transmitter sends a bit stream of 0101, the receiver needs to recover the same bit stream, if it recovers 0010 then something happened in the middle. A simple example is presented below using Figure 3-2. If the input is the upper plot, and we have sampled four points, A, B, C and D, we see that the data points are If, for example, periodic jitter is corrupting the system, the middle plot is what the receiver would see. It is a far cry from the clean square wave present in the upper plot. But if we sample at the same locations, A, B, C, and D, we can see that we would get the same results, after rounding. This task could become very difficult if the level of jitter was very high. If not only periodic jitter is present but also data dependent jitter, if we sample at the same location we would get something completely different, This is unacceptable error and is why jitter needs to be taken into account when designing circuit boards. 22

25 Improving Clock Data Recovery Using Digital Signal Processing Seen at transmitter 0 A B C D Seen at receiver-case 1 0 A B C D Seen at receiver-case 2 0 A B C D Figure 3-2 Jitter example. Eye Diagram One way to visualize jitter is to use an eye diagram. An eye diagram is created by superimposing many data voltages and edge transmission over a unit interval range. Eye diagrams are widely used in oscilloscopes. They are called eye diagrams simply because they look like a human eye. The eye diagram is the visualizing technique used to see the effect of jitter on the simulations for both the new and old algorithms presented in Chapter 4, 5, and 6. To illustrate this, a simple example was created: 23

26 Figure 3-3 Eye diagram example 1. The upper plot of Figure 3-3 shows the data stream, it is composed of several highs and lows. To create an eye we first need to break the data stream into several partitions. These partitions are determined using several techniques including clock data recovery circuits, which will be discussed in Chapter 4. These partitions are then superimposed onto one point, lower plot. 24

27 Improving Clock Data Recovery Using Digital Signal Processing Figure 3-4 Eye diagram example 2. Figure 3-4 is another way to look at the eye diagram example presented in Figure 3-3, the partitions of the middle plot of the previous figure are broken up into different plots. The first partition is the first plot, the second partition is the second plot, and so on. This eye diagram is used to measure the performance of the system, several measures are used to check this performance, see Chapter 6. The wider the eye diagram is the more likely the receiver will make a correct decision. A narrow eye is susceptible to noise and bad sampling, and will most likely result in errors. 25

28 3.1 Random jitter Timing noise that cannot be predicted is called random jitter (RJ). Typical sources of RJ are thermal noise and shot noise [2]. Thermal noise is known to have a Gaussian distribution hence RJ is assumed to have a Gaussian distribution [5]. Another reason for this assumption is the fact that, when many uncorrelated noise sources are added they approach a Gaussian distribution. This phenomenon is called the Central Limit Theorem, which states that the sum of large number of mutually independent random variables tends toward a Gaussian distribution, also known as the normal distribution [6]. The normal distribution has a pdf defined as follow Equation Chapter 3 Section 1 ( x μ ) f ( x) = e 2σ (3.1.1) σ 2π 2 where σ is the variance and μ is the mean of the random sequence x. Figure 3-5 shows two Gaussian distributions with the same mean, but with different variances. Height2 Gaussian Distribution with different σ 2 Height1 mu Figure 3-5 Normal Distribution with different variances. 26

29 Improving Clock Data Recovery Using Digital Signal Processing where μ is the mean and Height is as follow ( ) f u the different heights differ with respect to1 σ. 1 = (3.1.2) 2πσ Deterministic jitter Jitter that is repeatable and predictable is called Deterministic Jitter (DJ) [5]. This jitter can be broken down into three types of jitter: Periodic Jitter (PJ), Data Dependent Jitter (DDJ) and Bounded Uncorrelated Jitter (BUJ). DDJ can be further broken down into two types of jitter Intersymbol jitter (ISI) and Duty-Cycle Distortion (DCD). Equation Chapter 3 Section 2 Periodic Jitter Jitter that repeats in a cyclic fashion is known as periodic jitter [5]. It is a repeating jitter signal at a certain frequency. It can be viewed as a bounded uncorrelated narrow band jitter [2]. PJ can be caused by electromagnetic interference caused by an adjacent channel or a nearby power supply [8]. PJ can be modeled as a cosine function given by ( ) cos( ω θ ) PJ t = A t + (3.2.1) where A is the amplitude in units of time, ω is the modulation frequency and θ if the initial phase [8]. It can also be written as PJ t ( ) Acos = Φ (3.2.2) where Φ is the overall phase and is defined as Φ = ωt + θ. The pdf of PJ is given by 27

30 1 fpj ( p) =, A p A 2 π 1 / ( p A) (3.2.3) to simplify manipulation equation (3.2.3) can be estimated by 1 fpj ( p) δ ( p A) + δ ( p+ A) (3.2.4) 2 this approximation is done to simplify convolution operations with other forms of jitter, see total jitter. Periodic Jitter pdf -A A Δ t Figure 3-6 Periodic Jitter. Figure 3-6 is a pictorial representation of equation (3.2.3), in red, and equation (3.2.4), in blue, where A is the location of the delta functions. Data Dependent Jitter The most commonly encountered type of deterministic jitter is DDJ, especially as data rates increase. Its main characteristic is its correlation with the data stream. Since the current zero-crossing time of the current bit depends on the zero-crossing of the previous 28

31 Improving Clock Data Recovery Using Digital Signal Processing bit. DDJ is directly correlated with the run length, a sequence in which a same bit is repeated, of a data pattern, and since for a particular data pattern there are only limited run length permutations DDJ is discrete and finite. Because of this we can model DDJ with its pdf given by N f d P d D (3.2.5) ( ) = i δ ( i ) DDJ,DDJ,DDJ i= 1 P i,ddj is the probability for the value of jitter location, i,ddj D. DDJ can be further broken down into two sub categories: Duty-Cycle Distortion (DCD) and Intersymbol Interference (ISI). DCD is mostly applicable on data streams with a 100% transmission density, such as a clock pattern, , though it also affects other forms of data.. It is defined as the mean deviation of the clock pulse from its ideal [2]. DCD can be modeled by 1 D D fdcd ( dc) = δ dc δ dc (3.2.6) where D is the distance between the two impulses. Intersymbol Interference The corruption of symbols by surrounding symbols is known as ISI. This can be caused by different factors such as the timing spread of various pulses with different run lengths within the pattern [2]. ISI is caused by a short length of one bit followed/preceded by a long length of the opposite bit, such as or Figure 3-7 is an example of ISI, where the first couple bits are , and only reach a certain height, but when there are several bits of the same value in a row the data stream reaches a new max. In circuit 29

32 boards, ISI is partially due to the memory of the device that switches form a high or a low. An example is the capacitive effect, each transition has a finite charge, if the transitions occur too soon, before the previous transition reaches a 1, than it will stay at the current level [2]. ISI waveform Figure 3-7 ISI example 1. When transmitting information through a realistic channel, the pulses of the information can get distorted. This is due to several factors whether it be additive noise or filtering. The effect of filtering can be caused by the non ideal frequency response of the channel. This is due to the fact that most channels are bandlimited. This causes smearing of the pulses causing them to overlap in time thus causing ISI. 30

33 Improving Clock Data Recovery Using Digital Signal Processing Sample 1 Sample 2 Sample 3 Figure 3-8 ISI example 2. We can see that in Figure 3-8, the three pulses have spread and are now interfering with each other. If we look at Sample 2 we can see that it is being corrupted by the two surrounding pulses. This effect is a result of the channel being bandlimited. Since ISI is directly related to the data pattern and the channel, it cannot be modeled by itself. But it can be obtained if both the DDJ and DCD are known and independent, since ISI and DCD are subcomponents of DDJ we can write f = f * f (3.2.7) DDJ ISI DCD where * is the convolution operator. Since a convolution in the frequency domain becomes a multiplication [6], we can determine the ISI pdf F = f DDJ ISI IFT F DCD (3.2.8) ISI reduces the opening of the eye diagram, thus resulting in more errors when sampling the received data. ISI is heavily involved with the edge transitions surrounded by uneven pulses, see Figure 3-7. ISI will have the most effect on a pattern with a long 31

34 run lengths, 1 for example, followed by a single pulse of the opposite bit, 0 in this case [2][7]. Bounded Uncorrelated Jitter Crosstalk or interference from nearby traces causes BUJ. It is bounded and uncorrelated [2]. The exact model for BUJ is heavily dependent on the data pattern and the data pattern causing the crosstalk, as well as the channel being used. There are several models available, but the one that is the most widely used given by 1 A 1 1 A fbuj ( b) = δ b+ + δ ( b) + δ b (3.2.9) where A is the amplitude of the aggressor, or the crosstalk amplitude [9]. 3.3 Total jitter The overall jitter seen by the receiver is known as the total jitter (TJ). It is a combination of all of the jitter components. Figure 3-1 shows the breakdown of the jitter components, the question is how to merge all the components. DJ and RJ can be assumed to be independent, because they are caused by different sources of jitter. The joint pdf of two independent variables is the convolution of their own pdf s [2],[8]. Using the definition of independence we can now write the pdf of TJ as Equation Chapter 3 Section 3 f = f * f (3.3.1) TJ DJ RJ since the components of DJ are also independent the following equation can be derived f = f * f * f (3.3.2) DJ PJ DDJ BUJ now combining equation (3.3.1) and (3.3.2) we get 32

35 Improving Clock Data Recovery Using Digital Signal Processing f = f * f * f * f (3.3.3) TJ RJ PJ DDJ BUJ A simple example to illustrate equation (3.3.1) follows. If we assume that the DJ is periodic, and the RJ component has zero mean, using the approximation for PJ, equation(3.2.4), we get a pdf with two delta functions, see Figure 3-6. Recall that the pdf for RJ components is a Gaussian distribution, equation(3.1.1). For illustration purposes we will assume that our RJ pdf is the blue graph in Figure 3-5. When the two graphs are convolved we get the pdf ( t A) ( t+ A) ftj () t = e 2σ + e 2σ 2 2πσ 2 2 (3.3.4) this results in a graph that looks like Figure 3-9: Total Jitter pdf -A A Δ t Figure 3-9 Total jitter pdf. The distance between the peaks is directly correlated to A and the variance of the normal distribution. The smaller the value of A is the closer the peaks will get to each other, until the point where they will be indistinguishable: 33

36 Total Jitter A1 A2 A3 A4 pdf -A4 -A3 -A2 A1 A2 A3 A4 Δ t Figure 3-10 Total jitter. Figure 3-10 shows the result of changing the value of A. The variance is kept constant thus the only variable is the value of A. As A increases the two peaks become visible, the two peaks are not visible for the blue and green graphs, this is due to the variance being larger than 2A, which is the distance between the peaks. Summary Jitter affects the timing of a signal. The different components of jitter corrupt the signal in several different ways, data dependent jitter is correlated to the data stream, periodic jitter is caused by electromagnetic interference (caused by adjacent channels, nearby power supply ). These timing errors cause problems when the receiver needs to sample the data. Sampling at the wrong location causes errors. To limit these errors the system either needs to be slowed down or a cdr needs to be implemented. The cdr is introduced and discussed in Chapter 4. A bang-bang cdr is also introduced in Chapter 4, this cdr is implemented and tested in Matlab. 34

37 Improving Clock Data Recovery Using Digital Signal Processing 4 Clock Data Recovery Chapter 2 discussed the architecture of a communication system, and introduced the components of such a system. The transmitter sends the information through the channel, to the receiver. The concept of sending information has become a fairly simple task at low data rates, the limitation being how noisy the channel is. The problems arise when high data rates are required and multiple systems need to be located on a very small surface area, such as a many channels on circuit boards. Transmitting information over a channel at high data rates (> 1Gbps) creates problem in several areas of the communication system, but the biggest problem arises at the receiver end. The main duty of the receiver is to sample the incoming data at the right location, so that it can be decoded into the correct output. This task becomes very difficult when jitter is present and the speed at which the data is transmitted is very high. Several years ago engineers came up with an ingenious idea to transmit the data, they embedded the clock phase on the data stream. To retrieve the data all they would have to do is sample the data at the correct location, using the information obtain from the clock phase. In order to do this, they had to come up with an additional block at the receiver end to extrapolate the clock phase information and then sample the data. They came up with the clock data recovery (cdr) circuit. The cdr block can be implemented with several different techniques. Regardless of the technique used, a reference clock is 35

38 usually used. The first designs required that the same clock used to serialize the data be sent to the receiver alongside the data. This method created some added problems for the receiver, as it had to deal with the jitter in the data stream and with the jitter in the clock stream. Figure 4-1 Clock is sent through a channel to the receiver. Figure 4-1 demonstrates the problem that brought on by sending the clock alongside the data stream. Jitter is introduced in the channel of the data, and in the channel of the clock. The receiver would have to resample the received data using a clock that has jitter different from the input data since jitter is independent. Also clock signals are not affected by ISI, so if the data stream is heavily corrupted by ISI, the receiver will have problems sampling at the correct location. Another issue is the fact that sending the clock A, used at the transmitter through a channel, to the receiver, takes up room that could be used for another data carrying link. The amount of data links is reduced by two using the system in Figure 4-1. To counteract the effect of the system described in Figure 4-1, a method utilizing two separate clock was developed, Figure 4-2 describes such a system. The transmitter serializes the data stream using the clock A in Figure 4-2. The cdr, at the receiver, uses information from a reference clock, clock B, located at the receiver end. The information 36

39 Improving Clock Data Recovery Using Digital Signal Processing taken from the clock includes its frequency and jitter information. On many circuit boards a single clock crystal is often utilized to generate clocks for many systems. A typical crystal will produce a clock with a frequency of 100 MHz, this frequency then needs to be multiplied/divided to match the necessary data frequency. To accomplish this operation a Phase-Locked Loop (PLL) is used, which is discussed in Section 4.1 Figure 4-2 Clock is taken from two different reference clocks. In Figure 4-2 the phase information of clock A is embedded in the data stream, in form of obligatory transitions. To retrieve the clock information, the clock frequency is obtained from clock B located near the receiver. Clock B is used to extract this phase information to sample the data at the right location. This is done using the cdr block. The following section describes a few cdr algorithms. Historical cdrs An early cdr algorithm developed by J.D.H. Alexander, in 1975, tries to lock onto a clock to sample the data at the correct location. The algorithm measures the zero crossings of a binary signal as early or late events when compared to a reference clock. The input data is sampled at three locations: two samples are taken at midbit time (samples a and c ), and one sample is taken at, or near, the changeover time (sample 37

40 b ), also referred to as the cross point. Figure 4-3 shows the location of the three sampled bits. Figure 4-3 Location of the three sampled bits. These samples are taken using two clocks, one for the midbit samples and the other for the changeover sample. Using the three samples the algorithm makes a decision on whether the clocks are early or late. If, for example, sample a and b are equal and b and c are not, the clock is late. If b and c are equal and a and b are not, the clock is early. The problem with this algorithm is that on many occasions it is indecisive, for example, if samples a, b, and c are all equal it cannot make a decision. In fact this algorithm can only make a decision fifty percent of the time. These decisions are used in conjunction with a frequency oscillator to create a PLL. When the PLL has locked, the samples are known to be at the correct location [11]. The principle of this algorithm is still used by today s cdrs, including the bang-bang cdr, as discussed in Section 4.2. Variations of the algorithm described in the previous paragraph are still being used today. These algorithms include using an XOR gate or differentiation [10],[22],[26]. The 38

41 Improving Clock Data Recovery Using Digital Signal Processing XOR gate is a logical operation that takes in two binary inputs, and outputs one binary output. The output of the XOR gate is true if and only if exactly one input has a value of true [11]. This gate was used in the algorithm discussed in the previous paragraph. Another algorithm that uses this, was developed by C.R. Hogge, in It uses these gate in conjunction with a simple PLL circuit to self correct a cdr circuit. It also uses two clocks, the reference clock and its complement, to check whether it is early or late. Figure 4-4 shows the results of each step of the algorithm. The left plots is an example of when the clock is locked, the right plots is an example of when the clock is not locked. The numbers of the description match the numbers of the plots. The algorithm uses two flip flops, and two clocks, 2 and 4, to retime the input data twice. The original data, l, and the first retimed data, 3, are sent through an XOR gate, the second retimed data, 5, and first retimed data, 3, are sent through another XOR gate. The output of the two XOR gates, 6 and 7, should have the same average values, if they do not the clock is off. Figure 4-4 Hogge algorithm. An example of this algorithm is presented in Figure 4-4. The left plots show a situation of a locked situation, the right plots is when it is not. We can see that the values, 0.2, on the last two plots on the left have the same average value, hence they are locked. The values on the last two plots on the right do not have the same average value, the second to last 39

42 plots as wider pulses, 0.32 compared to 0.2, as a result the clock is late. The XOR gate is also used in the bang-bang cdr. Differentiation can be used to find the zero crossings. The derivative of a function finds its rate of change. Since a binary signal is a square wave, the derivative of that square wave will have its peaks at the zero crossings. This principle was used early on in an algorithm by R.R. Cordell, et al, developed in This algorithm differentiates the input data and full-wave rectifies it to create the recovered clock. This clock is then used to regenerate the data. This algorithm is one of the first to use the principle of recovering data using the information obtained from its imbedded phases. Figure 4-5 Differentiation cdr. Figure 4-5 represents the steps taken by the algorithm to obtain the recovered data. The first plot is the input data, the second is the differentiated input data. We can see that the peaks occur at the zero crossings of the input data. The third plot is the fullwave 40

43 Improving Clock Data Recovery Using Digital Signal Processing rectified differentiated data. This data is used to create a clock, which is then used to create the fourth plot, the regenerated data [22],[26]. 4.1 Phase-Locked loop The clock is responsible for sampling the data at the right location at the receiver, and putting the data into serial form at the transmitter. Modern circuit boards can have thousands of channels, all needing different clocks. For example, some common elements of a computer circuit such as Peripheral Component Interconnect Express (PCIE), used to attach peripherals to a motherboard, I/O interface, usually uses a clock with a frequency of 100 MHz. Another element is the FBDIMM, a memory technology, typically uses a clock frequency of 166 MHz [23][24]. It is not practical to have a different clock for all of the needed frequencies. Hence a single clock crystal that is then stepped up/down to the desired clock frequency. This operation is performed using a Phase-Locked Loop (PLL). It is a circuit used to provide clean and stable clock for the other parts of the system [2]. It is also used to control the drift between the reference clock and the extracted clock phase. PLL are used to lock onto the phase of the clock in the data stream. The term lock is obtained when the difference between the output of the PLL and the clock phase extrapolated from the data stream are equal [22]. A PLL is usually made up of three parts: a phase detector, a filter, and a voltage controlled oscillator (VCO) [16]. Equation Chapter 4 Section 1 41

44 Figure 4-6 PLL. Figure 4-6 represents the PLL with its three components. The phase detector compares the phase of the input signal, θ i ( t), with the phase of the VCO, θ o( t ) output of the phase detector is the difference between these two values, θ e( t ). ( t) ( t) ( t) e i o. The θ = θ θ (4.1.1) This phase, θ e, is then multiplied by the phase-detector gain factor, K ( ) v = K θ θ (4.1.2) d d i o The VCO is an oscillator that is controlled by an input voltage, vc ( t ). ( ) ( ) ( ) v t = f t v t (4.1.3) c where f () t is the filter impulse response. The output frequency is directly related to the input voltage. The filter is used to suppress noise and high frequency signal. The filter is most often a low pass filter [16]. A PLL can be modeled in the frequency domain, this is accomplished by taking the Laplace transform. Since the frequency is the derivative of the phase, the VCO operation can be described as d d 42

45 Improving Clock Data Recovery Using Digital Signal Processing where ( ) dθo t dt = Kv (4.1.4) K o is the VCO gain factor. To get equation (4.1.4) into the s-domain, the Laplace transform is performed on (4.1.4) ( t) o c dθo L = sθ o( s) = KoVc( s) (4.1.5) dt Taking the Laplace transform of (4.1.1), (4.1.3), and (4.1.4), we obtain ( ) = θ ( ) θ ( ) ( ) = ( ) d ( ) KV o c( s) ( s) = V s K s s d d i o V s F s V s θ c o s (4.1.6) These three equations are all we need to get the loop equations given by θ θ θ θ ( s) = H( s) = ( ) + ( s) s ( s) s+ K K F( s) ( ) ( ) θ ( ) + ( ) o o d i o d e ( ) ( ) ( ) ( ) = = 1 H s i o d K K F s s s K K F s skdf s i s sθi s Vc s = = H s s K K F s K o d o ( ) (4.1.7) The equation form equation (4.1.7) can then be used to create all kinds of PLLs [16]. 4.2 Bang-Bang cdr There are several algorithms used today to recover data, but the one that is most often used is the bang-bang cdr. This cdr was developed in the early 1990 s to cope with the fast increase in data rates. The advantage of the bang-bang cdr is that it only uses two to four samples per window to look for transitions [12]. The window is utilized to save on 43

46 bandwidth, the larger the window the less bandwidth will be needed, the smaller the window the more accurate the cdr will be. The bang-bang cdr is a first order PLL, this results in binary (early/late), or ternary (early/late/hold) loop adjustments, as shown in Figure 4-9. A bang-bang cdr updates itself by a fixed amount of phase regardless of what the phase error is [27]. This linearity in adjustments results in a simpler algorithm to implement. The inputs to this algorithm are the input data, initial phases, and the reference clock information. The information used from the reference clock is its period. The initial phases, or bit locations, are arbitrary, as future phases will be adjusted to match the correct location of the bits. Figure 4-7 Bang-bang cdr block diagram. Figure 4-7 is a block diagram of a bang-bang cdr. the Phase Locator (PL) uses the number of samples per bits, Ns, to obtain the phases, pin, for every window T Ns = (4.1.8) t s 44

47 Improving Clock Data Recovery Using Digital Signal Processing where T is the period of the clock and t s is the sampling frequency of the data. If, for example, the period was 500 picoseconds and the sampling frequency was 50 picoseconds, Ns would be equal to 10. The initial phases that were used in the recreation of this algorithm were always picked to be [ ]. The PL uses Ns to obtain future values for the phase. The PL is also where the phases are adjusted ( ) * ( 1) pin n = Ns pin n + adj (4.1.9) where adj is the adjustment provided by the cdr Algorithm block. The Data Sampler (DT) uses the information provided by the PL to sample the data. the first function of the DT is to find values within the data at the locations of the phases given by the Phase Locator. To accomplish this task it uses linear interpolation, see section 5.1. Figure 4-8 shows an example of what the DS does. The blue points are the sampled input data. It needs to find values for points located at the phases, in this case the phases are [ ]. The green squares are the result of the linear interpolation. 45

48 Figure 4-8 Data Sampler example. The next step for the DS is to discretize the values found in the previous step. This step is done using a threshold of 0. If the values are above 0, they are set to 1, if they are below 0 they are set to 0. Looking at the example in Figure 4-8, the output of the DS would be The box cdr Algorithm in Figure 4-7 is where the algorithm looks for transitions and makes adjustments to the phases found in the PL. The algorithm looks for transitions using the output of the DS. If the sum of the output of the DS is 0 or 4, there is no transition. If the sum is anywhere between 0 and 4, then there is a transition. If, for example, the output is 1111 then there is no transition, because the sum is 4. If this happens then the algorithm goes back to the PL and start the loop over again. If the output of the DS is 0010, it knows that there is a transition, because the sum is equal to 1. When this happens the algorithm looks to see if it sees the transitions early or late. To accomplish this it breaks up the output of the DS in two blocks of three samples. If the 46

49 Improving Clock Data Recovery Using Digital Signal Processing output is 0010, then the two blocks are 001 and 010. The first block, 001, sees the transition late, hence it is assigned a value of -1. The second block, 010, is right on top of the transition, so it is assigned a value of 0. The sum of these two values are taken: if the sum is below 0, then the output is late and is assigned a -1, if it above 0, it is early and is assigned 1, if it equal to 0 it is on time, and is assigned a 0. These adjustments are fed back into the PL, to adjust the future phases. Figure 4-9 shows the adjustments as a function of time. Figure 4-9 Adjustments to the phase for a bang-bang cdr. Figure 4-9 shows the internal modification that the algorithm does, but these adjustments would not be possible if a certain amount of transitions were not present. A transition is defined as going form a low, or 0, to a high, or a 1, and vice versa. This algorithm needs to observe transitions in order to function properly. This is the nature of a system that uses PLLs. If it does not see transitions the algorithm will get lost. This could be a problem if bandwidth is limited, as more transitions mean bigger bandwidth 47

50 [13]. The output is the instantaneous phase of the received data stream. This algorithm was implemented and tested with several data sets, presented in Chapter 6. Figure 4-10 Input data, and the resulting instantaneous phases. Figure 4-10 is a small example of how the bang-bang cdr works. The upper plot is the input data, it can be observed that it has several frequencies, while the lower plot is the input data with its instantaneous phases, or bit locations. The phases have been adjusted with the adjustments shown in Figure 4-9. These phases are heavily affected by timing jitter, and thus create an eye, Figure 4-11, that even with very little data has crossing points that are not very clean. 48

51 Improving Clock Data Recovery Using Digital Signal Processing Volts UI Figure 4-11 Bang-bang cdr eye diagram. Figure 4-9 shows the adjustments made by the algorithm, the upper plot shows the adjustments made by the algorithm, + 1, 1, and 0. The lower plot is the summation of the upper plot. It can be observed that in the beginning only positive adjustments are made, this is the locking period. Once the algorithm has locked on, it still makes adjustments, but it remains fairly constant. This is due to the size of the window, the smaller the window the less movement, but the larger the window the more bandwidth is needed. Summary An ideal cdr algorithm would completely eliminate the effect of timing jitter, while keeping up with the high data rates that are currently being used and that will be used in the future. Most of today s cdrs, including bang-bang cdrs, use a reference clock, this clock is a large source of error. Reference clocks need to be controlled, updated, using a PLL. Unfortunately factors such as temperature and voltage variations affect the PLL this 49

52 creates errors in the reference clock [12][29]. The algorithms proposed in Chapter 5 do not use a reference clock, they only use the clock phase imbedded in the data stream. This was done to eliminate the errors caused by the reference clock. They also do not need to observe a certain amount of transitions. They use several techniques to find the exact location of the transitions. 50

53 Improving Clock Data Recovery Using Digital Signal Processing 5 New Algorithms The current limitations of the bang-bang cdr algorithm, impede it from being able to handle much higher data rates. This is a problem for the future of board designs. The future needs of board designers are greater speed and greater accuracy. The problem with the current bang-bang algorithm is that jitter plays a very big role in the output. The greater the jitter is, the worst the output of the cdr will be, which causes bit errors. The optimum cdr would be able to handle the high speeds needed and not be affected by jitter. This is a delicate balance, the faster things are the more errors are likely to happen. One way to circumvent this issue would be to find out the exact location of the transitions, this would eliminate the problem of periodic jitter, and would greatly reduce the effects of other forms of jitter. A solution that could greatly reduce the effect of jitter is using edge detection. It is a method that is readily used in the image processing field, from face detection to object detection. In image processing the simplest form of edge detection is to find discontinuity between adjacent points in an image matrix. 51

54 Figure 5-1 Original image, on left, edges emphasized, on right. Figure 5-1 is an example of what is done in image processing. The original image is filtered with a Prewitt filter to determine the horizontal edges of the original image [30]. This is a very simple example of what can be done in image processing but it illustrates the idea behind using edge detection in cdrs. An ideal circuit board signal is a square wave so we can look at the transitions of the square wave as an edge. The key of the new algorithms would be to find the edges of the signal, or the transition from low to high, or high to low. The same theory used in image processing can be used to do this. Finding discontinuity between adjacent points in voltage plots is much simpler because one needs to worry only about one dimension, as oppose to two for images. Three new algorithms were developed using this technique: the Hilbert cdr, the Cucchi cdr, and the Prewitt cdr. These three algorithms all deal with the input data in the discrete mode. They are presented and tested below starting with the Hilbert cdr. 5.1 Hilbert cdr The one problem that keeps reoccurring throughout this thesis is the problem of jitter. It can occur in several different forms, as discussed in Chapter 3. One of the issues that arise because of jitter is the fact that the period of each cycle is changed. This problem 52

55 Improving Clock Data Recovery Using Digital Signal Processing causes difficulties for the bang-bang cdr, as discussed in Section 4.2, because the algorithm continuously needs to readjust itself. If the exact location of the transitions were known jitter would not be as much of factor. This would simplify the task of finding the instantaneous phases. One way that would make this possible is to use the discrete Hilbert transform (henceforth referred to as the Hilbert transforms). The peaks of the Hilbert transform are located at the transitions of a square wave. This information is used to create a cdr algorithm.equation Chapter 5 Section Hilbert transform Input data Hilbert transform Figure 5-2 data with its Hilbert transform. Figure 5-2 clearly shows that the peaks of the Hilbert transform, in red, occur exactly at the transition of the square wave, in blue. To understand this phenomenon, we need to look into the theory behind the Hilbert transform. Hilbert transform The Hilbert transform is a convolution, in the time domain, between the input signal, x[ n ] and the impulse response 53

56 [ ] hn 1 = (5.1.1) π n The pictorial representation of Equation (5.1.1) is shown in Figure 5-3. Figure 5-3 h[ n ]. When hn [ ] goes through the origin it is divided by 0, hence there is an asymptote at 0. This creates problems when trying to find the Hilbert transform. To circumvent this issue we take the Discrete Fourier Transform (DFT) of x[ n ] and equation (5.1.1), to work in the frequency domain. This creates a multiplication between, X ( ω ) and H ( ω) + ø, for -π ω < 0, = 0, for ω = 0, ø, for 0 > ω π. (5.1.2) This operation has the effect of shifting the negative frequencies components of x[ n ] by + 90 degrees and the positive by 90 degrees. The Hilbert transform is the same as if the signal had passed through an all-pass filter, in which only the phases are changed, they are shifted by 90 degrees. The analytical signal is defined as 54

57 Improving Clock Data Recovery Using Digital Signal Processing [ ] [ ] ˆ[ ] zn xn+ø xn (5.1.3) where ˆx [ n ] is the Hilbert transform of the original signal, x[ n ]. The time rate of change of the phase of equation (5.1.3) is the instantaneous frequency [7], [18], [19]. We can use the Hilbert transform to find the exact location of the transitions, since this is where the biggest rate of change occurs, see Figure 5-2. Another way to look at the Hilbert transform is to understand what a convolution does. A discrete convolution is defined as x[ n] * h[ n] = x[ m] h[ n m] (5.1.4) m where x[ n ] is the input and hn [ ] is the impulse response. If hn, [ ] in equation (5.1.4), is symmetric a convolution is the same thing as a correlation. A correlation finds the strength of a relationship between two systems, in this case x[n] and h[n]. Since hn [ ] is almost a straight line, see Figure 5-3, when it is convolved with a square wave the points where they are the most similar are when x[ n] has a transition. This is the reason why the Hilbert transform of a square wave has its peaks at the location of the transitions. Hilbert cdr Algorithm Now that we know why, and how, the Hilbert transform finds the transition of a square wave we can look into how to use it for the purpose of a cdr algorithm. The goal of this algorithm is to find the transitions of the input data. Once the transitions are known the problem of periodic jitter is essentially eliminated and we can find the instantaneous phases of the signal. The following is a step by step description of the Hilbert cdr (the full Matlab code can be found in the appendix) 1. Apply the Hilbert transform on the input data using the following algorithm: 55

58 The Discrete Fourier transform (DFT) of equation (5.1.3) is performed resulting in [ ] = [ ] + øˆ [ ] = F x[ n] + øf xˆ [ n] X ( ω) øf x[ n] * h[ n] = X ( ω) + øx ( ω) H( ω) F zn F xn xn = + (5.1.5) using equation (5.1.2) we get Z ( ω) ( ω) 2 X a, ω > 0 = 0, ω 0 (5.1.6) we then take the Inverse Discrete Fourier Transform (IDFT) of equation (5.1.6) and the imaginary part of zn [ ] is the Hilbert transform. 2. Find the width of each pulse (the period of each pulse). Figure 5-4 Width of pulses A clean square wave is created using the input data, x[ n ]. This is done by setting a threshold (set at 0). When x[ n ] is above the threshold the new data, y[ n ], set is set as + 0.5, when it is below the threshold it is set at 0.5. This square wave is used to determine the duration of each high and low cycles. The algorithm finds the duration 56

59 Improving Clock Data Recovery Using Digital Signal Processing of the pulses by looking for large discontinuity in y[ n ], these variables are put in the vector rn. It then remembers that point and looks for the next big discontinuity. The difference between these two variables is the width of the pulse. Each width is used to create partitions of the data, as shown in Figure 5-5, the area between the black lines are the partitions. 3. Use the Hilbert transform, ˆx [ n ], to find the transitions of the input data, x[ n ]. The Hilbert transform waveform creates peaks at the locations of the transitions, as shown in Figure 5-2. The algorithm alternates between finding the max or min of ˆx [ n ], for each partitions, created from the previous step. If the first peak was a min than the next one will be a max, and the next will be a min, that is how the algorithm determines whether to look for a min or a max. Regardless of whether it is a min or max, the index found is a transition. Figure 5-5 shows a peak that happens to be a min, this peak is highlighted in green. Figure 5-5 finding min/max of Hilbert transform. 57

60 4. The sampling of the input data is not infinite, because of this the location of the transitions are not exact, as shown in Figure 5-6, the green dot is the sample found by the previous step. These indexes need to be adjusted using interpolation. Linear interpolation is used to accomplish this task. Given two points, ( x, y ), (, ) x we need to find y 1 1 x y,and 2 2 y = y + x x ( ) y x y x 2 1 (5.1.7) y is the exact location of the transition. This is done for every peak (min/max). Figure 5-6 reason for Interpolation. The red dot in Figure 5-6 is the exact point of the transition, as found by linear interpolation. 5. To obtain the instantaneous phases, the location of the bits, the algorithm uses the sampling rate of the data stream. For example, if the sampling rate is 50 picoseconds and the period of the clock used in the transmitter, is 500 picoseconds, the algorithms would know that there is supposed to be 10 samples per bit. So if the 58

61 Improving Clock Data Recovery Using Digital Signal Processing high cycle had 100 samples, the algorithm knows to assign 10 instantaneous phases for that particular cycle. These phases are spaced equally apart amongst the available width of the pulse. Input data with Hilbert transform Input data with instantaneous phases Figure 5-7 Hilbert cdr results. Figure 5-7 shows the result of using the Hilbert transform to find the transitions, and then the instantaneous phases. The upper plot shows a sample of the input data, in blue, and the Hilbert transform, in red. We can clearly see that the local mins and max of the red wave occur exactly at each transition of the input data, even when the frequency of the data increases. The lower plot shows the resulting phases, the green lines are the transitions adjusted using interpolation, the black lines are the phases. These phases can then be used to create an eye diagram, Figure 5-8. To create the eye diagram the segments centered at each phase, each black line, are superimposed on top of each other, 59

62 as described in Chapter 3. We can see that the eye width is very wide and that the cross points are very tightly packed. The advantage of using this Hilbert cdr is that it almost eliminates the effect of periodic jitter, as well as reducing other forms of jitter. The Hilbert transform finds the exact location of the transitions, with interpolation adjustments, this leads to exact knowledge of the period of each cycle. The Hilbert cdr is a very good cdr because no extra data, such as a reference clock, to recover the data. Even with no knowledge of the transmitter clock, except for its period, we can accomplish a better eye diagram than the bang-bang cdr, as presented in Chapter Volts UI Figure 5-8 Eye diagram. 60

63 Improving Clock Data Recovery Using Digital Signal Processing 5.2 Cucchi cdr The idea for of combining digital signal processing and clock and data recovery first came to the author after he compared a signal sent on a circuit board and the way a noisy speech signal looks. The data signal has amplitude that goes from low to high, or high to low. This is very similar for a speech signal, which could be considered to be high when speech is present and a low when only noise is present. Equation Chapter 5 Section 2 Figure 5-9 Speech versus FBDIMM signal. Figure 5-9 is a side by side comparison of a noisy speech signal, on the left, and a noisy FBDIMM signal, on the right. It can be observed that both signal have a high and a low. Current research being done in speech processing is in the area of noise reduction. Noise reduction algorithms eliminate or, at least, drastically reduce the amount of noise present on a noisy speech signal. A way that this is currently done is to find the power of the noise and then filter it using a Wiener filter [25]. The main problem is to find the location of the noise. It is very hard to automatically determine where the boundary of the speech begins. A noise detector, or signal change detector needs to be implemented to 61

64 find this boundary. One such detector is the automate de Cucchi [20], or Cucchi algorithm. Cucchi Algorithm The primary function of the Cucchi algorithm is to find when speech is present, a high, and when only noise is present, a low. The algorithm uses a comparison of a current noise estimate with the previous noise estimate, the noise estimate is found using the power spectra density (psd) of the noise. If the current psd of the signal is higher than the previous noise estimate, then speech is present, otherwise the signal is considered to be noise. These noise estimations are smoothed using the Cucchi algorithm. The Cucchi algorithm adjusts the noise estimate as follows n ( k) ( k) ( k 1) γ = α γ (5.2.1) where γ ( k 1) is the noise estimate for the previous window, ( k ) n estimate for the current window, and α ( k ) is n γ is the noise n α 1 1 = gbsnr gsnr ( k) L ( L) ( k) ( k ) (5.2.2) SNR ( k ) is the signal to noise ratio of the noisy signal of the current window, and is calculated using the noisy signal and the previous estimate of the noise power SNR ( k ) where X ( k ) is the noisy signal power and ( k ) n ( ) ( k ) X k = (5.2.3) γ γ is the noise estimate. The parameters L, b and g determine the shape of α ( k ). L regulates the exponential decay of the n 62

65 Improving Clock Data Recovery Using Digital Signal Processing noise psd. b determines the maximum gain from window to window, and g controls the SNR ( k ) depending on the gain given by b. The values picked for these parameters are a balance between the speed of the algorithm and the effectiveness of the algorithm. They are usually chosen to be somewhere around L = 0.98, b=0.3 and g is picked so that α () 1 = 1, which is accomplished by 1 g = 1 b (5.2.4) this is done so that if there is constant noise the estimation will eventually converge. The smaller b is the more sensitive α is [21]. The left plot of Figure 5-10 shows the effect of choosing two different values for b. When b = 0.4 is chosen the noise estimate, red line, reacts very slowly to changes in the speech signal. When b = 0.2, the noise estimate jumps up a significant amount when speech is detected. This figure clearly shows that the smaller the value for b is the quicker the waveform will react to changes in the data. Figure 5-10 Choosing values for b. 63

66 Cucchi cdr Algorithm The principle, discussed in the previous section, can be used to find when the signal is high and when it is low. Some modifications needed to be done to use this algorithm. α ( k ) smoothes the estimation of the noise, this algorithm uses this property to smooth the input data, thus instead of using SNR ( k ), the input signal, x[ n ], itself is used in α ( k ). Second instead of using equation (5.2.2) as a smoothing function it is used as a new signal. When looking at Figure 5-10 we can see that the values for α ( k ) follow the general movement of the speech signal with the smaller value for b. Following this logic, if a very small value for b is chosen, α ( k ) should follow the movement of the input data, while getting rid of a lot of the noise and jitter. The steps of the algorithm are presented below (the full code can be found in the Appendix): 1. Apply Cucchi equation to the signal α 1 1 = gbx[ n] + + gx n [ n] L ( L) [ ] (5.2.5) The parameters of the equation were selected to be L = 0.94, b = 0.03 and g = , g was selected using equation (5.2.4). These parameters were chosen so that equation (5.2.5) is very sensitive to the change of the input data x[ n ]. L was chosen to be 0.94, because lower values created a big dip after every transitions, higher values lowered these dips but it also created a waveform that has very little amplitude, as shown in Figure b was chosen to be very 64

67 Improving Clock Data Recovery Using Digital Signal Processing small so that α [ n] reacted quickly to changes in the input data, as previously described. Figure 5-11 Comparing different values for L. Picking these values results in a waveform that has reduced noise and jitter, as show in Figure

68 Figure 5-12 α[ n ] vs. input data. 2. Using L as a threshold, a clean square wave, y[ n ], is created. Equation (5.2.5) shows that α [ n] will be centered around L. The square wave is created by assigning when y[ n ] is above the threshold and 0.5 when it is below the threshold. 3. The square wave is then differentiated to find the transitions, as shown in Figure The green line is the differentiated square wave. It can be seen that these peaks are exactly at the points of the square wave transition, when it goes from low to high, or high to low. 66

69 Improving Clock Data Recovery Using Digital Signal Processing Figure 5-13 square wave with its differentiation. These transitions are not exact, because of the numbers of sampling points, and they need to be adjusted. The same adjustment used in the Hilbert cdr is used here (linear interpolation). Figure 5-14 Adjustments of transitions using interpolation. 67

70 We can see from Figure 5-14 that the transitions found using the differentiated signal, red dot, need to be adjusted. Using linear interpolation they are adjusted to the exact location of transition, in green. 4. Using the transitions found in step 3, the instantaneous phases are determined, or bit location, see step 5 of the Hilbert cdr. Figure 5-15 Cucchi cdr results. The upper plot of Figure 5-15 shows the resulting wave created by the Cucchi algorithm, in blue, with its threshold, L in black. The middle plot shows the clean square wave, in blue, created with α [ n], and its differentiation, in red. The peaks of the red wave occur at the location of the transitions. The lower plot shows the input data, in blue, with the transitions, in green, its phase in black. The phases are then used to create an 68

71 Improving Clock Data Recovery Using Digital Signal Processing eye, the same way as with the Hilbert cdr, Figure The eye diagram has very wide opening and very clean cross points Volts UI Figure 5-16 Eye diagram. The Cucchi cdr performs very well in finding the transitions of the data streams. This is helped by the creation of α [ n]. It cleans up a lot of the noise and jitter in the original data, as shown in Figure The creation of the cleaner data, and the linear interpolation performed on it, allow the algorithm to get rid of most of the periodic jitter, and a lot of other forms of jitter. 5.3 Prewitt cdr The original idea for the algorithms, described in the previous sections, was to use edge detection to locate the transitions. Edge detection is widely used in the image processing field. One often used, and easy to operate edge detector is the Prewitt operator. The Prewitt operator is used to compute the gradient of an image. It gives the direction of the 69

72 largest possible increase of intensity [30]. If we go back to Figure 5-1, we can see that the right plot emphasizes the areas with the greatest rate of change, for example when the picture goes from my skin to my shirt. A Prewitt operation is a convolution between the signal, x [] n, and the matrix h [] n 1 = This convolution creates a matrix where the areas of greatest change are amplified. The advantage of the Prewitt operator is that it is inexpensive in terms of computation. The benefits of the Prewitt operator make it a suitable choice to use in a cdr algorithms. It is already very inexpensive in the 2D dimension, but when used on a square wave we only need to worry about one dimension. This makes it even less operationally expensive. In a square wave the areas of greatest increase in intensity are located at the transitions, as shown in Figure Figure 5-17 Prewitt operator on square wave. 70

73 Improving Clock Data Recovery Using Digital Signal Processing Figure 5-17 was created by using a convolution between a square wave, x [] n, and the one dimensional Prewitt operator, given by h [ n] = [ 1 0 1] We can clearly see from Figure 5-17 that the peaks of the convolution are located at the exact location of the transition. Prewitt cdr The principles given in the previous section can be used to create a cdr algorithm, more precisely, to create the Prewitt cdr. The one dimensional Prewitt operator finds the edges, or the transitions, of a square wave. Knowing the location of the square wave reduces the impact of jitter on the signal. Only the first step of the Prewitt cdr is different from the Hilbert cdr (the full Matlab code can be found in the Appendix). The first step is to apply the one dimensional Prewitt operator on the input data, x [ n]. This is done by convoluting the input data, with h [] n. For the next steps refer to the Hilbert cdr section. 71

74 Figure 5-18 Prewitt cdr results. Figure 5-18 shows the results of using the Prewitt cdr. The upper plot shows a sample data, in blue. The one dimensions Prewitt operator is applied to this data, and the red waveform is the result. We can clearly see that the peaks of the red waveform are found at the exact location of the transitions. The transitions found the upper plot are highlighted in the bottom plot, in green. Theses transitions are then used to find the instantaneous phases of the signal. these instantaneous phases are then used to create an eye diagram, Figure Similarly to the previous two algorithms the cross points are very clean. 72

75 Improving Clock Data Recovery Using Digital Signal Processing Figure 5-19 Eye diagram using Prewitt cdr. Summary The algorithms developed in this chapter, were developed to find the location of the transitions. This was done to reduce the effect of jitter, especially periodic jitter. The Hilbert cdr was developed using the principles of the Hilbert transform, which finds the rate of greatest ascent/descent. This property was used to find the transitions, as shown by Figure 5-2. The second algorithm was developed using an algorithm used in the speech signal processing field. The Cucchi cdr uses a smoothing function to reduce the effect of noise and jitter. The third algorithm uses the principle of the Prewitt operator. This operator is widely used in the image processing field to locate image edges. The three algorithms presented in this Chapter are compared with the bang-bang cdr, discussed in 73

76 Chapter 4, in Chapter 6. Four different data sets were used to compare the four cdrs. Three of the four are simulated data, and the last one is a Fully Buffered Dual In-Line Memory Module (FBDIMM) signal taken off a circuit board. 74

77 Improving Clock Data Recovery Using Digital Signal Processing 6 Experimental Results The algorithms presented in the previous chapters were various ways of finding the exact location of the transitions with an objective of lessening the effect of jitter. The goal of this thesis was to improve the performance of the existing cdrs, or more precisely the performance of the bang-bang cdr. The four algorithms developed for this thesis were developed to outperform the bang-bang cdr. To see if this goal was achieved, metrics that could evaluate jitter are needed. Four metrics were chosen to accomplish this task. They are the width of the eye, which measures overall jitter, the larger the number the less jitter is present. The size of the two cross point, this includes the right and left cross point, which measure the amount of periodic jitter, the larger the number the more jitter is present. The first three metrics are sometimes considered to be just one metric. This is because the eye width and cross points usually add up to one unit interval. For this thesis they were broken up into three different metrics, to see the effects of different forms of jitter. Finally the height of the eye, which measures amplitude, the larger the number the less noise is present. The last metric is more related to noise, but was used to see if these algorithms would improve that as well, or at least not affect it. These four metrics are shown in Figure 6-1, the first three metrics are measured in UI, a normalized unit, and the amplitude is measured in volts. 75

78 Volts UI Figure 6-1 The four metrics used to test the new algorithms. Four data sets were used for all these tests, three were simulated and one is actual data. The first data set is a clean square wave with different alternating bit times, it has a sampling rate of 50 picoseconds. The second data set is the same square wave but with jitter added, it has a sampling rate of 50 picoseconds. Both data sets have 1620 bits. Samples of both datasets are shown in Figure 6-2. Clean square wave Square wave with added jitter Figure 6-2 First two data sets. 76

79 Improving Clock Data Recovery Using Digital Signal Processing The third data set is data taken directly off an FBDIMM circuit. This data set has deemphasis, and a sampling rate of 50 picoseconds, and has 9500 bits. A sample of the dataset is shown in Figure 6-3. Figure 6-3 FBDIMM data. The fourth data simulates the effect of the communication system. The effect of the channel on the transmitted data was simulated using a filter. Knowing the parameters of this filter equalization was performed on the received data. The equalization used for this simulation was the raised cosine equalizer. The equalizer is widely used to minimize the effect of ISI [7]. Figure 6-4 shows a sample of the equalized dataset used. 77

80 Figure 6-4 Equalized data. As was mentioned in the previous sections these algorithms were tested on four different data sets, this was done to show that they could work on a range of data. The first data set that was used was a simple square wave. This was done to have base idea of how well the algorithms work. Figure 6-5 show the resulting eyes. 78

81 Improving Clock Data Recovery Using Digital Signal Processing Figure 6-5 Square wave eye diagram. The eye dimensions are tabulated in Table 6-1, Eye width Left cross point Right cross point Eye height Bang-bang cdr Cucchi cdr Hilbert cdr Prewitt cdr Table 6-1 Results for the square wave. The best eye diagrams would appear to be the three new algorithms. They all have a width of 1 and cross points that have no width. The eye for the bang-bang cdr had a slightly smaller width and cross points that were slightly larger. Even though the differences between the new algorithms and the old one seem to be very small, when you look at the eye diagrams you can clearly see a difference, especially when considering that this data set has no jitter. This data set was primarily used to see if the algorithms 79

82 would even produce an eye, and it turns out that they do, and they are better than the old one. The next data set that was used is the same square wave from the first data set, but this time periodic jitter was added. This data set was the first real test of the new algorithms, and it performed very well, see Figure 6-6. The results are tabulated in Table 6-2: Figure 6-6 Square wave with added jitter eye diagrams. Eye width Left cross point Right cross point Eye height Bang-bang cdr Cucchi cdr Hilbert cdr Prewitt cdr Table 6-2 Results for the square wave with added jitter. 80

83 Improving Clock Data Recovery Using Digital Signal Processing For this particular data set the three new algorithms greatly outperformed the bang-bang cdr in eye width and cross points. The eye height was the same for all three algorithms. The cross points were almost two times smaller compared with the bang-bang cdr eyes. The eye width was also larger for the new algorithms The next data set was used to see how the algorithms would perform on real data. This data is an FBDIMM signal with a data rate of 4Gb/s. the length of the link is approximately nine inches, and it has two vias. This is a very good test for the new algorithms as it would permit real life testing, see Figure 6-7 for results. The results are tabulates in Table 6-3: Figure 6-7 Eye diagram for FBDIMM data. 81

84 Eye width Left cross point Right cross point Eye height Bang-bang cdr Cucchi cdr Hilbert cdr Prewitt cdr Table 6-3 Results for FBDIMM data. The table shows that the new algorithms greatly outperformed the bang-bang cdr, as a matter of fact they perform almost twenty percent better on overall jitter. They did almost three times better on the crossing points, proving that the algorithms work much better to eliminate the effect of jitter. The only place that bang-bang cdr outperformed the new algorithms is in amplitude, but only very slightly, and the Hilbert cdr actually did slightly better. The results for this data sets are very good proofs that these algorithms work very well to limit the effect of jitter. The last dataset used to compare the four algorithms is the equalized data. This dataset is a simulation of how a communication system would affect information going through it. It is a good indication of what a cdr has to go through in a real application. The eye diagrams are presented in Figure

85 Improving Clock Data Recovery Using Digital Signal Processing The results are tabulated in Figure 6-8 Equalized data eye diagrams. Eye width Left cross point Right cross point Eye height Bang-bang cdr Cucchi cdr Hilbert cdr Prewitt cdr Table 6-4 Results for equalized data. Table 6-4 shows that all three of the new algorithms greatly outperformed the bang-bang cdr on this equalized data. The eye widths were for the new algorithms compared to for the bang-bang. That is a 27% improvement over the bang-bang cdr. The cross points were and for the new algorithms compared to for the bang-bang cdr. That is a 10% improvements over the bang-bang cdr. Once again the eye 83

86 width were very similar. The results show that even on data that has been equalized the new algorithms greatly outperform the bang-bang cdr. Figure 6-9 is a comparison of the data sets. For each subplot the blue graph is the square wave, the green is the square wave with added jitter, the red is the FBDIMM data, and the light blue is the equalized data. The upper left plot shows all of the eye width, we can see that for all of the graphs the eye width increases for all the new algorithms. The upper right plot shows the left cross points, the lower left shows the right cross point. For the all the data sets the cross points have been reduced drastically. The lower right plot shows the eye heights, the plots are mostly constant for the data sets, this is expected because these algorithms were not created to improve the eye height. Figure 6-9 Comparison of the datasets. 84