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1 CDX-0 -. SCHEMATIC DIAGRAM CD MECHANISM SECTION Refer to page 22 for Waveforms and Note and page 7 for IC Block Diagrams. (Page ) 2 更多资料下载请登陆 : 2

2 CDX-0 -. SCHEMATIC DIAGRAM DISPLAY SECTION (Page ) Note: All capacitors are in µf unless otherwise noted. pf: µµf 0 WV or less are not indicated except for electrolytics and tantalums. All resistors are in Ω and 1 / W or less unless otherwise specified. U : B+ Line. Power voltage is dc.v and fed with regulated dc power supply from ACC and BATT cords. C : panel designation. Voltage is dc with respect to ground under no-signal (detuned) condition. no mark : FM Voltages are taken with a VOM (Input impedance 10 MΩ). Voltage variations may be noted due to normal production tolerances. 29 更多资料下载请登陆 : 0

3 -8. SCHEMATIC DIAGRAM MAIN SECTION (1/2) Refer to page for Note and page 9 for IC Block Diagrams. CDX-0 (Page 2) ASSY (Page ) 更多资料下载请登陆 :

4 CDX-0 PDF 芯片资料查询网 : 电子工程技术论坛 : -9. SCHEMATIC DIAGRAM MAIN SECTION (2/2) (Page ) (Page 29) Note: All capacitors are in µf unless otherwise noted. pf: µµf 0 WV or less are not indicated except for electrolytics and tantalums. All resistors are in Ω and 1 / W or less unless otherwise specified. : internal component. C : panel designation. U : B+ Line. Power voltage is dc.v and fed with regulated dc power supply from ACC and BATT cords. Voltage is dc with respect to ground under no-signal (detuned) condition. no mark : FM ( ) : AM < > : CD PLAY Voltages are taken with a VOM (Input impedance 10 MΩ). Voltage variations may be noted due to normal production tolerances. Signal path. F : FM/AM J : CD 更多资料下载请登陆 :

5 XPCK VDD GFS RFCK PDF 芯片资料查询网 : 电子工程技术论坛 : IC Block Diagrams IC1 CXD207AQ XLON SPOD SPOC SPOB SPOA CLKO VDD XLTO DATO CNIN SEIN CLOK XLAT FOK MON MDP MDS LOCK TEST FILO FILI PCO VSS AVSS CLTV AVDD RF BIAS ASYI ASYO ASYE DIGITAL PLL ASYMMETRY CORRECTOR SERVO AUTO SEQUENCER CPU INTERFACE K RAM SUB CODE PROCESSOR EFM DEMODULATOR ERROR CORRECTOR D/A INTERFACE DIGITAL CLV DIGITAL OUT CLOCK GENERATOR DATA XRST SENS MUTE SQCK SQSO EXCK SBSO SCOR VSS WFCK EMPH DOUT CM FSTT XTSL XTAO XTAI WDCK 19 MNTO LRCK PCMD BCLK GTOP XUGF C2PO XROF MNT MNT1 IC BA79FP-T OPOUT CH-IN CH CTL1 CTL2 FWD REV TRAY GND CH COM CH + CH + CH OP IN OP IN + VREF CH CH-IN CH2 CH2-IN VCC CH1 CH1-IN CH1 + CH1 CH2 + CH VCC THERMAL SHUT DOWN LOGIC CTL1 CTL2 FWD REV V/I 更多资料下载请登陆 : 7

6 IC2 CXA82BQ PHD 2 PHD 1 PHD LD RF O RF I CP CB CC1 CC2 FOK APC S 2 2 SENS C.OUT TTL 22 XRST RF IV AMP2 TTL FE BIAS 7 IIL DATA REGISTER INPUT REGISTER 21 DATA ADDRESS DECODER 20 XLT IIL IIL OUTPUT DECODER 19 CLK F 8 更多资料下载请登陆 TOG1- FS1- TG1-2 TM1-7 PS1- F IV AMP : BAL1- E 9 FZC COMP 18 VCC EI 0 VEE TED 1 2 ISET SL O 1 SL M LPFI TEI ATSC TZC TDFCT 7 1 SL P TA O VC FEO FEI FDFCT FGD FLB FE O FE M SRCH TGU TG2 FSET TA M FOK RF M RF IV AMP1 MIRR DFCT IIL TTL FE AMP E IV AMP TE AMP BAL1 BAL2 BAL HPF COMP TG1 LPF COMP TRACKING PHASE COMPENSATION TM ISET TOG1 TOG2 TOG TM TM WINDOW COMP ATSC DFCT TZC COMP DFCT TM1 FCS PHASE COMPENSATION FS1 FS2 TG2 TM TM7 TM2 FS F SET 更多资料下载请登陆 : 8

7 IC00 CXA19AQ-T GAIN LDLC1 LDHC1 INAO1 VRIN1 VOUT1 TIN1 TCLC1 TCLC11 TCLC12 TCO1 FDIN LOUD 8dB STEP 1dB STEP TONE FADER 2 FNTO1 2 REO1 GAIN12 7 GAIN11 8 IN 9 IN1 0 IN12 1 IN11 2 INPUT SW IN21 IN22 IN2 IN2 GAIN21 7 GAIN22 8 INPUT SW ZCDET LATCH REGISTER LATCH CONTROL k k 22 CE 21 CLK 20 DGND 19 GND 18 VCC VCT DATA 1 TIMER LOUD 8dB STEP 1dB STEP TONE FADER REO2 1 FNTO GAIN2 LDLC2 LDHC2 INAO2 IC700 SM878AM-E2 VRIN2 VOUT2 TIN2 TCLC2 TCLC21 TCLC22 TCO2 FDIN2 MUTE 1 ATTENUATION COUNTER 2 2 ATCK MODE DEEN 2 FILTER & ATTENUATION OPERATION BLOCK L R L R NOISE SHAPER OPERATION BLOCK TIMING CONTROL RSTN DS CKO DVSS BCKI DI DVDD LRCI 7 8 INPUT INTERFACE CLOCK GENERATOR XVSS XTO XTI XVDD MUTE TSTN TO AVDDL AVDDR LPF LPF AMP AMP LO 12 1 RO AVSS 更多资料下载请登陆 : 9

AUDIO POWER SPECIFICATIONS (US

PDF 芯片资料查询网 :http://www.tai-yan.com 电子工程技术论坛 CDX-4180 :http://www.tai-yan.com/bbs SERVICE MANUAL US Model Canadian Model E Model SPECIFICATIONS AUDIO POWER SPECIFICATIONS (US Model) POWER OUTPUT AND TOTAL