Overview The LA6560 is a 5-channel driver (BTL : 4-channel, H bridge : 1-channel) for CD players.

Transcription

1 Ordering number : ENA0599 LA6560 Overview The LA6560 is a 5-channel driver (BTL : 4-channel, H bridge : -channel) for CD players. Functions Power amplifier 5-channel built-in. (Bridge-connection (BTL) : 4-channel, H bridge : -channel) IO max A Level shift circuit built-in (except H bridge). Mute circuit (output ON/OFF) built-in. (Operable with BTL AMP and not operable for the H bridge of 5VREG) 5V regulator built-in (external PNP transistor). With VREF changeover function (H : external, L : internal (2.5V) selected) Overheat protection circuit (thermal shutdown) built-in. Specifications Maximum Ratings at Ta = 25 C Parameter Symbol Conditions Ratings Unit Supply voltage V CC max 4 V Allowable power dissipation Pd max Independent IC 2.0 W Mounted on specified board. * 0.8 W Maximum output current I O max Each output for H bridge, channel to 4. A Maximum input voltage V IN B 3 V pin voltage V 3 V Operating temperature Topr -30 to +85 C Storage temperature Tstg -55 to +50 C * Specified board size : mm 3, glass epoxy. Monolithic Linear IC For CD Five-Channel Driver (BTL : Four-Channel, H Bridge : One-Channel) Recommended Operating Conditions at Ta = 25 C Parameter Symbol Conditions Ratings Unit Supply voltage V CC 5.6 to 3 V

2 Electrical Characteristics at Ta = 25 C, VCC = VCC2 = 8V, VREF = 2.5V, unless especially specified. Ratings Parameter Symbol Conditions Unit min typ max ALL Blocks No-load current drain ON I CC -ON BTL-AMP output ON, ma LOADING block OFF * No-load current drain OFF I CC -OFF All outputs OFF * 0 5 ma Thermal shutdown temperature TSD Design guarantee value C VREF AMP VREF-AMP offset voltage VREF-OFFSET -0 0 mv VREF Input voltage range VREF-IN V CC -.5 V VREF-OUT output current I-VREF-OUT CH input reference voltage ma BTL AMP Block (CH to CH4) Output offset voltage V OFF Voltage difference between outputs for BTL mv AMP, each channel. *2 Input voltage range V IN Input voltage range for input for OP-AMP. 0 V CC -.5 ma Output voltage V O Each voltage between V 0 + and V 0 - when V R L = 8Ω. *3 Closed-circuit voltage gain VG Input and output gain Times Input OP-AMP:BUFFER Slew rate SR AMP Independent 0.5 V/μs Multiply 2 between outputs. ON voltage V-ON Output ON voltage, each *4 2 V OFF voltage V-OFF Output OFF voltage, each *4 0.5 V Input AMP Block (CH to 4) Input voltage range V IN -OP 0 V CC -.5 V Output current (SINK) SINK-OP 2 ma Output current (SOURCE) SOURCE-OP * μa Output offset voltage V OFF -OP -0 0 mv CH input changeover voltage VSW-OP CH input AMP(B), external REF select *6 2 V CH input changeover voltage 2 VSW-OP2 CH input AMP(A), internal VREF select *6 0.5 V Loading Block (CH5, H bridge) Output voltage V O -LOAD At forward and reverse rotation, V R L = 8Ω, VCONT=V CC *3 Break output saturation voltage V CE -BREAK Output voltage at braking *7 0.3 V Input low level V IN -L V Input high level V IN -H 2 V Power Supply Block (PNP transistor : 2SB632K-use) 5V supply voltage V OUT I O = 200mA V REG-IN SINK current REG-IN-SINK Base current of external PNP *8 5 0 ma Line regulation ΔV O LN 6V V CC 2V, I O = 200mA 0 00 mv Load regulation ΔV O LD 5mA I O 200mA 0 00 mv Note * : Current dissipation that is a sum of V CC and V CC 2 at no load. *2 : Input AMP is a BUFFER AMP. *3 : Voltage difference between both ends of load (8Ω). Output saturated. *4 : Output ON with : [H] and OFF with : [L] (HI impedance). *5 : The source of input OP-AMP is a constant current. As the kω resistance to the next stage is a load, pay due attention when setting the input OP-AMP gain. *6 : With V IN -SW : [L], the input AMP selects AMP-A while VREF selects internal VREF ( 2.5V). With V IN -SW : [H], the input AMP selects AMP-B while VREF selects external VREF ( VREF-IN). *7 : Short (GND) brake used. SINK side output ON. *8 : 5VREG incorporates a drooping protection circuit and operated when the base current is 0mA (TYP). No.A0599-2/9

3 Package Dimensions unit : mm (typ) (6.2) (4.9) (0.5) (2.25) max SANYO : HSOP36R(375mil) Allowable power dissipation, Pd max W 2.5 When mounted on a board 2.5 Independent IC Pd max -- Ta Specified board : mm 3 glass epoxy Ambient temperature, Ta C No.A0599-3/9

4 Block Diagram FWD REV 2 Input Thermal shutdown Signal system GND (LOAD output voltage setting) VCONT VCC2 3 BTL-AMP Output ON/OFF 34 VLO- VLO+ 4 5 Output control 22kΩ kω VIN4 VIN4- VO4+ VO4-6 7 Level shift 3 30 VIN4+ VREF-IN VO3+ VO3-8 9 Level shift VIN/VREF-SW VIN(VREF)-SW VREF-OUT(CH) Power system GND Power system GND 5VREG (Extemal PNP) VO2+ VO2-0 Level shift REG-OUT REG-IN VO+ VO- 2 3 Level shift 22kΩ kω VIN3+ VIN3- VCC V IN 4 5 kω 22kΩ 22kΩ kω VIN3 V IN 2+ V IN -A V IN +A V IN -B AMP-A AMP-B [L] [H] V IN (VREF)-SW [L]:Internal VREF (2.5V fixed) [H]:Internal VREF V IN (VREF)-SW [L]:AMP-A [H]:AMP-B V IN 2- V IN 2 V IN +B No.A0599-4/9

5 Pin Functions Pin No. Symbol Pin descriptions FWD Output change pin (FWD) for 5CH (VLO), logic input for loading block. 2 REV Output change pin (REV) for 5CH (VLO), logic input for loading block. 3 V CC 2 Power supply for CH3, 4, and 5. 4 VLO- Loading output (-) 5 VLO+ Loading output (+) 6 V O 4+ Output pin (+) for channel 4 7 V O 4- Output pin (-) for channel 4 8 V O 3+ Output pin (+) for channel 3 9 V O 3- Output pin (-) for channel 3 0 V O 2+ Output pin (+) for channel 2 V O 2- Output pin (-) for channel 2 2 V O + Output pin (+) for channel 3 V O - Output pin (-) for channel 4 V CC Power supply for CH, 2 (BTL). 5 V IN Input pin for channel 6 V IN -A OP-AMP input AMP-A input pin (-) 7 V IN +A OP-AMP input AMP-A input pin (+) 8 V IN -B Input AMP-B input pin (-) for channel 9 V IN +B Input AMP-B input pin (+) for channel 20 V IN 2 Input pin for channel 2, input AMP output 2 V IN 2- Input pin (-) for channel 2 22 V IN 2+ Input pin (+) for channel 2 23 V IN 3 Input pin for channel 3, input AMP output 24 V IN 3- Input pin (-) for channel 3 25 V IN 3+ Input pin (+) for channel 3 26 REG-IN PNP transistor base connected 27 REG-OUT 5V power output to which the PNP transistor collector connected. 28 VREF-OUT CH reference voltage output. Outputs internal VREF (2.5V : TYP) or external VREF. 29 V IN (VREF) -SW Pin for changeover between input AMP-A/internal VREF (TYP2.5V) and input AMP-B/ external VREF. 30 VREF-IN Reference voltage applied pin 3 V IN 4+ Input pin (+) for channel 4 32 V IN 4- Input pin (-) for channel 4 33 V IN 4 Input pin for channel 4, input AMP output 34 All BTL AMP output ON/OFF 35 VCONT LOADING output voltage setting 36 Signal system GND Note : Center frame () becomes GND for the power system (P-GND). Set this to the minimum potential together with. No.A0599-5/9

6 Pin Description Pin No. Symbol Pin function Description Equivalent circuit 7 9 V IN +A V IN +B Input (CH to 4) Input pin (CH to 4) 6 V IN -A VIN*- VCC 8 V IN -B 5 V IN 22 V IN 2+ 2 V IN 2- VIN* V IN 2 V IN 3+ V IN 3- V IN 3 V IN 4- V IN 4+ V IN 4 2 FWD REV Input (H bridge) Logic input pin. By combining H and L of this pin, any one of four modes (forward/ reversed/brake/idling) can be selected. FWD 50kΩ 50kΩ VIN* 50kΩ 50kΩ REV V O + V O - V O 2+ V O 2- V O 3+ V O 3- V O 4+ V O 4- Output (BTL-AMP) Output for channel to 4. VCC* VO* RF* VLO- VLO+ VCONT Output (H bridge) H bridge (LOADING) output and LOADING output setting pin VCC VLO+ VLO- P-GND 20kΩ kω kω 20kΩ VCONT 34 BTL AMP output, which turns ON/OFF the output, : H Output OFF : L Output OFF VCC 00kΩ 00kΩ No.A0599-6/9

7 Truth Table (loading (H bridge) section) LA6560 FWD REV VLO+ VLO- Loading output L H L OFF OFF OFF * H H L Forward L L H Reversed H L L (Short) brake *2 * The output has a high impedance. *2 At brake, the SINK side transistor is ON (short brake). VLO+ and VLO- are approximately on the GND level. Relation of and Power (VCC*) CH(BTL) CH2(BTL) CH3(BTL) VCC CH4(BTL) VCC2 CH5 (H bridge) VIN (VREF)-SW (CH input AMP selection and internal/external VREF selection function) (Relation between input AMP (CH only) and VREF) V IN _SW Input AMP (CH) state VREF state H V IN -A (AMP-A) Internal VREF (2.5V : TYP) L V IN -B (AMP-B) External VREF Internal reference voltage (2.5V (TYP)) VIN-A External reference voltage VIN-B 0.5V 2V VREF (VIN)-SW On BTLAMP output VREF-OUT L H OFF ON VREF-OUT operates in an interlock with. No.A0599-7/9

8 Sample Application Circuit SW FWD 36 LOADING 2 REV VCONT 35 ELEVETOR 3 VCC2 34 LOADING MOTOR 0.μF M 4 5 VLO- VLO+ VIN4 VIN μF 6 VO4+ VIN4+ 3 TRACKING COIL 7 VO4- VREF-IN 30 0.μF 8 VO3+ VIN(VREF)-SW 29 FOCUS COIL 9 VO3- VREF-OUT(CH) 28 SPINDLE MOTOR SLED MOTOR 0.μF M 0.μF M VO2+ VO2- VO+ VO- REG-OUT REG-IN VIN3+ VIN VREG VCC VCC 4 VCC VIN VIN VIN VIN-A VIN2-2 7 V IN +A V IN V IN -B V IN +B 9 TRACKING FOCUS SPINDLE SLED VREF No.A0599-8/9