CCD image sensor. High-speed operation, back-thinned FFT-CCD. S9037/S9038 series. Structure

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1 High-speed operation, back-thinned FFT-CCD The FFT-CCD image sensors were developed for high-speed line scan cameras. Since an on-chip amplifier having a wide bandwidth is used to an image sensor, a pixel rate of MHz can be obtained. The image sensors also deliver a high line scan rate equivalent to interline CCD sensors when used in line binning operation mode, because they have an active area pixel format where the number of vertical pixels is less than the number of horizontal pixels. This makes the suitable for line scan cameras. The image sensors have a pixel size of μm and are available in pixel formats of 52 4 pixels and 24 4 pixels. The S938 series has a one-stage thermoelectric cooler assembled in the same package allowing stable operation at cooled temperatures. Both the image sensors use a quartz glass window equivalent to SUPRASIL glass that provides high transmittance even at 93 nm wavelength. These image sensors also have stable quantum efficiency in the UV region making them suitable for excimer laser monitors. Features High-speed operation: MHz Pixel size: μm Line/pixel binning operation S938 series: one-stage thermoelectric cooling High quantum efficiency: 9% or more at peak MPP operation Applications Excimer laser monitors High-speed line scan cameras Structure Parameter S S937-2 S938-92S S938-2S Pixel size (H V) μm Number of total pixels (H V) Number of effective pixels (H V) Image size (H V) mm mm mm mm Vertical clock 2 phases Horizontal clock 2 phases Output circuit Two-stage MOSFET source follower Package 24-pin ceramic DIP Window material* Quartz window equivalent to SUPRASIL* 2 AR-coated sapphire* 3 Cooling Non-cooled One-stage TE-cooled *: Window-less type (ex. S937-92N) is available as option. (Temporary window is fixed by tape to protect the CCD and wire bonding.) *2: Resin sealing *3: Hermetic sealing

2 Absolute maximum ratings (Ta=25 C) Parameter Symbol Min. Typ. Max. Unit Operating temperature* 4 Topr C Storage temperature Tstg C Output transistor drain voltage VOD V Reset drain voltage VRD V Horizontal input source voltage VISH V Horizontal input gate voltage VIGH, VIG2H V Summing gate voltage VSG V Output gate voltage VOG V Reset gate voltage VRG V Transfer gate voltage VTG V Vertical shift register clock voltage VPV, VP2V V Horizontal shift register clock voltage VPH, VP2H V Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the product within the absolute maximum ratings. *4: Chip temperature Operating conditions (MPP mode, Ta=25 C) Parameter Symbol Min. Typ. Max. Unit Output transistor drain voltage VOD V Reset drain voltage VRD V Output gate voltage VOG 3 5 V Substrate voltage VSS - - V Test point Horizontal input source VISH - VRD - V Horizontal input gate VIGH, VIG2H -9-8 V Vertical shift register High VPVH, VP2VH clock voltage Low VPVL, VP2VL V Horizontal shift register High VPHH, VP2HH clock voltage Low VPHL, VP2HL V Summing gate voltage High VSGH Low VSGL V Reset gate voltage High VRGH Low VRGL V Transfer gate voltage High VTGH Low VTGL V External load resistance RL k Electrical characteristics (Typ. Ta=25 C unless otherwise noted) Parameter Symbol Min. Typ. Max. Unit Signal output frequency fc - - MHz Line rate LR khz Vertical shift register capacitance pf CPV, CP2V pf Horizontal shift register capacitance pf CPH, CP2H pf Summing gate capacitance CSG pf Reset gate capacitance CRG pf Transfer gate capacitance CTG pf Transfer efficiency* 5 CTE DC output level Vout V Output impedance* 6 Zo Power dissipation* 6 * 7 P - - mw *5: Charge transfer efficiency per pixel, measured at half of the full well capacity *6: The values depend on the load resistance. *7: Power dissipation of the on-chip amplifier plus load resistance 2

3 Electrical and optical characteristics (Typ. Ta=25 C unless otherwise noted) Parameter Symbol Min. Typ. Max. Unit Saturation output voltage Vsat Fw Sv V Full well capacity Vertical Fw Horizontal (summing) ke - CCD node sensitivity Sv μv/e - Dark current* 8 25 C - DS (MPP mode) C - e - /pixel/s Readout noise* 9 Nr - - e - rms Dynamic range (line binning) DR Photoresponse nonuniformity* PRNU - - ± % Spectral response range (without window) - 2 to - nm *8: Dark current nearly doubles for every 5 to 7 C increase in temperature. *9: -4 C, operating frequency=8 khz *: Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 56 nm) Fixed pattern noise (peak to peak) Photoresponse nonuniformity (PRNU) = Signal [%] Spectral response (without window)* 9 (Typ. Ta=25 C) Back-thinned CCD 8 Quantum efficiency (%) Front-illuminated CCD (UV coated) Front-illuminated CCD Wavelength (nm) KMPDB58EB *: Spectral response with quartz glass or AR-coated sapphire are decreased according to the spectral transmittance characteristic of window material. 3

4 Spectral response (typical example, to 2 nm, without window) Spectral transmittance characteristic 2 (Ta=25 C) (Typ. Ta=25 C) 9 Quantum efficiency (%) Transmittance (%) AR coated sapphire Quartz window Wavelength (nm) Wavelength (nm) KMPDB5EA KMPDBEA Dark current vs. temperature (Typ.) Dark current (e - /pixel/s) Temperature ( C) KMPDB256EA 4

5 Device structure (conceptual drawing of top view) S937-92, S938-92S Thinning Effective pixels Effective pixels SS Thinning RG RD OD OS Horizontal shift register PV P2V TG ISH 2-bevel 4 signal out 6 OG SG P2H PH IG2H IGH Horizontal shift register 4 blank pixels 52 signal out 4 blank pixels Note: When viewed from the direction of the incident light, the horizontal shift register is covered with a thick silicon layer (dead layer). However, long-wavelength light passes through the silicon dead layer and may possibly be detected by the horizontal shift register. To prevent this, provide light shield on that area as needed. KMPDC59EE S937-2, S938-2S Thinning Effective pixels Effective pixels SS Thinning RG RD OD OS Horizontal shift register PV P2V TG ISH 3-bevel -bevel 4 signal out 8 OG SG P2H PH IG2H IGH Horizontal shift register 4 blank pixels 6-bevel 24 signal out 6-bevel 4 blank pixels Note: When viewed from the direction of the incident light, the horizontal shift register is covered with a thick silicon layer (dead layer). However, long-wavelength light passes through the silicon dead layer and may possibly be detected by the horizontal shift register. To prevent this, provide light shield on that area as needed. KMPDC6ED KMPDC6ED 5

6 Timing chart (line binning) Integration period (Shutter must be open) Vertical binning period (Shutter must be closed) Readout period (Shutter must be closed) PV Tpwv Tovr (bevel): S93* (bevel): S93*-2 P2V, TG PH Tpwh, Tpws : S93*-92 44: S93*-2 P2H, SG RG Tpwr OS D D D2..D4 S..S52 D2..D, S..S24 D5..D7 D..D9 D8 : S93*-92 D2 : S93*-2 KMPDC6EB Parameter Symbol Min. Typ. Max. Unit PV, P2V, TG* 2 Pulse width Tpwv ns Rise and fall times Tprv, Tpfv ns PH, P2H* 2 Rise and fall times Tprh, Tpfh - - ns Pulse width Tpwh ns Duty ratio % Pulse width Tpws ns SG Rise and fall times Tprs, Tpfs - - ns Duty ratio % RG Pulse width Tpwr ns Rise and fall times Tprr, Tpfr ns TG (P2V) - PH Overlap time Tovr μs *2: Symmetrical clock pulses should be overlapped at 5% of maximum pulse amplitude. 6

7 Dimensional outline (unit: mm) S Window 6.3* Photosensitive area S937-2 Window 28.6* Photosensitive area * ± ± ± ±.34 pin no. 2.4 ± * ± ± ± ± ± ± ±.49 pin no ± ± ± ±.49 (24 ).5 ±.5 (24 ).5 ±.5 * Size of window that guarantees the transmittance in the Spectral transmittance characteristic graph * Size of window that guarantees the transmittance in the Spectral transmittance characteristic graph KMPDA54EC KMPDA53ED S938-92S Window 6.3* Photosensitive area * ± ± ± ± ±.3 pin no. 4.8 ± ± ± ±.68 TE-cooler 3.. (24 ).5 ±.5 * Size of window that guarantees the transmittance in the Spectral transmittance characteristic graph KMPDA55EC 7

8 S938-2S Window 28.6* Photosensitive area KMPDA56EC S937-92N S937-2N Window6.3 Window Photosensitive area ± ± ±.5.96 Photosensitive area ± ± ± ± ± ±.34 2 pin no. 2.4 ± ±.49 pin no * ± ± ± ± ±.3 pin no. 4.8 ± ± ± ±.66 TE-cooler. (24 ).5 ±.5 * Size of window that guarantees the transmittance in the Spectral transmittance characteristic graph 2.4 ± ±.49 (24 ).5 ±.5 KMPDA65EC (24 ).5 ±.5 KMPDA66EC 8

9 S938-92N Window 6.3 Photosensitive area ± ± ± ± ±.3 2 pin no. 4.8 ± ±.68 TE-cooler 3.. (24 ).5 ±.5 KMPDA67EC S938-2N Window 28.6 Photosensitive area ± ± ± ± ± ±.3 2 pin no. 4.8 ± ±.68 TE-cooler 3.. (24 ).5 ±.5 KMPDA68EC 9

10 Pin connections Pin S937 series S938 series Remark no. Symbol Description Symbol Description Remark RD Reset drain +2 V RD Reset drain +2 V 2 OS Output transistor source RL=2.2 k OS Output transistor source RL=2.2 k 3 OD Output transistor drain +5 V OD Output transistor drain +5 V 4 OG Output gate +3 V OG Output gate +3 V 5 SG Summing gate Same timing as P2H SG Summing gate Same timing as P2H P2H CCD horizontal register clock-2 P2H CCD horizontal register clock-2 9 PH CCD horizontal register clock- PH CCD horizontal register clock- IG2H Test point (horizontal input gate-2) -8 V IG2H Test point (horizontal input gate-2) -8 V IGH Test point (horizontal input gate-) -8 V IGH Test point (horizontal input gate-) -8 V 2 ISH Test point (horizontal input source) Connected to RD ISH Test point (horizontal input source) Connected to RD 3 TG* 3 Transfer gate Same timing as P2V TG* 3 Transfer gate Same timing as P2V 4 P2V CCD vertical register clock-2 P2V CCD vertical register clock-2 5 PV CCD vertical register clock- PV CCD vertical register clock- 6 NC Th Thermistor 7 NC Th2 Thermistor 8 NC P- TE-cooler- 9 NC P+ TE-cooler+ 2 SS Substrate (GND) GND SS Substrate (GND) GND 2 NC NC 22 NC NC 23 NC NC 24 RG Reset gate RG Reset gate *3: Isolation gate between vertical register and horizontal register. In standard operation, input the same pulse to TG as input to P2V. Specifications of built-in TE-cooler (Typ.) Parameter Symbol Condition S938-92S S938-2S Unit Internal resistance Rint Ta=25 C Maximum current* 4 Imax Tc* 5 =Th* 6 =25 C.5 3. A Maximum voltage Vmax Tc* 5 =Th* 6 =25 C V Maximum heat absorption* 7 Qmax W Maximum temperature of heat radiating side C *4: If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and maintain stable operation, the supply current should be less than 6% of this maximum current. *5: Temperature of the cooling side of thermoelectric cooler *6: Temperature of the heat radiating side of thermoelectric cooler *7: This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the maximum current is supplied to the unit.

11 S938-92S S938-2S 7 6 (Typ. Ta=25 C) 3 Voltage vs. current CCD temperature vs. current (Typ. Ta=25 C) 3 Voltage vs. current CCD temperature vs. current 2 Voltage (V) CCD temperature ( C) Voltage (V) CCD temperature ( C) Current (A) Current (A) KMPDB78EA KMPDB79EA Specifications of built-in temperature sensor A chip thermistor is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation between the thermistor resistance and absolute temperature is expressed by the following equation. RT = RT2 exp BT/T2 (/T - /T2) RT: resistance at absolute temperature T [K] RT2: resistance at absolute temperature T2 [K] BT/T2: B constant [K] MΩ (Typ.) The characteristics of the thermistor used are as follows. R298= k B298/323=345 K Resistance kω kω Temperature (K) KMPDBEB Precautions (electrostatic countermeasures) Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing and use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. Ground the tools used to handle these sensors, such as tweezers and soldering irons. It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. Element cooling/heating temperature incline rate Element cooling/heating temperature incline rate should be set at less than 5 K/min.

12 Related information Precautions Notice Image sensors/precautions Technical information FFT-CCD area image sensor/technical information Information described in this material is current as of September, 26. Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always contact us for the delivery specification sheet to check the latest specifications. The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use. Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission. HAMAMATSU PHOTONICS K.K., Solid State Division 26- Ichino-cho, Higashi-ku, Hamamatsu City, Japan, Telephone: (8) , Fax: (8) U.S.A.: Hamamatsu Corporation: 36 Foothill Road, Bridgewater, N.J. 887, U.S.A., Telephone: () , Fax: () Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr., D-822 Herrsching am Ammersee, Germany, Telephone: (49) , Fax: (49) France: Hamamatsu Photonics France S.A.R.L.: 9, Rue du Saule Trapu, Parc du Moulin de Massy, 9882 Massy Cedex, France, Telephone: 33-() , Fax: 33-() United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, Tewin Road, Welwyn Garden City, Hertfordshire AL7 BW, United Kingdom, Telephone: (44) , Fax: (44) North Europe: Hamamatsu Photonics Norden AB: Torshamnsgatan Kista, Sweden, Telephone: (46) , Fax: (46) Italy: Hamamatsu Photonics Italia S.r.l.: Strada della Moia, int. 6, 22 Arese (Milano), Italy, Telephone: (39) , Fax: (39) China: Hamamatsu Photonics (China) Co., Ltd.: B2, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 2, China, Telephone: (86) , Fax: (86) Cat. No. KMPD67E8 Sep 26 2