Development of Ultra Fast Silicon Detectors for 4D Tracking
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1 Development of Ultra Fast Silicon Detectors for 4D Tracking V. Sola, R. Arcidiacono, R. Bellan, A. Bellora, S. Durando, N. Cartiglia, F. Cenna, M. Ferrero, V. Monaco, R. Mulargia, M.M. Obertino, R. Sacchi, A. Staiano INFN and Università di Torino, Università del Piemonte Orientale 14TH TOPICAL SEMINAR ON INNOVATIVE PARTICLE AND RADIATION DETECTORS
2 WHY 4D TRACKING? The research into 4D tracking is strongly motivated by the HL-LHC experimental conditions: events per bunch crossing According to CMS simulation: Time RMS between vertices ~ 150 ps Average distance between vertices ~ 500 µm Fraction of overlapping vertices ~ 10-20% Ofthose events, a large fractionwill have significant degradation of the quality of the HL-LHC timing allows to exploit the total delivered luminosity preventing from efficiency loss In other experiments (NA62, PADME, Mu3e) Timing is key to background rejection V. Sola IPRD16 - SIENA
3 THE EFFECT OF TIMING The inclusion of track-timing in the event information has the capability of changing radically how we design experiments Timing can be available at different levels of the event reconstruction: Timing in the event reconstruction Timing at each point along the track Timing at the trigger level V. Sola IPRD16 - SIENA
4 TIMING IN THE EVENT RECONSTRUCTION Timing allows distinguishing overlapping events by means of an extra dimension V. Sola IPRD16 - SIENA
5 TIMING AT EACH POINT ALONG THE TRACK Massive simplification of pattern recognition, new tracking algorithms will be faster even in very dense environments Use only time compatible points Timing V. Sola IPRD16 - SIENA
6 TIMING AT THE TRIGGER LEVEL Timing at the trigger decision allows reducing the trigger rate rejecting topologies that look similar V. Sola IPRD16 - SIENA
7 WHERE DO WE STAND? The tracking community thinks it is a wonderful idea, clearly to be implemented outside the tracker volume, in front of the calorimeter Event reconstruction The calorimeter community thinks it is a wonderful idea, clearly to be implemented far from the calorimeter, in the tracker volume Track reconstruction Trigger level V. Sola IPRD16 - SIENA
8 A TIME-TAGGING DETECTOR (a simplified view) TDC Time is set when the signal crosses the comparator threshold The timing capabilities are determined by the characteristics of the signal at the output of the pre-amplifier and by the TDC binning Strong interplay between sensor and electronics V. Sola IPRD16 - SIENA
9 SENSOR - STATE OF THE ART Silicon Sensors GigaTracker NA62: s t ~ 150 ps Silicon detector + SiGe HBT amplifier [1] : s t ~ 105 ps + Fine segmentation easy + Known technology - Small signal Intrinsic resolution: s t ~ 100 ps Diamond Detectors TOTEM Diamonds for CT-PPS ToF: s t ~ 100 ps + No leakage current + Radiation hard + Small capacitance, high mobility - Small signal Intrinsic resolution: s t ~ 100 ps APD (Avalanche PhotoDiodes) + Thin sensors (30-50 µm) + High signal (gain ) - Sensitive to shot noise - Radiation resistance up to n eq /cm 2 - Fine segmentation difficult Intrinsic resolution: s t ~ 30 ps LGAD (Low Gain Avalanche Diodes) + Thin sensors (50 µm) + Medium-high signal (gain 10-20) + Shot noise under control - Radiation resistance under investigation (within RD50 Coll.) - Possible fine segmentation Intrinsic resolution: s t ~ 30 ps [1] M. Benoit et al., arxiv: V. Sola IPRD16 - SIENA
10 LGAD - ULTRA-FAST SILICON DETECTORS Adding a highly doped, thin layer of p-implant near the p-n junction creates a high electric field that accelerates the electrons enough to start multiplication (same principle of APD but with much lower gain) FBK - LGAD See G. Paternoster talk for details Gain changes very smoothly with bias voltage Easy to set the optimal value of gain V. Sola IPRD16 - SIENA
11 FAST TIMING - THE INGREDIENTS (I) σ 2 2 t = σ Jitter 2 + σ Landau Time Walk 2 + σ Landau Noise σ Distortion + σ TDC σ TDC = 9:;< ~ 7 ps considering 25 ps binning of the HPTDC =9 Negligible σ Landau Time Walk : the effect can be compensated by an appropriate electronic circuit (using CDF or ToT) Negligible V. Sola IPRD16 - SIENA
12 FAST TIMING - THE INGREDIENTS (II) σ Jitter = N dv/dt = t HIJK S/N From Ramo s theorem: i q O v drift O E w and doing some easy algebra S I MAX Gain Use Gain (G = 10-20) t rise 1 d σ Landau Noise Go thin (d = 50 µm) : due to the physics governing energy deposition The charge distribution created by an ionizing particle crossing a sensor varies on an event-by-event basis and produce an irregular current signal To minimize the effect Go thin (d = 50 µm) Intrinsic limit: σ Landau Noise ~ 20 ps total current electron current hole current total current electron current hole current Simulation done with Weightfield2 (WF2) [F. Cenna, 9 th Trento Workshop, Genova, 2014] V. Sola IPRD16 - SIENA
13 FAST TIMING - THE INGREDIENTS (III) σ Distortion : signal shape is determined by Ramo s theorem i q O v drift O E w Drift velocity and weighting field need to be as uniform as possible Basic rule: parallel plate geometry strip implant ~ strip pitch >> thickness YES NO 2 Shot Noise: ENC = i Shot df = IO(Gain)2]x 2e Shot noise increases faster than the signal -> the ratio S/N becomes worse at high gain To minimize the shot noise Low gain (G = 10-20) Cool the detector Use small pads to have less leakage current O τ Int Best S/N ratio Output Signal: I L M Shot noise Noise floor, gain independent M opt Gain V. Sola IPRD16 - SIENA
14 ULTRA FAST SILICON DETECTORS UFSD are LGAD detectors optimised to achieve the best possible time resolution Specifically: 1. Thin to maximise the slew rate (dv/dt) 2. Parallel plate - like geometry (pixel) for most uniform weighting field 3. High electric field to saturate the drift velocity 4. Highest possible resistivity to have uniform electric field 5. Small area to keep the capacitance low 6. Small volume to keep the leakage current low V. Sola IPRD16 - SIENA
15 ELECTRONICS - WHICH PRE-AMP? Energy deposition in a 50 µm sensor Current Amplifier Fast signal steepness Higher noise Sensitive to Landau bumps More power Current signal in a 50 µm sensor Charge Sensitive Amplifier Slower signal steepness Lower noise Signal smoothing Less power V. Sola IPRD16 - SIENA
16 SENSORS - FBK & CNM FBK 300 µm Very successful: good gain and overall behaviour (see G. Paternoster talk) FBK 50 µm expected by early 2017 x4 CT-PPS CNM 75 µm CNM 50 µm x3 TOTEM ATLAS High Granularity Timing Det. V. Sola IPRD16 - SIENA
17 UFSD TIME RESOLUTION - LATEST RESULTS Fully custom made UFSD readout (UCSC) Beam SPS H8 area (180 GeV/c pions) CNM production of thin sensors 50 µm V. Sola IPRD16 - SIENA
18 THE SIGNAL - AN EXAMPLE Fast, low noise signal, ideal for timing 200 mv/div 2ns/div V. Sola IPRD16 - SIENA
19 TIME RESOLUTION AS DIFFERENCE UFSD-SiPM Very accurate SiPM as trigger (s SiPM ~ 15 ps) CFD 30% Multiple UFSD tracking system Submitted to NIMA V. Sola IPRD16 - SIENA
20 SUMMARY OF UFSD BEAM TEST RESULTS 2014 Frascati: UFSD 7x7mm 2 300µm (C = 12pF, Gain =10) 2014 CERN: UFSD 7x7mm µm (C = 12pF, Gain =10) 2015 CERN: UFSD 3x3mm µm (C = 4pF, Gain =10-20) 2015 CERN: UFSD 1x1mm 2 75 µm (C = 2pF, Gain =5) 2016 CERN: UFSD 1.2x1.2mm 2 50 µm (C = 3pF, Gain =15) CNM 300 µm FBK 300 µm - Wafer 3 FBK 300 µm - Wafer 10 CNM 75 µm CNM 50 µm 34 ps! V. Sola IPRD16 - SIENA
21 SUMMARY & OUTLOOK Tracking in 4 Dimensions is a very powerful tool Low Gain Avalanche Diodes have the potential to bring this technique to full fruition using gain ~ 10 and thin sensors Why low gain? Milder electric fields, possible electrodes segmentation, lower shot noise, no dark count, behaviour similar to standard Silicon sensors Why thin sensors? Higher signal steepness, more radiation resistance, easier to achieve parallel plate geometry, smaller Landau Noise Next steps: Radiation hard studies Electronics for larger sensors (20-30 pf) V. Sola IPRD16 - SIENA
22 ACKNOWLEDGEMENTS We kindly acknowledge the following funding agencies, collaborations: INFN - Gruppo V Horizon 2020, grant UFSD Horizon 2020, grant INFRAIA Ministero degli Affari Esteri, Italy, MAE, Progetti di Grande Rilevanza Scientifica U.S. Department of Energy grant number DE-SC RD50, CERN V. Sola IPRD16 - SIENA
23 BACKUP V. Sola IPRD16 - SIENA
24 LANDAU NOISE Resolution is due to shape variation only, assuming perfect time walk compensation 300 micron thick 50 micron thick To minimise Landau noise: set the comparator threshold as low as you can use thin sensors V. Sola IPRD16 - SIENA
25 UFSD & RADIATION HARDNESS - I Irradiation causes 3 main effects: 1. Decrease of charge collection efficiency due to trapping 2. Increased leakage current 3. Changes in doping concentration 1. Decrease of charge collection efficiency due to trapping In 50 µm thick sensors the effect is rather small: up to n eq /cm 2 the effect is negligible in the fast initial edge used for timing (full sim of CCE effect) Electronics need to be calibrated for different signal shapes V. Sola IPRD16 - SIENA
26 UFSD & RADIATION HARDNESS - II 2. Increased leakage current Shot noise starts to be important at fluences above ~ n eq /cm 2 Keep the sensor cold Low gain Small sensor 3. Changes in doping concentration The effect is still under deep investigation R&D paths: Use V bias to compensate for the loss of gain Use thin sensors: weaker dynamic effects Long term: Gallium doping instead of Boron V. Sola IPRD16 - SIENA
27 UFSD - SENSOR PRODUCTION Two silicon foundries produce LGAD sensor for the Ultra-Fast Silicon Detector (UFSD) project: CNM (Barcellona, Spain): within the RD50 Collaboration 300 µm thick LGAD production provided in µm thick LGAD production, in Santa Cruz 50 µm sensor production (SOI) dedicated to CT-PPS geometry, released in June 50 µm sensor production (EPI - different r values), expected soon FBK (Trento, Italy): in the framework of ERC-UFSD/INFN in collaboration with Torino first 300 µm thick LGAD production released in March 50 µm sensor production with final CT-PPS design expected by early 2017 V. Sola IPRD16 - SIENA
28 UFSD - GAIN 50 µm Gain layer doping doses similar to 300 µm production will be used also for 50 µm UFSD production (both CNM and FBK) To get gain values comparable to 300 µm V bias ~ 800 V V bias ~ 150 V can be applied to 50 µm UFSD sensors (from tcad and WF2 simulations) V. Sola IPRD16 - SIENA
29 MERGING TIMING WITH POSITION RESOLUTION Electrode segmentation makes the E field very non uniform, and therefore ruins the timing properties of the sensor We need to find a geometry that has very uniform E field and gain, while allowing electrode segmentation. V. Sola IPRD16 - SIENA
30 SEGMENTATION - BURIED JUNCTION Separate the multiplication side from the segmentation side Parallel plate geometry Move the gain layer to the deep side Segmented geometry n-in-p p-in-p For a 100 µm detector, the current does not change Moving the junction on the deep side allows having a very uniform multiplication, regardless of the electrode segmentation V. Sola IPRD16 - SIENA
31 SEGMENTATION - AC COUPLING Standard n-in-p LGAD, with AC read-out AC coupling n+ electrode gain layer p++ electrode AC coupling The resistivity is used to virtually reduce the volume seen by the electronics Detector Detector Detector Detector Detector Detector V. Sola IPRD16 - SIENA
32 SEGMENTATION: SPLITTING GAIN AND POSITION The real solution: monolithic > 10 years This is the correct approach, however it will take time. V. Sola IPRD16 - SIENA
33 SENSOR GEOMETRY FOR CT-PPS 50 micron inactive gap 1.0 mm 0.5 mm 0.45 mm 3.1 mm Beam spot 2.9 mm 0.95 mm Asymmetric design Area = 12mm x 6mm Thickness = 50 um # of channels = 32 Gain ~ 15 Slim edge of ~200 µm on side A 16 Pixel ~ 3 mm 2 Cap. Pixel ~ 6 pf 16 Pixel ~ 2 mm 2 Cap. Pixel ~ 4 pf side A Expected time resolution: ~30 ps per plane V. Sola IPRD16 - SIENA
34 TOFFEE: TIME OF FLIGHT FRONT-END ELECTRONICS 110 nm UMC technology 8 channel chip Channel: current sense amplifier, discriminator, stretcher and driver LVDS - output compatible with HPTDC Power consumption: 15 mw/ch Chip submitted to the foundry on beginning of May Delivered in September Currently under test (designed by Torino and Lisbon) V. Sola IPRD16 - SIENA
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