Real-time FPGA realization of an UWB transceiver physical layer

Transcription

1 University of Wollongong Thesis Collections University of Wollongong Thesis Collection University of Wollongong Year 2005 Real-time FPGA realiation of an UWB transceiver physical layer Darryn W. Lowe University of Wollongong Lowe, Darryn W, Real-time FPGA realiation of an UWB transceiver physical layer, M. Eng. thesis, School of Electrical, Computer and Telecommunications Engineering, University of Wollongong, This paper is posted at Research Online.

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3 REAL-TIME FPGA REALIZATION OF AN UWB TRANSCEIVER PHYSICAL LAYER A thesis submitted in fulfilment of the requirements for the award of the degree MASTER OF ENGINEERING RESEARCH from UNIVERSITY OF WOLLONGONG by Darryn W. Lowe, BEng (Hons 1) School of Electrical, Computer and Telecommunications Engineering 2005

4 I, Darryn W. Lowe, declare that this thesis, submitted in partial fulfilment of the requirements for the award of Master of Engineering Research, in the School of Electrical, Computer and Telecommunications Engineering, University of Wollongong, is wholly my own work unless otherwise referenced or acknowledged. The document has not been submitted for qualifications at any other academic institution. Darryn W. Lowe 14 November 2005 iii

5 Contents 1 Introduction Design Methodology Contributions A Novel UWB PHY MCIDS CCDM Specification Preamble SFD PHY Header Definition HCS Scrambling Symbol Mapping Prespreading CCDM Pilot Insertion MCIDS Spreading Spectral Mask Transmitter Top-Level Architecture v

6 3.2 Bus Interfacing Control Word Status Word Packet Buffer Header Preparation Header Timing Header Check Sum Scrambler Symbol Creation Symbol Buffer Constellation Mapping CCDM Spreading Architecture Control Separating I/Q Components MCIDS Buffering Pilot Insertion Preamble Generation Interleaving Spreading Transmitted Signal Receiver MCIDS Despreading MCIDS RAKE Frame Detection Equaliation Automatic Gain Control DetectSFD vi

7 4.2 CCDM Demodulation Removing Pilots Buffering Despreading Constellation Demapping I/Q Buffer Demapping Header Processing Data Rate Management Descrambling Header Validation Bus Packet Buffer Control Registers Analysis Test Environment RF Front-end Models Channel Models MAC Models Performance AWGN Multipath Channel Sensitivity to Word Length Complexity Device Selection Synthesis Results Conclusions 167 A Transmitter Models 171 vii

8 B Receiver Models 187 C Parametriation Scripts 209 C.1 Constants C.1.1 Global Constants C.1.2 Parameters C.2 ROMs C.2.1 Transmitter CCDM Codeset ROM C.2.2 Receiver CCDM Codeset ROM C.2.3 Receiver MCIDS Codeset ROM C.2.4 Receiver Synchroniation Codeset ROM C.2.5 Receiver RAKE Correlator Interleaver D Simulation 219 D.1 Functional Blocks D.1.1 CRC D.1.2 Scrambler D.1.3 Constellation Mapping D.1.4 CCDM D.1.5 Pilots D.1.6 Preamble D.1.7 MCIDS D.2 Simulation Framework D.2.1 Top-Level Simulation D.2.2 End-to-End Link Model D.2.3 Packet Constructor D.2.4 Transmitter Baseband Model D.2.5 Multipath Channel Model D.2.6 Receiver Front-end Model D.2.7 Receiver Baseband Model viii

9 List of Tables 2.1 Example of an MCIDS Spread Signal for M = N = Example of MCIDS Despreading for M = Preamble Sequence SFD Sequence PHY Header Definition Data Rate Mappings for PHY Header Initial Values for PRBS Normaliation Constants for Symbol Constellations Prespread Codes Transceiver Spectral Mask Example of Buffer Signal Mask Generation Derivation of Header Control Signal Constants Data Bits for Modulation Types Relationship between Symbol Density and FIFO Reads Constellation Mapping for BPSK & QPSK Construction of Out Code Calculation of MCIDS Buffer Read Address BPSK Modulation of Preamble Bits Adder Coefficient Modification for RAKE Finger Correlator MCIDS Code ROM Synchroniation Constants for RAKE Finger Correlators ix

10 4.4 State Machine in CCDM Control CCDM Despreading States for Delay Line Registers Adder Coefficients for 8-Chip CCDM Correlators CCDM 8-Chip Code ROM Summary of IEEE UWB Channel Model Properties Main Features of XC2VP70 FPGA Summary of Utiliation of XC2VP70 FPGA Detailed Synthesis Results x

11 List of Figures 1.1 Transceiver Development Methodology Transceiver Block Diagram Example of CCDM Sequence Set for L=28 and K= PHY Frame Format Example of Spreading Process for PHY Header Bits-to-Symbol Mappings for BPSK, QPSK, 16-QAM and 64-QAM Codeset Definitions for CCDM and MCIDS Insertion of Pilots FCC Emissions Limit on UWB and Transceiver Spectral Mask Tx Overall Timing Transmitter Scrambler & HCS Timing TxMap Timing of Tx-Map-Buffer-Group A.22 Block FIFO Refilling Counter Synchroniation Impact of Pre-spreading on Symbol Timing Timing of Transmitter s CCDM Spreading Architecture of CCDM Spreading Tx CCDM Spreader Timing Load Cycle Tx CCDM Spreader Timing Write Cycle Tx MCIDS Buffer Addressing xi

12 3.13 Impact of Pilots on Tx MCIDS Addressing Tx MCIDS Interleaver ASR Control Tx MCIDS Interleaver ASR Addressing Transmitted Signal for a QPSK packet with a payload of 384 bits Receiver State Machine Top-Level MCIDS Despreading Timing Architecture of RAKE Receiver Worst-Case 64-Finger RAKE Buffer Register Requirements Buffer Register Requirements for 32 RAKE Fingers Architecture of RAKE Finger Correlator MCIDS Despreading Control Timing RAKE Buffer for Preamble Correlation Frame Detection and Synchroniation Timing Initialiation of Channel Coefficient Timing Update of Channel Coefficient Timing Pilot Removal in Rx-CCDM-RemovePilots B Pilot Removal in Rx-CCDM-Buffer B Timing of Rx-CCDM B Control of Load Cycle in Rx-CCDM-Control B Architecture of CCDM 8-Chip Correlator Address Generation in Rx-DeMap-Addr B Compensating for Sub-rate Modulations Receiver Packet Buffer Writes in Rx-Bus-Parallel-BitCnt B Example RLC Circuit for Transmit Butterworth Filter Spectral Mask and Transmitted Power Spectral Density Matched Filter Performance Transmitter MAC State Machine Model OPB Bus Transactions During Transmission of a Packet xii

13 5.6 Receiver State Machine Eb Theoretical BER vs. N0 5.8 Eb Simulated BER vs. N0 5.9 Eb Simulated BER vs. in CM N0 Eb 5.10 Simulated BER vs. in CM N0 Eb 5.11 Simulated BER vs. in CM N0 Eb 5.12 Simulated BER vs. in CM N0 Eb 5.13 Simulated BER vs. for QPSK in all channels. N Simulated PER vs. ADC Bit Width xiii

14 List of Abbreviations ADC AGC ASR BER CCDM DAC DSSS FCC FCS FIFO FPGA HCS I ISI LNA LOS LSB LUT MAC MCIDS MPDU MRC Analog to Digital Convertor Automatic Gain Control Addressable Shift Register Bit Error Rate Complementary Code Division Multiplexing Digital to Analog Convertor Direct Sequence Spread Spectrum Federal Communications Commission Frame Check Sequence First-In First-Out Field Programmable Gate Array Header Check Sequence In-Phase Inter-Symbol Interference Low Noise Amplifier Line Of Sight Least Significant Bit Look Up Table Medium Access Control Multicode Interleaved Direct Sequence MAC Protocol Data Unit Maximal Ratio Combining xv

15 MSB NLOS OPB PAR PER PHY PRBS PSD Q RAM RF ROM RTL S-V SFD SIFS TDM UWB Most Significant Bit Non-Line Of Sight On-chip Peripheral Bus Place and Route Packet Error Rate Physical Layer Pseudo-Random Binary Sequence Power Spectral Density Quadrature Random Access Memory Radio Frequency Read Only Memory Register Transfer Level Saleh-Valenuela Start Frame Delimiter Short Inter-Frame Spacing Time Division Multiplex Ultra-WideBand xvi

16 Abstract An original ultra-wideband (UWB) physical layer (PHY) specification is developed and implemented in digital logic. The novelty of this UWB PHY is based on a combination of complementary code division multiplexing (CCDM), which yields a low-interference signal with a variable process gain, and multicode interleaved direct sequence (MCIDS) spreading, which provides an additional fixed process gain as well as multipath robustness. To operate at the high sample rates needed for UWB, the digital logic, realied in a Virtex-II field programmable gate array (FPGA), has a highly-pipelined architecture for real-time signal processing. In addition, the gate count is minimied by avoiding the use of explicit buffer memory wherever possible. The performance of the transceiver is analyed under a variety of UWB channels and impairments. It is concluded that the proposed UWB PHY offers robust performance in real-world environments and that it is viable for use in future communication systems. xvii

17 Acknowledgements Cry havoc! And let slip the dogs of war. Thanks to my supervisor, my family and my friends. xix

18 Chapter 1 Introduction Ultra-wideband (UWB) technology has tremendous potential for high-rate lowpower communications due to its resistance to interference and interception, deep ground and through wall penetration and high time resolution [1]. With UWB officially defined in 2002 by the United States Federal Communications Commission (FCC) as a signal with a 10dB bandwidth of more than 500MH and a maximum equivalent isotropic radiated power spectral density (PSD) of no more than 41.3dBm/MH in the GH band [2], the challenge is on to exploit this untapped spectral resource. In this thesis, we develop and analye a real-time realiation of a novel ultrawideband baseband in digital hardware. There are several objectives to this work, namely: 1. Find efficient digital architectures to realie Complementary Code Division Multiplexing (CCDM) modulation [3] and Multi-Code Interleaved Direct Sequence (MCIDS) spreading [4]. 2. Implement a novel real-time UWB physical layer (PHY). 3. Analye the expected real-world performance of the transceiver. In order to meet the extremely high sample rates of an UWB system, which are at least 500MH given the FCC definition of UWB, all baseband algorithms 1

19 CHAPTER 1. INTRODUCTION will need dedicated logic and highly pipelined architectures. Accordingly, the first goal of this project is to produce designs for the key MCIDS spreading and CCDM modulation techniques, as detailed in 2.1 and 2.2 respectively, that are able to operate at the required speeds in contemporary hardware. The second objective is to define and implement an original UWB PHY specification that combines both CCDM modulation and MCIDS spreading. With the specification detailed in 2.3, the bulk of this thesis is dedicated to constructing the digital logic needed for a Field Programmable Gate Array (FPGA) realiation. Note that in addition to the CCDM and MCIDS baseband signal processing, the FPGA must also provide the PHY frame management and MAC interfaces needed to make a fully functional wireless transceiver. Further, given the intention that this transceiver be capable of real-world operation, it is critical that both the transmitter and receiver architectures, detailed in 3.1 and 4 respectively, are fast and efficient. In particular, this means that the FPGA hardware must process the signals sample-by-sample in real-time, and, unlike many wireless test-beds [5], avoid the multi-gigabyte buffers needed for off-line signal processing. This work concludes with the analysis of the performance of the complete UWB transceiver in 5.1 which provides experimental validation of the high level of performance obtained with this design. In addition, by having produced a real-time hardware implementation, hardware/software co-simulation becomes possible. This is important since conventional Monte-Carlo simulations, when run over tens-ofthousands of packets on a general-purpose microprocessor, result in prohibitively long simulation runs. Therefore, by running critical parts of the algorithms in highspeed digital logic, it is possible to reduce the time needed for simulation by several orders of magnitude without sacrificing accuracy. 2

20 CHAPTER 1. INTRODUCTION 1.1. DESIGN METHODOLOGY 1.1 Design Methodology The methodology used to realie this UWB transceiver is shown in Figure 1.1. Each step of this process is enumerated as: Transceiver Specification Matlab TM Modeling FPGA Realiation Verification & Simulation System Generator TM VHDL Synthesis & PAR Simulink TM Matlab TM Figure 1.1: Transceiver Development Methodology 1. Create a transceiver specification that identifies what signal processing techniques will be used and defines the packet formats. The final specification is provided here in Model the transceiver in Matlab TM so as to gain an appreciation of implementation considerations and estimate the system s overall performance. This model will also be used for verification of the FPGA implementation. The Matlab TM simulations that were created during this stage are provided in Appendix D. 3. The FPGA realiation is the major contribution of this project, with the goal being to develop a real-time implementation of an UWB PHY. The System Generator TM tool was used for this implementation, the use of which is discussed in more detail for the remainder of this section. 3

21 1.1. DESIGN METHODOLOGY CHAPTER 1. INTRODUCTION 4. The final stage of development is verification and simulation. This is when the performance of the transceiver is analyed. The results of this analysis are provided in 5.2. System Generator TM is software from Xilinx TM that builds on top of the Simulink TM and Matlab TM environments to allow computer-aided generation of register transfer level (RTL) languages like VHDL. Once the VHDL has been produced by System Generator TM, it is run through synthesis and place-and-route (PAR) in the traditional way. For this project, the synthesis tool was Synplify TM from Synopsys TM and the PAR tool was the Xilinx TM ISE. The greatest benefit of this approach to FPGA-based design is that highly pipelined and highly scalable designs can be created with relative ease since system delays can be readily visualied. Therefore, given this project s requirement for real-time signal processing, System Generator TM is the ideal development environment. The bulk of this report consists of an analysis of the hardware design that was created in System Generator TM. In order to make a design of this complexity better understandable, a notation system has been developed which works as follows. The hardware models that comprise the FPGA design of the transmitter and receiver are provided as Appendix A and Appendix B respectively, with the accompanying analysis and discussion provided in 3.1 and 4 respectively. When discussing a given component, such as the bus acknowledgement generator logic, the corresponding System Generator TM block diagram will be written as Tx-Bus-AckGen A.2. This notation provides several critical pieces of information. First, it identifies the location in the design hierarchy where the block can be found. In other words, we can see that the bus acknowledgement generator logic, AckGen, is to be found within the Bus object that is itself within the top-level object Tx. Second, the superscript portion of the notation, e.g. A.2, informs us that a hard copy of the model is available as Figure A.2. in Appendix A. Once a given module has been identified, individual logic components, such as registers and adders, are identified by names such as Reg1 or Add1 that indicate 4

22 CHAPTER 1. INTRODUCTION 1.2. CONTRIBUTIONS the type of component as well as the index of the relevant instantiation. Note that although the index is reset to 1 for every block, the text makes it clear as to what block is being discussed. The input and output signals to block are denoted in italics, such as ps that corresponds to the first input port of Tx-Bus-AckGen A.2. In addition, some blocks make use of labels to reduce clutter on the screen. In other words, if the creation of explicit input-and-output ports between the source and destination blocks would result in confusion, a label is used to infer the connection. An example of a label is PACKET FINISHED in Tx-Bus-ControlMask A.3, where screen clutter is significantly reduced given that PACKET FINISHED is a global signal that impacts several processes in the transmitter. When a label is created, the text will explicitly list all the destinations. To help explain the interaction between the different digital logic components that comprise each block in the transceiver, timing diagrams similar to Figure 3.1 are provided. In all such figures, the x-axis represents time and the y-axis the value of the identified bus. Each of these plots was obtained through cycle-accurate simulation for whole packets, so the information on expected behavior that is provided by these figures will be of particular use when modifying or extending the transceiver. It is also important to note that all binary and hexadecimal numbers are written from least significant bit (LSB) to most significant bit (MSB). For example, the number 131 would be written as b in binary and 0xC1 in hexadecimal. Note also that all operations on binary sequences begin with the LSB and end with the MSB. For example, the over-the-air transmissions from the transceiver will begin with the LSB and end with MSB. 1.2 Contributions The principal contribution of this project is the design and realiation of a realtime UWB PHY in a Virtex-II FPGA. As per the goals of this project, this work not only proves the viability of the novel CCDM modulation and MCIDS spread- 5

23 1.2. CONTRIBUTIONS CHAPTER 1. INTRODUCTION ing techniques, it also facilitates real-world investigation into next-generation UWB transceivers. In addition to the design and analysis provided in this document, there have been several publications related to this work. Firstly, a superset of the UWB algorithms and transceiver specification used in this project are currently under review. These publications are: ˆ X. Huang, D. Lowe, R. Gandia, et. al. An Impulse Ultra-Wideband System Capable of Concurrent Transmission and Reception, Part I: Requirements and Innovations. Submitted for review. ˆ X. Huang, D. Lowe, R. Gandia, et. al. An Impulse Ultra-Wideband System Capable of Concurrent Transmission and Reception, Part II: Design and Performance. Submitted for review. Also, the UWB physical layer modeling and analysis that was performed was used in a range of MAC and Network layer research that investigated the higherlayer impact of UWB communication. This work produced several publications, namely: ˆ K-W Chin & D. Lowe. Simulation Study of the IEEE MAC, Australian Telecommunications and Network Applications Conference (ATNAC), Sydney, Australia, December, ˆ K-W Chin & D. Lowe. A Novel IEEE Channel Time Allocation Sharing Method for Supporting VBR Streams, The IEEE 14th International Conference on Computer Communications and Networks (IEEE ICCCN 05), San Diego, Oct-17-20, ˆ K-W Chin & D. Lowe. A Simulation Study of TCP over the IEEE MAC, The 30th Annual IEEE Conference on Local Computer Networks (IEEE LCN 05), Sydney, Australia, Nov, To Appear 6

24 CHAPTER 1. INTRODUCTION 1.2. CONTRIBUTIONS ˆ K-W Chin & D. Lowe. TCP over the IEEE MAC: Analysis and Simulation. Submitted for review. ˆ K-W Chin & D. Lowe. MiniMesh: Making the IEEE MAC Mesh Aware via Opportunistic Transmissions. Submitted for review. ˆ K-W Chin & D. Lowe. The IEEE MAC: Enabling High-Rate Multimedia Applications in Wireless Personal Area Networks. Submitted for review. 7

25 Chapter 2 A Novel UWB PHY The goal of this project is to create a novel UWB PHY and to demonstrate its real-world viability with a real-time FPGA implementation. As this UWB PHY aims to differentiate itself through improved digital baseband signal processing, it is sufficient to use models of the analog and radio frequency (RF) aspects of the transceiver. In other words, in the context of the system architecture of Figure 2.1, algorithms and digital logic will be developed for the Transmitter and Receiver while the RF is modeled in software. Both the transmitter and the receiver are comprised of three main stages. The MCIDS Spreading and MCIDS Despreading stages uses the MCIDS algorithm, defined in 2.1, to mitigate multipath and add a fixed process gain. The CCDM Modulation and CCDM Demodulation stages use the CCDM algorithm, defined in 2.2, to provide an additional variable process gain and to minimie interference to victim receivers by making the transmitted signal resemble AWGN. The PHY Frame Construction and PHY Frame Recovery stages of 2.3 parameterie the signal processing algorithms and provide an interface to the MAC layer. 9

26 2.1. MCIDS CHAPTER 2. A NOVEL UWB PHY TRANSMITTER RF PHY Frame Construction CCDM Modulation MCIDS Spreading Pulse Shaping & RF Up- Conversion Multipath Channel AWGN RECEIVER PHY Frame Recovery CCDM Demodulation MCIDS Despreading Matched Filter & RF Down- Conversion Figure 2.1: Transceiver Block Diagram 2.1 MCIDS Multicode Interleaved Direct Sequence (MCIDS) spreading [4] is a combination of multi-code direct sequence spreading and block interleaving that mitigates Inter- Symbol Interference (ISI) in severe multipath channels where the delay spread is much greater than a single chip period. This is critical since UWB systems have channel delays that are likely to be several times that of a single chip period, the ISI would quickly render the transceiver inoperative if no multipath recovery was performed. MCIDS spreading is a two-step process that operates on a block of M data symbols. First, each symbol in the block is spread by one of M orthogonal spreading sequences that is N chips in length. Second, the spread signal is passed through a block interleaver. Note that the first-step is conventional direct sequence spread spectrum with a process gain of N; the unique multipath immunity of MCIDS comes from its interleaving. Mathematically, the process of MCIDS spreading can 10

27 CHAPTER 2. A NOVEL UWB PHY 2.1. MCIDS be expressed as with x[k] ={BQ} j,i 0 k<mn (2.1) j = k mod N (2.2) and i = k j N (2.3) where x[k] with k = {0, 1, 2,..., NM 1} are the NM symbols that comprise the MCIDS spread signal, B is the MCIDS codeset and Q is a diagonal matrix constructed from a vector of q[m] data symbols where 0 m<m. Note that the notation B j,i refers to row j and column i of matrix B, where each of the M columns represent a code N chips long. For example, consider MCIDS spreading when M = N = 4. In this case, the MCIDS codeset can be expressed as B 0,0 B 0,1 B 0,2 B 0,3 B B = 1,0 B 1,1 B 1,2 B 1,3 B 2,0 B 2,1 B 2,2 B 2,3 B 3,0 B 3,1 B 3,2 B 3,3 with each column representing one of 4 orthogonal spreading sequences {B 0,i, B 1,i, B 2,i, B 3,i }. We can also define the diagonal matrix Q as Q = q[0] q[1] q[2] q[3] where q[0] through q[3] are the 4 data symbols that are to be spread. To perform 11

28 2.1. MCIDS CHAPTER 2. A NOVEL UWB PHY MCIDS spreading, we first obtain BQ, which can be expressed as BQ = B 0,0 q[0] B 0,1 q[1] B 0,2 q[2] B 0,3 q[3] B 1,0 q[0] B 1,1 q[1] B 1,2 q[2] B 1,3 q[3] B 2,0 q[0] B 2,1 q[1] B 2,2 q[2] B 2,3 q[3] B 3,0 q[0] B 3,1 q[1] B 3,2 q[2] B 3,3 q[3] (2.4) The interleaving, which was captured in the relationship between k, j and i in (2.2) and (2.3), effectively serialies to the N M matrix BQ into a one-dimensional vector NM chips long by reading row-first. In other words, the 16 MCIDS chips produced in this example are shown in Table 2.1, with the first chip that would be sent over-the-air denoted as x[0]. m j i x[k] m j i x[k] B 0,0 q[0] B 2,0 q[0] B 0,1 q[1] B 2,1 q[1] B 0,2 q[2] B 2,2 q[2] B 0,3 q[3] B 2,3 q[3] B 1,0 q[0] B 3,0 q[0] B 1,1 q[1] B 3,1 q[1] B 1,2 q[2] B 3,2 q[2] B 1,3 q[3] B 3,3 q[3] Table 2.1: Example of an MCIDS Spread Signal for M = N =4 At the receiver, the MCIDS despreading process is defined as where x [k] isthek th q [m] = 1 N N k=0 B m,k x [Mk + m] (2.5) received sample of the MCIDS spread signal and q [m] is the m th of M recovered data symbols. In other words, to continue the example of M = N = 4, Table 2.2 shows how the interleaving is removed from the MCIDS spread signal of Table 2.1. In the case where B k,n = ±1, and there is no AWGN or multipath, i.e. when x [k] =x[k] it can be seen that q [n] =q[n]. The performance of MCIDS spreading in the presence of multipath is clearly 12

29 CHAPTER 2. A NOVEL UWB PHY 2.2. CCDM n q [n] (B 4 0,0x [0] + B 1,0 x [4] + B 2,0 x [8] + B 3,0 x [12]) (B 4 0,1x [1] + B 1,1 x [5] + B 2,1 x [9] + B 3,1 x [13]) (B 4 0,2x [2] + B 1,2 x [6] + B 2,2 x [10] + B 3,2 x [14]) (B 4 0,3x [3] + B 1,3 x [7] + B 2,3 x [11] + B 3,3 x [15]) Table 2.2: Example of MCIDS Despreading for M =4 dependent on the cross-correlation properties of the underlying MCIDS codeset B. In the ideal case, when the codes in the MCIDS codeset have an impulse autocorrelation and ero cross-correlation, MCIDS spreading can be shown to be able to entirely remove any ISI caused by multipath delays of less than N chip periods [4]. Fortunately, even though an ideal codeset is not realiable, many practical codesets still provide excellent performance. For example, for this new UWB PHY, the MCIDS codeset B is a normalied Hadamard matrix H M of order M = 16. In other words, B = H M where H M = H M 2 H M 2 H M 2 H M 2 M>1 (2.6) and H 1 = 1 and M is a positive integer power of two. For convenience, the full M = N = 16 MCIDS Hadamard codeset used in this transceiver is provided in full in Figure 2.6. In addition to the FPGA realiations of MCIDS spreading and despreading in 3.6 and 4.1 respectively, explanatory Matlab TM scripts are also provided in Listing D.13 and D CCDM Complementary Code Division Multiplexing (CCDM) uses complementary sequences to generate a spread spectrum signal that supports a wide range of variable spreading ratios and has an asymptotically Gaussian amplitude distribution. The variable spreading ratios are set a data rate that is appropriate 13

30 2.2. CCDM CHAPTER 2. A NOVEL UWB PHY for the current channel conditions and the Gaussian amplitude distribution results in a signal with a power spectral density that statistically resembles that of white Gaussian noise. This latter point is particularly significant in the case of UWB devices as it is critical to minimie the impact on in-band victim receivers operating. The process of CCDM is achieved by convolving a block of input data symbols with a set of complementary code spreading sequences. To analye this process, we begin by considering a general direct sequence spread spectrum (DSSS), namely s = Cq (2.7) for the spreading process and q = C s (2.8) for the despreading process. In both cases, s denotes an L 1 vector representing the spread data, C an L L codeset and q an L 1 vector representing the original input data symbols. To visualie C, consider each column as denoting one of L spreading codes of length L. CCDM, which uses complementary codes to define C, has several interesting properties. Firstly, C = 1 c CT (2.9) where C T denotes the matrix transpose operation and c is a scaling constant. This first property is similar to that resultant from the use of a Hadamard matrix as the codeset, but has the difference that all Hadamard matrices require c = L. On the other hand, a codeset C constructed from complementary codes has more flexibility since complementary sequences of different lengths will result in different scaling constants. The benefit of being able to reduce the scaling constant is that the peakto-average power can be reduced without changing the block sie L. The second advantageous property of CCDM codesets is that all elements in the codeset consist 14

31 CHAPTER 2. A NOVEL UWB PHY 2.2. CCDM of {+1, 0, }. While CCDM codesets are therefore slightly more complex than those based on Hadamard matrices, where all elements are ±1, this is not a significant increase and both codesets can be efficiently computed in digital logic. The third property is that CCDM codesets exist for all L, whereas Hadamard matrices are defined only when L is an integer power of two. To construct a codeset C that can be used for CCDM, we must begin by considering the underlying complementary sequences themselves, such as the scalable complete sets of complementary sequences presented in [3]. Since these sequences are both complementary and complete, it means that a set of 2 K sequences of length 2 2K are mutually orthogonal about circular shifts of { 0, 2 K, 2 K+1,..., 2 2K}. For example, when K = 3, we have a set of 8 64-chip complementary sequences that are orthogonal about all shifts that are multiples of 8. Therefore, in general, we can state that a scalable complete complementary set of sequences of order K can be used to produce a spreading codeset C of order 2 2K 2 2K by performing circular shifts on the fundamental set. If we wish to obtain codesets with dimensions that are not integer powers of two, we can do so by suffixing k2 K trailing eros to each of the fundamental complementary sequences prior to performing the circular shifts. For example, to create a codeset C that is 96 96, we must first choose between complementary sequences of order K =0, 1, 2, 3. Clearly, for low K, there will be more eros that must be appended to obtain 96 chips. Indeed, in the extreme case, when K =0,C will be the identity matrix since each row will have only one non-ero value. For a higher K, sayk = 3, we would add 32 eros to each of the 8 64-chip sequences. The circular shifting would then be performed to give overall offsets of {0, 8, 16, 24,..., 88}. Since each shift adds another 8 orthogonal code sequences to the codeset, it can be seen that the end result will be that C contains 96 mutually orthogonal sequences of length 96. An example of a CCDM codeset where L = 28 and K = 2 is depicted graphically in Figure 2.2. Since K = 2, there are a total of 2 K = 4 complementary sequences 15

32 2.2. CCDM CHAPTER 2. A NOVEL UWB PHY used to construct the set, which are denoted as s (m) [n], with m representing the sequence index from 0 to 3 inclusive and n representing the specific chip from 0 to 15 inclusive. Since the codeset is larger than the length of the underlying sequence, the sequences are padded with eros, with the sequences highlighted as shaded regions and the eros shown as white. Each sequence is represented as a column, and, as we move across to the right, we see each successive copy of the fundamental scalable complete set of complementary sequences is delayed, or shifted down, by 4 chips. Note that the tail is wrapped around to the beginning when it exceeds the boundary of the codeset. Once we have finished constructing the codeset, we can consider the subsequent spreading process as taking 28 incoming data samples and multiplying each column by one sample. Then, the final 28 CCDM-spread output samples are obtained by summing along each row. Mathematically, we can denote the construction of a codeset C using mutually orthogonal complementary sequences as s (m) [n] 0 n<2 2K C r,c = 0 otherwise (2.10) with and m = c mod 2 K (2.11) n =(r c m) mod L (2.12) where C r,c is row r and column c of the spreading matrix C and s (m) [n] is chip n of the m th complementary sequence in a set of 2 K mutually orthogonal complementary sequences. In the context of Figure 2.2, it can be seen that (2.11) results in the horiontal repetition of each set of 4 sequences while (2.12) provides the vertical circular shifting. Although there are several ways by which complementary sequences can be ob- 16

33 CHAPTER 2. A NOVEL UWB PHY 2.2. CCDM s (0) (0 15) s (1) (0 15) s (2) (0 15) s (3) (0 15) s (0) (0 15) The sequences are orthogonal about integer shifts of 4. s (1) (0 15) s (2) (0 15) A scalable complete set of 2 K complimentary sequences, designated as s (0) (n) through s (3) (n), of length K 2 =16. s (3) (0 15) s (0) (0 15) s (1) (0 15) s (2) (0 15) s (3) (0 15) s (0) (12 15) s (0) (0 11) s (1) (12 15) s (1) (0 11) s (2) (12 15) s (2) (0 11) s (3) (12 15) s (3) (0 11) s (0) (8 15) s (0) (0 7) s (1) (8 15) s (1) (0 7) s (2) (8 15) s (2) (0 7) s (3) (8 15) s (3) (0 7) s (0) (4 15) s (0) (0 3) s (1) (4 15) s (1) (0 3) s (2) (4 15) s (2) (0 3) s (3) (4 15) s (3) (0 3) modulated sample are then obtained by summing horiontally across each row. Each of the L=28 sequences, s (m) (n-kk), are multiplied by the data symbol q[n]. The L=28 CCDM Figure 2.2: Example of CCDM Sequence Set for L=28 and K=2 tained, the method used here is as per [3] where s (m) [n] =h (m) K (i, j) (2.13) with i = n mod 2 K and j = n i 2 K 17

34 2.2. CCDM CHAPTER 2. A NOVEL UWB PHY where h (k) K (i, j) isrowi and column j of sequence m in a scalable complete complementary set of sequences of order K. Although the derivation of h (k) K (i, j) is outside the scope of this project, it should be noted that one of its beneficial properties is that it can be calculated without the need for recursion. The order K of the complementary sequences used to construct the codeset C impacts the range of process gains that can be obtained by eroing some input data symbols. For example, when K = 0 and C is an identity matrix, it follows that no process gain can be obtained since each output sample is related to only a single input samples. However, when K = 3, each output sample will be the sum of 64 input samples. This means that a range of process gains are possible, which can be quantified as P = B22K A (2.14) where P is the process gain and {A, B} = {1, 2,..., 2 K } set the spreading ratio, with the condition that B is a factor of L 22K. Note that if B is not such a factor, the 2 K number of input samples that are used in the calculation of each output sample will not be constant, which will lead to degraded performance. It can be seen that although longer sequence lengths incur higher peak-to-average powers, a wider range of process gains is made available. To better visualie this, consider A and B in the case where K = 3 and L = 96. Here, A can be any integer between 1 and 8 inclusive while B is limited to {1, 2, 4}. The role of A is to select how many of the spreading sequences in each group of 8 will be used; if A = 8 all the spreading sequences will be used whereas if A = 1 only one will be used. In other words, consider A as representing the effect of a binary pre-spreading sequence that is applied to the incoming data symbols. For example, if A = 4, only half of the 8 fundamental complementary codes will be used, which is the same as if a set of 48 data symbols were spread by a code of {1, 0} to obtain the 96 input samples needed for the CCDM spreading. With A thereby controlling the number of sequences in the fundamental set of 8 that will be used, the role of B is to set the sie of the step in each iteration of the circular shifting to B2 K samples. For example, if B = 1, then each shift will 18

35 CHAPTER 2. A NOVEL UWB PHY 2.3. SPECIFICATION be minimum of 8 samples whereas, if B = 4, each shift would be 32 samples. It can be seen that the choice of L has significant impact of the range of valid values for B given a fixed sequence order K. This means that not all combinations of L and K will produce valid CCDM codesets. For example, if L = 97 and K = 3, then there are no valid values for B and either L or K will need to be changed. Note that when K =0,A = B = 1 and L can be any positive integer since the codeset will be the identify matrix of dimension L L. For this UWB transceiver, CCDM is parameteried with K = 3 and L = 96. This means that there is a fundamental set of 8 scalable complete complementary sequences, shown explicitly in Figure 2.6, that are used to create a CCDM codeset matrix C of dimension In other words, a single CCDM block in this transceiver will be comprised of 96 samples. Further, to enable variable process gains, we can, in the context of (2.14), keep B constant at 1 and define three prespreading codes that set A to values of 2, 4 and 8 for overall process gains of 4, 2 and 1 respectively. These prespreading codes are are discussed in more detail in In addition to the FPGA realiations of CCDM spreading and despreading that are provided in 3.5 and 4.2 respectively, explanatory Matlab TM scripts are given in Listing D.6 and D.7 respectively. 2.3 Specification The PHY specification proposed here is designed to showcase MCIDS spreading and CCDM modulation in a real-world transceiver. Accordingly, the process by which a PHY frame is created is shown graphically in Figure 2.3. The construction of a PHY frame begins when the MAC initiates a transmission by passing the PHY a MAC Protocol Data Unit (MPDU) comprised of a MAC header, a frame payload and a frame check sequence (FCS). Note that it is the responsibility of the MAC to calculate the FCS. The PHY then adds a 24 bit PHY header and calculates a 19

36 2.3. SPECIFICATION CHAPTER 2. A NOVEL UWB PHY header check sequence (HCS) that protects both the PHY and MAC headers. The headers, the HCS and the frame payload are then scrambled. Finally, a preamble and start frame delimiter (SFD) are added. 80 bits From MAC via PHY SAP MAC Header Frame Payload + FCS 24 bits Add PHY header PHY Header MAC Header Frame Payload + FCS 16 bits Calculate and insert HCS PHY Header MAC Header HCS Frame Payload + FCS Data scrambling PHY Header MAC Header HCS Frame Payload + FCS Scramble 96 bits 32 bits Add preamble and SFD Preamble SFD PHY Header MAC Header HCS Frame Payload + FCS BPSK Modulation MCIDS Spreading ¼-BPSK Modulation CCDM & MCIDS Spreading User-Specified Modulation CCDM & MCIDS Spreading Figure 2.3: PHY Frame Format Note that different parts of the PHY frame are sent at different rates and use different spreading processes. In the case of the preamble and SFD, both are mapped into BPSK symbols before MCIDS spreading. This is the only case where no pilots are added, so the 96 bits of the preamble and the 32 bits of the SFD map directly to 96 symbols and 32 symbols respectively before MCIDS spreading. Since each MCIDS block is comprised of 16 symbols, the post-spreading preamble will contain 6 MCIDS blocks and the SFD 2 MCIDS blocks. The PHY header, as well as the scrambled MAC header and HCS, is also mapped into a series of BPSK symbols. Now though, a 4 prespreading code is used before CCDM. Pilots are then added and MCIDS spreading applied. The frame payload is sent in a similar way to the headers, with the difference that the constellation mapping and prespreading factor are dependent on the desired data rate. A graphical example of the process by which the PHY header is created is shown 20

37 CHAPTER 2. A NOVEL UWB PHY 2.3. SPECIFICATION in Figure 2.4. Also shown in this figure is what the signal will look like at each stage of the process. For example, the PHY header starts as 24 binary bits that, after BPSK modulation, will become 24 symbols of ±1. Then prespreading code will subsequently result in a three-level signal that will become arbitrarily multi-level, with an asymptotically Gaussian distributed amplitude, once CCDM is applied. 24 bits Scrambled PHY Header {0, 1} 24 symbols BPSK Modulation {- 1, +1} 96 symbols Prespread with {1, 0, 0, 0} for ¼-BPSK {- 1, 0, +1} 96 symbols CCDM Spreading Multi-level Signal 128 symbols Add Pilots Multi-level Signal 8 MCIDS blocks MCIDS Spreading Multi-level Signal Each MCIDS block comprises 16 symbols spread over 256 chips Figure 2.4: Example of Spreading Process for PHY Header Preamble The preamble is used for frame detection, clock synchroniation and channel estimation at the receiver. The preamble consists of 6 MCIDS blocks, generated by BPSK-modulating and MCIDS-spreading a 16 bit sequence b that is inverted for every second MCIDS block. The complete 96 bit preamble 21

38 2.3. SPECIFICATION CHAPTER 2. A NOVEL UWB PHY sequence is given in Table 2.3, with the LSB of block 0 transmitted first. MCIDS Block Preamble Sequence 0 b b b b b b Table 2.3: Preamble Sequence SFD The SFD is used to delineate between the end of the preamble and the beginning of PHY header and thereby provides frame synchroniation. The SFD consists of 2 MCIDS blocks, generated by BPSK-modulating and MCIDS spreading a 32 bit sequence. The 32 bit sequence is the result of spreading b with the code b1000, the resultant sequence of which is given in Table 2.4. The LSB of block 0 transmitted first. MCIDS Block SFD Sequence 0 b b Table 2.4: SFD Sequence PHY Header Definition The PHY header is 24 bits long and identifies the data rate and length of the frame payload, with the unused bits reserved for future use. The format of the PHY header is given in Table 2.5, with bit 0 sent over-the-air first. Note that the Maximum Transmission Unit for this PHY, corresponding to the maximum sie of the MAC payload, is 1500 octets in accordance with the Ethernet[6] standard. 22

39 CHAPTER 2. A NOVEL UWB PHY 2.3. SPECIFICATION Bits Content Description 0-1 Reserved 2-4 Data Rate 3 bit field that indicates the data rate used to modulate the frame payload. 5-9 Reserved Payload Length 14 bit field that contains the length of the frame payload in octets, with the LSB being bit 10 and the MSB being bit 23. For example, a frame that was 12 octets long would be encoded as b Table 2.5: PHY Header Definition Bits Data Rate Pre-spreading Factor Symbol Mapping (Mbps) b0 b0 b0 4 BPSK b1 b0 b0 2 BPSK 3.75 b0 b1 b0 1 BPSK 7.5 b1 b1 b0 1 QPSK 15.0 b0 b0 b QAM 30.0 b1 b0 b QAM 45.0 Table 2.6: Data Rate Mappings for PHY Header 23

40 2.3. SPECIFICATION CHAPTER 2. A NOVEL UWB PHY The data rate mappings are defined in Table 2.6. For example, consider a 1024 octet packet that is to be sent using QPSK modulation. As per Table 2.5 and 2.6, the 24 bit PHY header for this packet, from LSB to MSB, would be b with the LSB sent over-the-air first HCS The HCS is provided by calculating a CCITT CRC-16 checksum [7] of the header fields. Specifically, the HCS is the ones complement of the remainder generated by the modulo-2 division of the combined PHY and MAC headers by the polynomial x 16 + x 12 + x 5 +1 The PHY and MAC headers are processed in transmit order, i.e. beginning with the LSB of the PHY header and ending with the MSB of the MAC header. The CRC calculation occurs before the scrambling operation. The CRC shift register will be initialied to 0xFFFF. For example, the CCITT CRC-16 checksum for the sequence b is b Scrambling A scrambler is used for the MAC header, HCS and frame payload. This means that the preamble, SFD and PHY header are not scrambled. The scrambled data bits are obtained by modulo-2 adding the unscrambled data bits with a pseudo-random binary sequence (PRBS), i.e. s n = b n x n where s n, b n and x n denote bit n of the scrambled data, unscrambled data and PRBS respectively. In other words, s 0 corresponds to the first bit of MAC header. 24

41 CHAPTER 2. A NOVEL UWB PHY 2.3. SPECIFICATION The PRBS is generated by the polynomial [8] g(d) =1+D 14 + D 15 where D is a single bit delay element. In other words, the PRBS is defined as x n = x n4 x n5 when n 15 and as per Table 2.7 when n 15. x 0 1 x 8 1 x 1 1 x 9 1 x 2 1 x 10 1 x 3 1 x 11 1 x 4 1 x 12 1 x 5 1 x 13 0 x 6 1 x 14 0 x 7 1 Table 2.7: Initial Values for PRBS Symbol Mapping The supported symbol constellations are BPSK, QPSK, 16-QAM and 64-QAM. Accordingly, the mappings from binary bits into data symbols are shown in Figure 2.5, where b 0 is the LSB of each input binary data word. To ensure that the average power in each symbol is constant regardless of the constellation density, each of the constellations must be normalied by the scaling factor shown in Table 2.8. Modulation Normaliation Factor BPSK 1 QPSK QAM QAM 1 42 Table 2.8: Normaliation Constants for Symbol Constellations 25

42 2.3. SPECIFICATION CHAPTER 2. A NOVEL UWB PHY BPSK Q b 0 16-QAM Q b 0 b 1 b 2 b I QPSK Q b 0 b I I QAM Q b 0 b 1 b 2 b 3 b 4 b I Figure 2.5: Bits-to-Symbol Mappings for BPSK, QPSK, 16-QAM and 64-QAM 26

43 CHAPTER 2. A NOVEL UWB PHY 2.3. SPECIFICATION Prespreading Prespreading allows the transceiver to support a wide-range of processing gains by exploiting the properties of CCDM as defined is 2.2. In this prototype implementation, the prespreading is limited to either a 2 or 4 process gain, which corresponds to 1-rate and 1 -rate BPSK modulations respectively. 2 4 Prespreading is performed by spreading each symbol sequence by the relevant code from Table 2.9. For example, when using 4 prespreading in 1-BPSK, the original BPSK symbol sequence {1, 1,, 1} would become 4 {1, 0, 0, 0, 1, 0, 0, 0,, 0, 0, 0, 1, 0, 0, 0}. Prespread Factor Prespread Code 1 {1} 2 {1, 0} 4 {1, 0, 0, 0} Table 2.9: Prespread Codes CCDM CCDM, as defined in 2.2, uses a set of 2 K mutually orthogonal complementary code spreading sequences s (m) [n], each of length 2 2K, to create a codeset with dimensions of L L. For this transceiver, the codeset block has L = 96 and the complementary spreading sequences are order K = 3. All 8 of the complementary sequences are shown in Figure 2.6. Note that the input to the CCDM spreading process is 96 data symbols, inclusive of any prespreading, to create an output of 96 multi-level samples Pilot Insertion The post-ccdm data is grouped into blocks of 12 samples into which 4 pilots are inserted to yield the 16 samples block that is used for MCIDS spreading. The four pilots are defined as {+1,, +1, } and are inserted into positions 0, 4, 8 and 12 27

44 2.3. SPECIFICATION CHAPTER 2. A NOVEL UWB PHY CCDM Spreading Sequences n j MCIDS Codeset B j,i s (0) [n] s (1) [n] s (2) [n] s (3) [n] s (4) [n] s (5) [n] s (6) [n] s (7) [n] i Figure 2.6: Codeset Definitions for CCDM and MCIDS 28