TB068. How to Modify the PICDEM LIN for the MCP201 SCOPE MASTER BOARD MODIFICATIONS EXAMPLE 1: CS CONNECTED TO RC0. Microchip Technology Inc.

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1 How to Modify the PICDEM LIN for the MCP0 Author: Thomas Schmidt SCOPE This document describes how to modify the PICDEM LIN for use with a MCP0. The PICDEM LIN is equipped with an engineering version of the Microchip transceiver. The transceiver can be replaced by the MCP0 transceiver. MASTER BOARD MODIFICATIONS The following modifications are required to use a MCP0. Remove the existing transceiver from the Master, Prototype, and RKE Nodes on Panel. Place MCP0 for the Master Node on U (see Figure ), the Prototype Node on U (see Figure ), the RKE Node on U (see Figure ), and the Seat Memory Node on U (see Figure ). Solder the MCP0 onto all desired nodes. Note: Since Pin (VDD) is a regulated output on the MCP0, be sure it is electrically isolated from the PCB. Change the firmware so that the MCP0 recognizes one falling and one rising edge after power-up on RESET on /Wake pin (see Example ). Ensure that Pin of MCP0 is connected via a 00 KΩ resistor to VDD. For further options, please refer to the MCP0 Data Sheet (DS0). EXAMPLE : CONNECTED TO RC0 bsf PORTC,0 ; bsf STATUS,RP0 ;select Bank bcf TRISC,0 ;make RC0 an output bcf STATUS,RP0 ;select Bank0 bcf PORTC,0 ;enable MCP0 by bsf PORTC,0 ;toggling /Wake pin 00 DS0A-page

2 DS0A-page 00 FIGURE : LIN BUS MASTER NODE D D C C B B A A CAN.0 Wednesday, February 0, 00 B W. Chandler Blvd. Chandler, Arizona PICDEM LIN Master Node and CAN Interface 0-0 Chuck Simmers MASTERnode Size Rev Sheet of Drawn by RB RA RA RA RA RA RC RA RA RA RA RA RB RB RB RC SPIn SPICLK SPISI SPISO RE RE RD RD RD RD RD RB SPICLK RA SPISO SPISO RD RB SPICLK RA RB RB RD SPIn RA RA RE RB SPISI RA RD RD SPISI RD RC RE SPIn RD RD RD RD RD RE RE RC HCVbat HCVbat JP C 0uF D N0 V R K C.00uF R 00 R0 K C.0uF C uf REG LMET-.0 IN OUT D N V J Chassis J Vbat-V D N00 LED C 0pF C 0pF S RESET C 0.uF P R 0K R 0K U MAXACPP 0 0 TIN TIN ROUT ROUT C C- V- V- V TOUT TOUT RIN RIN C C C- C- E CONAP R K J D N R.K R K JP RJ-pinCON MCLR RB Y MHz U C CANH CANL D D REF RS E C 0pF C 0pF Y MHz TP TP TP TP TP TP J U PICF 0 MCLR/Vpp/THV OSC/CLKIN OSC/CLKOUT /AN0 RA/AN RA/AN/Vref- RA/AN/Vref RA/T0CLI RA/AN/SS RB RB RB/PGM RB RB /PGC /PGD RC0/TOSO/TCKI RC/TOSI/CCP RC/CCP RC/SCK/SCL RC/SDI/SDA RC/SDO RC//CK RC//DT D N U PICF MCLR/Vpp/THV OSC/CLKIN OSC/CLKOUT /AN0 RA/AN RA/AN/Vref- RA/AN/Vref RA/T0CLI RA/AN/SS RB RB RB/PGM RB RB /PGC /PGD RC0/TOSO/TCKI RC/TOSI/CCP RC/CCP RC/SCK/SCL RC/SDI/SDA RC/SDO RC//CK RC//DT /PSP0 RD/PSP RD/PSP RD/PSP RD/PSP RD/PSP /PSP /PSP /RD/AN RE/WR/AN RE//AN U MCP0 0 CAN CAN CLKOUT 0RTS RTS RTS OSC OSC BF 0BF INT SCK SI SO RESET R 0 D N R.K J 0 SiAEY U K VDD FAULT/nc E E E E E P D N00 J LIN CHASSIS Port0 Port Port Port Port Port Port Port Port Port0 Port Port

3 00 DS0A-page FIGURE : PROTOTYPE NODE D D C C B B A A.0 Wednesday, February 0, 00 B W. Chandler Blvd. Chandler, Arizona PICDEM LIN Prototyping Board 0-0 Chuck Simmers PROTOnode Size Rev Sheet of Drawn by RB RD RD RE RD RA RB RA RC RC RA RA RA RD RE RB RC RC RD RC RA RA RC RC RD RD RD RB RD RC RA RB RD RB RA RA RE RC RE RC RA RA RA RA RA RB RB RC RC RC RC RC RB HC HC HC RA RA RA RB RB RB LINbus LINbus RA RA RA RA RA REG LMET-.0 IN OUT C uf C 0 uf R K JP C.00 uf D N0 V C.0 uf R K R 00 J Chassis D N00 D0 N V J -V J E D N D N R K R0 K JP RJ-pinCON MCLR RB U PICF MCLR/VPP/THV OSC/CLKIN OSC/CLKOUT /AN0 RA/AN RA/AN/VREF- RA/AN/VREF RA/T0CLI RA/AN/SS RB RB RB/PGM RB RB /PGC /PGD RC0/TOSO/TCKI RC/TOSI/CCP RC/CCP RC/SCK/SCL RC/SDI/SDA RC/SDO RC//CK RC//DT /PSP0 RD/PSP RD/PSP RD/PSP RD/PSP RD/PSP /PSP /PSP /RD/AN RE/WR/AN RE//AN C 0 pf C 0 pf R 0K Y MHz LED S RESET C 0. uf R.K R 0 U PICF 0 MCLR/VPP/THV OSC/CLKIN OSC/CLKOUT /AN0 RA/AN RA/AN/VREF- RA/AN/VREF RA/T0CLI RA/AN/SS RB RB RB/PGM RB RB /PGC /PGD RC0/TOSO/TCKI RC/TOSI/CCP RC/CCP RC/SCK/SCL RC/SDI/SDA RC/SDO RC//CK RC//DT J DP HDSP-XX 0 0 RP 0 0 COM A B C D E F G H I R 0 SiAEY U K VDD FAULT/nc D N00 JP 0 J0 LIN U PICC 0 0 OSC/CLKIN OSC/CLKOUT MCLR/VPP RB RB BACT LIN BUS RB RB RB /AN0 RA/AN RA/AN RA/AN/T0CKI U0 PICC 0 GP/OSC/CLKIN GP/OSC/AN/CLKOUT GP/MCLR/VPP GP/T0CKI/AN/INT GP/AN/VREF GP0/AN0 LIN BUS BACT CHASSIS

4 FIGURE : RKE NODE HC D0 R -V REG ANT J N00 LMET ANTENNA D IN OUT RR-xxx U N00 R LED D C D C CHASSIS D 0 uf uf J K Ignition C S C U "LEARN" B B U.0 uf W. Chandler Blvd. Chandler, Arizona RFIN LEARN LED HC 0 ANT TEST OUT N V Chassis J D N R K R K D N R 0K C 0 pf R K 0 HC R 0K R K SiAEY LED C R0 0K.00 uf D N0 V C0 JP RB MCLR RJ-pinCON JP MCLR/VPP/THV OSC/CLKIN OSC/CLKOUT /AN0 RA/AN RA/AN/VREF- RA/AN/VREF RA/T0CLI RA/AN/SS K VDD PICF RB RB RB/PGM RB RB /PGC /PGD RC0/TOSO/TCKI RC/TOSI/CCP RC/CCP RC/SCK/SCL RC/SDI/SDA RC/SDO RC//CK RC//DT E0 JP 0 FAULT/nc J A A PICDEM LIN Remote Keyless Entry Decoder LIN 0-0 Rev RKEnode.0 Size Sheet Wednesday, February 0, 00 A of Drawn by Chuck Simmers DS0A-page 00

5 FIGURE : SEAT MEMORY NODE HC R D0 JP -V REG J0 N00 LMET RB D IN OUT N00 R LED D D C C0 D MCLR D 0 uf uf J K N00 RJ-pinCON C C C 0 OSC/CLKOUT J 0 pf RC0/TOSO/TCKI J R 0 RC/TOSI/CCP /AN0 RC/CCP RA/AN RC/SCK/SCL C R 0 RA/AN/VREF- RC/SDI/SDA TP R 0 RA/AN/VREF RC/SDO RA/T0CLI RC//CK U.0 uf RA/AN/SS RC//DT R0 R 0 0K 0 C C C C R PICF JP E.00 uf.00 uf.00 uf.00 uf 00K K B B C R FAULT/nc Interface to Sensors U HCHS0 HCHS HCHS HCHS HCHS HCHS HCHS HCHS W. Chandler Blvd. Chandler, Arizona Interface to Motor Relays HCVbat MCLR/VPP/THV OSC/CLKIN RB RB RB/PGM RB RB /PGC /PGD U UDNA IN0 IN IN IN IN IN IN IN OUT0 OUT OUT OUT OUT OUT OUT OUT 0 Vs 0 Chassis CHASSIS S S S Mem# Mem# N V S RESET 0. uf C J R0.K R 0 0 pf C Y MHz R0 0K 00K R 00K SiAEY.00 uf D N0 V VDD LIN J Set A PICDEM LIN Power Seat Memory Controller A J D N 0-0 Rev R K Ignition SeatMemnode.0 R K D N Size Sheet Wednesday, February 0, 00 A of Drawn by Chuck Simmers 00 DS0A-page

6 NOTES: DS0A-page 00

7 Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as unbreakable. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, KEELOQ, MPLAB, PIC, PICmicro, PITART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, microid, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Accuron, Application Maestro, dspic, dspicdem, dspicdem.net, ECONOMONITOR, FanSense, FlexROM, fuzzylab, In-Circuit Serial Programming, IP, ICEPIC, microport, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICC, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rflab, rfpic, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. 00, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July and Mountain View, California in March 00. The Company s quality system processes and procedures are QS-000 compliant for its PICmicro -bit MCUs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip s quality system for the design and manufacture of development systems is ISO 00 certified. 00 DS0A-page

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